CN206627244U - Data collecting system circuit - Google Patents

Abstract

The utility model discloses a kind of data collecting system circuit, including the microcontroller being connected with upper machine communication, the data acquisition unit electrically connected with the microcontroller, the data acquisition unit includes the detection circuit electrically connected with the microcontroller and the data acquisition circuit electrically connected with the detection circuit and microcontroller；The microcontroller uses model LPC1788 embedded control chip U2, the control chip U2 has 108 pins, it is connected by data transfer terminal with the upper machine communication, the control chip U2 is electrically connected by P0_0 and P0_1 pins with detection circuit；The detection circuit includes multiple sensing circuits and signal conditioning circuit, the signal conditioning circuit has the first transmission terminal electrically connected with the control chip U2, also there is the second transmission terminal electrically connected with the multiple sensing circuit, also there is the 3rd conveying terminal electrically connected with the data acquisition circuit.

Description

Data collecting system circuit

Technical field

It the utility model is related to a kind of data collecting system circuit.

Background technology

Data acquisition refers to the automatic data collection non-electrical from the analog- and digital- unit under test such as sensor and other Devices to tests Amount or electric quantity signal, are sent in host computer and are analyzed and processed.Data collecting system be combine based on computer or other The measurement software and hardware product of dedicated testing platform realizes flexible, user-defined measuring system.Data acquisition is applied to Every profession and trade, respectively automatically control the field for needing data acquisition.In general, the realization of data acquisition by detection sensor, adopt Collection chip and circuit realize, structure is complex for some existing data collecting system circuits are universal, the power supply energy compared with It is high.

Utility model content

For above-mentioned the deficiencies in the prior art, technical problem to be solved in the utility model is：A kind of structure letter is provided List, high accuracy, the data collecting system circuit of low power consumption.

In order to solve the above technical problems, the technical scheme that the utility model uses is：A kind of data acquisition system is provided Unite circuit, including microcontroller, the data acquisition unit that is electrically connected with the microcontroller being connected with upper machine communication, it is described Data acquisition unit includes the detection circuit that electrically connect with the microcontroller and detects circuit and microcontroller is equal with described The data acquisition circuit of electrical connection；The microcontroller uses model LPC1788 embedded control chip U2, the control Chip U2 has 108 pins, is connected by data transfer terminal with the upper machine communication, the control chip U2 passes through P0_0 and P0_1 pins electrically connect with detection circuit；The detection circuit includes multiple sensing circuits and signal conditioning circuit, The signal conditioning circuit has the first transmission terminal electrically connected with the control chip U2, also has and the multiple sensing The second transmission terminal that circuit electrically connects, also there is the 3rd conveying terminal electrically connected with the data acquisition circuit.

As optimization, the signal conditioning circuit includes the how logical conversion chip U3 using MAX384 models, and it has 18 Individual pin, the how logical conversion chip U3 /WR pins ground connection, the A0 pins and the control chip U2 of the how logical conversion chip U3 The connection of P0_1 pins, A1 pins of the how logical conversion chip U3 are connected with the P0_0 pins of the control chip U2, and this leads to more Conversion chip U3 EN pins are grounded by an electric capacity C46, are also connected with the node of the electric capacity C46 with+3.3V power supplys, this is more Logical conversion chip U3 V- pins ground connection, NO1A pins and NO1B pins of the how logical conversion chip U3 with the first sensing circuit Electrical connection, the NO2A pins and NO2B pins of the how logical conversion chip U3 electrically connect with the second sensing circuit, the how logical conversion Chip U3 COMA pins and COMB pins electrically connects with the data acquisition circuit, the V+ pins of the how logical conversion chip U3 Be grounded by an electric capacity C45, also be connected with the node of the electric capacity C45 with+3.3V power supplys, V- of the how logical conversion chip U3 with GND pin is grounded, the how logical conversion chip U3 /RS pins are grounded by an electric capacity C44, the node with the electric capacity C44 Also+3.3V power supplys connect.

Further, first sensing circuit includes the first sensing chip U6 and a high-precision voltage reference chip U4, the first sensing chip U6 and high-precision voltage reference the chip U4 are respectively provided with 8 pins, the first sensing chip U6 - Singnal Out pins be connected with the NO1B pins of more logical conversion chip U3, the first sensing chip U6+ Singnal Out pins are connected with the NO1A pins of more logical conversion chip U3 ,-In the pins of the first sensing chip U6 Ground connection, the first sensing chip U6+In pins are connected with the OUT pins of the high-precision voltage reference chip U4, also pass through one Electric capacity C14 is grounded, and an electric capacity C13 is connected in parallel with the electric capacity C14, remaining 4 pin sky of the first sensing chip U6 Put；The IN pins of the high-precision voltage reference chip U4 are grounded by an electric capacity C12, and an electric capacity C11 and electric capacity C12 is simultaneously Connection connection, the node between the electric capacity C11 and electric capacity C12 also connect+15V power supplys, the high-precision voltage reference chip U4's GND pin is grounded, and remaining pin of the high-precision voltage reference chip U4 is vacant.

Further, second sensing circuit includes the second sensing chip U7, the first operational amplifier U8, the second computing Amplifier U9, the NC pins of the first operational amplifier U8 are vacant, and+IN the ends of the first operational amplifier U8 pass sequentially through One resistance R2, a resistance R1 are connected with the first sensing chip U6+IN ends, and the node between the resistance R2 and resistance R1 passes through One adjustable resistance VR1 is grounded, and-IN the pins of the first operational amplifier U8 pass sequentially through a resistance R3, an electric capacity C47 connects The ground ,+VS pins of the first operational amplifier U8 are connected with+15V power supplys, are also grounded by an electric capacity C18, first fortune The VOUT pins for calculating amplifier U8 are connected with+IN the pins of the second operational amplifier U9, also with the electric capacity C47 and resistance Node connection between R3；The NC pins of the second operational amplifier U9 are vacant, and-the IN of the second operational amplifier U9 draws - IN pin of the pin directly with the second sensing chip U7 is connected, and also passes through a resistance R4's and the second sensing chip U7 Rset pins are connected, and+VS the pins of the second operational amplifier U9 are connected with+15V power supplys, are also grounded by an electric capacity C20, The VOUT pins of the second operational amplifier U9 are connected with+IN the pins of the second sensing chip U7；Second sensing Chip U7+OUT pins are connected with the NO2A pins of more logical conversion chip U3, and-the OUT of the second sensing chip U7 draws Pin is connected with the NO2B pins of more logical conversion chip U3.

Further, the data acquisition circuit, which includes data acquisition chip U1, the data acquisition chip U1, has 24 Individual pin, its SCLK pin are connected with the P1_20 pins of the control chip U2, the MCLK IN of the data acquisition chip U1 Pin is grounded by an electric capacity C1, and the MCLK IN pins are connected with the node of the electric capacity C1 with crystal oscillator Y1 first end, described Data acquisition chip U1 MCLK OUT pins are grounded by an electric capacity C2, the MCLK OUT pins of the data acquisition chip U1 It is connected with the node of the electric capacity C2 with the second end of the crystal oscillator Y1, the POL pins ground connection of the data acquisition chip U1, institute State data acquisition chip U1 /SYNC pins are grounded by an electric capacity C3, and also connect+3.3V electricity with electric capacity C3 node Source, the data acquisition chip U1 /RESET is connected with the RESET pins of the control chip U2, the data acquisition chip Both ends of the U1 AIN1 pins and AIN2 pins respectively with an electric capacity C42 are connected, between the electric capacity C42 and the AIN1 pins Node be connected by a resistance R13 with the COMA pins of more logical conversion chip U3, the resistance R13 and the electric capacity Node between C42 is also grounded by an electric capacity C43, and the node between the electric capacity C42 and the AIN2 pins passes through an electricity Resistance R12 is connected with more logical COMB pins for converting chip U3, also pass sequentially through the resistance R12 and an interface P4 with it is described Data acquisition chip U1 REF IN (+) pin connection, the node between the resistance R12 and the electric capacity C42 also pass through one Electric capacity C41 is grounded；

Both ends of the AIN3 pins and AIN4 pins of the data acquisition chip U1 respectively with an electric capacity C36 are connected, described Node between electric capacity C36 and the AIN3 pins passes sequentially through a resistance R15 and a first interface and the control chip U2 connections, the node between the resistance R15 and the electric capacity C36 are also grounded by an electric capacity C37, the electric capacity C36 and institute State the node between AIN2 pins and pass sequentially through a resistance R14 and a second interface and be connected with the control chip U2, also according to It is secondary to be connected by a resistance R14 and interface P2 with REF IN (+) pin of the data acquisition chip U1, the resistance Node between R14 and the electric capacity C36 is also grounded by an electric capacity C35；

Both ends of the AIN5 pins and AIN6 pins of the data acquisition chip U1 respectively with an electric capacity C39 are connected, described Node between electric capacity C39 and the AIN5 pins passes sequentially through a resistance R17 and one the 3rd interface and the control chip U2 connections, the node between the resistance R17 and the electric capacity C39 are also grounded by an electric capacity C40, the electric capacity C39 and institute State that the node between AIN2 pins passes sequentially through a resistance R16 and one the 4th interface is connected with the control chip U2, also successively It is connected by the resistance R16 with an interface P2 with REF IN (+) pin of the data acquisition chip U1, the resistance R16 Node between the electric capacity C39 is also grounded by an electric capacity C38；

The data acquisition chip U1 /STANDBY pins are connected with the P2_14 pins of the control chip U2, it is described Data acquisition chip U1 AVDD is grounded by an electric capacity C14, and the DGND ground connection of the data acquisition chip U1, the data are adopted Collection chip U1 DVDD and+3.3V power supply is connected, and the DIN pins of the data acquisition chip U1 are with the control chip U2's P1_24 pins are connected, and the DOUT pins of the data acquisition chip U1 are connected with the P1_23 pins of the control chip U2, institute State data acquisition chip U1 /DRDY pins are connected with the P0_14 pins of the control chip U2, the data acquisition chip U1 / CS pins are connected with the P1_21 pins of the control chip U2, the AGND pins ground connection of the data acquisition chip U1, institute The REF IN (+) for stating data acquisition chip U1 are connected with the sliding end of an adjustable resistance VR2, and the second of the adjustable resistance VR2 End ground connection, first end are connected with+V the pins of a reference voltage source chip U5, and the first end of the adjustable resistance VR2 also passes through one Resistance R28 connects+5V power supplys ,-V pins the ground connection of the reference voltage source chip U5, the reference voltage source chip U5 other Pin is vacant.

Data collecting system circuit of the present utility model, first microcontroller first send control signal to signal condition electricity , it is necessary to gather which sensing data, signal conditioning circuit selects acquisition channel accordingly again on road, then logical by corresponding collection Road outputs signal to data acquisition circuit and transmit after ADC collections/conversion to microcontroller, microcontroller by with host computer Communication send corresponding signal.The structure of the circuit of above-mentioned data collecting system is simple, has multiple optional passages, manufactures Cost is relatively low, applied widely.

Brief description of the drawings

Fig. 1 is the collecting flowchart figure of the utility model data collecting system circuit.

Fig. 2 a and Fig. 2 b are the schematic diagrames of the control chip of the utility model data collecting system circuit.

Fig. 3 is the circuit theory diagrams of signal conditioning circuit in the utility model data collecting system circuit.

Fig. 4 is the circuit theory diagrams of the first sensing circuit in the utility model data collecting system circuit.

Fig. 5 is the circuit theory diagrams of the second sensing circuit in the utility model data collecting system circuit.

Fig. 6 to Fig. 9 is the circuit theory diagrams of data acquisition circuit in the utility model data collecting system circuit.

Embodiment

Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out Clearly and completely describing, it is clear that described embodiment is only the utility model part of the embodiment, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment obtained, belong to the scope of the utility model protection.

Fig. 1 to Fig. 9, data collecting system circuit of the present utility model are referred to, including is connected with upper machine communication micro- Controller (the present embodiment is using RS232 and upper machine communication), the data acquisition unit electrically connected with the microcontroller, it is described Data acquisition unit includes the detection circuit that electrically connect with the microcontroller and detects circuit and microcontroller is equal with described The data acquisition circuit of electrical connection；The microcontroller (is led to using model LPC1788 embedded control chip U2 in accompanying drawing Cross U2A and U2B signs), the control chip U2 has 108 pins, passes through data transfer terminal and the upper machine communication Connection, the control chip U2 are electrically connected by P0_0 and P0_1 pins with detection circuit；The detection circuit includes multiple biographies Inductive circuit and signal conditioning circuit, the signal conditioning circuit have the first transmission end electrically connected with the control chip U2 Son, also has the second transmission terminal electrically connected with the multiple sensing circuit, also has and data acquisition circuit electricity 3rd conveying terminal of connection.

Specifically, Fig. 3 is referred to, the signal conditioning circuit includes the how logical conversion chip U3 using MAX384 models, It has 18 pins, the how logical conversion chip U3 /WR pins ground connection, the A0 pins of the how logical conversion chip U3 and the control Coremaking piece U2 P0_1 pins connection, the P0_0 pins of the A1 pins and the control chip U2 of the how logical conversion chip U3 connect Connect, EN pins of the how logical conversion chip U3 are grounded by an electric capacity C46, with the node of the electric capacity C46 also with+3.3V power supplys Connection, V- pins ground connection of the how logical conversion chip U3, NO1A pins and NO1B pins of the how logical conversion chip U3 are with the One sensing circuit electrically connects, and the NO2A pins and NO2B pins of the how logical conversion chip U3 electrically connect with the second sensing circuit, The COMA pins and COMB pins of the how logical conversion chip U3 electrically connects with the data acquisition circuit, the how logical conversion chip U3 V+ pins are grounded by an electric capacity C45, are also connected with the node of the electric capacity C45 with+3.3V power supplys, the how logical conversion core Piece U3 V- and GND pin is grounded, the how logical conversion chip U3 /RS pins are grounded by an electric capacity C44, with the electric capacity C44 node also+3.3V power supplys connect.

Specifically, Fig. 4 is referred to, first sensing circuit includes the first sensing chip U6 and a high-accuracy voltage base Quasi- chip U4, the first sensing chip U6 model SM5652-001, the model of the high-precision voltage reference chip U4 For MAX6176.First sensing chip U6 and high-precision voltage reference the chip U4 is respectively provided with 8 pins, first sensing Chip U6-Singnal Out pins are connected with the NO1B pins of more logical conversion chip U3, the first sensing chip U6 + Singnal Out pins be connected with the NO1A pins of more logical conversion chip U3 ,-the In of the first sensing chip U6 Pin is grounded, and the first sensing chip U6+In pins are connected with the OUT pins of the high-precision voltage reference chip U4, also logical Electric capacity C14 ground connection is crossed, an electric capacity C13 is connected in parallel with the electric capacity C14, and remaining 4 of the first sensing chip U6 draw Pin is vacant；The IN pins of the high-precision voltage reference chip U4 are grounded by an electric capacity C12, an electric capacity C11 and the electric capacity C12 is connected in parallel, and the node between the electric capacity C11 and electric capacity C12 also connects+15V power supplys, the high-precision voltage reference chip U4 GND pin ground connection, remaining pin of the high-precision voltage reference chip U4 are vacant.

Specifically, refer to Fig. 5, second sensing circuit include the second sensing chip U7, the first operational amplifier U8, Second operational amplifier U9, the NC pins of the first operational amplifier U8 are vacant ,+IN the ends of the first operational amplifier U8 Pass sequentially through a resistance R2, a resistance R1 is connected with the first sensing chip U6+IN ends, between the resistance R2 and resistance R1 Node is grounded by an adjustable resistance VR1, and-IN the pins of the first operational amplifier U8 pass sequentially through a resistance R3, an electricity Hold C47 ground connection ,+VS the pins of the first operational amplifier U8 are connected with+15V power supplys, are also grounded by an electric capacity C18, institute - VS the pins for stating the first operational amplifier U8 are grounded by an electric capacity C19, are also directly connected with power supply -15V power supplys, and described One operational amplifier U8 VOUT pins are connected with+IN the pins of the second operational amplifier U9, also with the electric capacity C47 and Node connection between resistance R3；The NC pins of the second operational amplifier U9 are vacant, the second operational amplifier U9- - IN pin of the IN pins directly with the second sensing chip U7 is connected, and also passes through a resistance and the second sensing chip U7 The connection of Rset pins ,+VS the pins of the second operational amplifier U9 are connected with+15V power supplys, are also connect by an electric capacity C20 The ground,-VS pins of the second operational amplifier U9 are grounded by an electric capacity C21, are also directly connected with power supply -15V power supplys, institute The VOUT pins for stating the second operational amplifier U9 are connected with+IN the pins of the second sensing chip U7；The second sensing core Piece U7 model NPC-1220-015A3S ,+OUT pins be connected with the NO2A pins of more logical conversion chip U3, it is described Second sensing chip U7-OUT pins are connected with the NO2B pins of more logical conversion chip U3.

Specifically, Fig. 6 to Fig. 9 is referred to, the data acquisition circuit includes data acquisition chip U1, the data acquisition Chip U1 model AD7714-3, the data acquisition chip U1 has 24 pins, its SCLK pin and the control core Piece U2 P1_20 pins connection, the MCLK IN pins of the data acquisition chip U1 are grounded by an electric capacity C1, the MCLK IN Pin is connected with the node of the electric capacity C1 with crystal oscillator Y1 first end, and the MCLK OUT pins of the data acquisition chip U1 lead to Cross electric capacity C2 ground connection, node and the crystal oscillator Y1 of the MCLK OUT pins of the data acquisition chip U1 with the electric capacity C2 The connection of the second end, the POL pins ground connection of the data acquisition chip U1, the data acquisition chip U1 /SYNC pins lead to Cross electric capacity C3 ground connection, and+3.3V power supplys also connect with electric capacity C3 node, the data acquisition chip U1 /RESET with The RESET pins connection of the control chip U2, the AIN1 pins and AIN2 pins of the data acquisition chip U1 are respectively with one Electric capacity C42 both ends connection, the node between the electric capacity C42 and the AIN1 pins are led to more by a resistance R13 with described Chip U3 COMA pins connection is converted, the node between the resistance R13 and the electric capacity C42 is also connect by an electric capacity C43 Ground, the COMB that the node between the electric capacity C42 and the AIN2 pins passes through a resistance R12 and more logical conversion chip U3 Pin connects, and REF IN (+) pin for also passing sequentially through a resistance R12 and interface P4 and data acquisition chip U1 connects Connect, the node between the resistance R12 and the electric capacity C42 is also grounded by an electric capacity C41.

Both ends of the AIN3 pins and AIN4 pins of the data acquisition chip U1 respectively with an electric capacity C36 are connected, described Node between electric capacity C36 and the AIN3 pins passes sequentially through a resistance R15 and a first interface and the control chip U2 connections, the node between the resistance R15 and the electric capacity C36 are also grounded by an electric capacity C37, the electric capacity C36 and institute State the node between AIN2 pins and pass sequentially through a resistance R14 and a second interface and be connected with the control chip U2, also according to It is secondary to be connected by a resistance R14 and interface P2 with REF IN (+) pin of the data acquisition chip U1, the resistance Node between R14 and the electric capacity C36 is also grounded by an electric capacity C35.

Both ends of the AIN5 pins and AIN6 pins of the data acquisition chip U1 respectively with an electric capacity C39 are connected, described Node between electric capacity C39 and the AIN5 pins passes sequentially through a resistance R17 and one the 3rd interface and the control chip U2 connections, the node between the resistance R17 and the electric capacity C39 are also grounded by an electric capacity C40, the electric capacity C39 and institute State that the node between AIN2 pins passes sequentially through a resistance R16 and one the 4th interface is connected with the control chip U2, also successively It is connected by the resistance R16 with an interface P2 with REF IN (+) pin of the data acquisition chip U1, the resistance R16 Node between the electric capacity C39 is also grounded by an electric capacity C38.

The data acquisition chip U1 /STANDBY pins are connected with the P2_14 pins of the control chip U2, it is described Data acquisition chip U1 AVDD is grounded by an electric capacity C14, and the DGND ground connection of the data acquisition chip U1, the data are adopted Collection chip U1 DVDD and+3.3V power supply is connected, and the DIN pins of the data acquisition chip U1 are with the control chip U2's P1_24 pins are connected, and the DOUT pins of the data acquisition chip U1 are connected with the P1_23 pins of the control chip U2, institute State data acquisition chip U1 /DRDY pins are connected with the P0_14 pins of the control chip U2, the data acquisition chip U1 / CS pins are connected with the P1_21 pins of the control chip U2, the AGND pins ground connection of the data acquisition chip U1, institute The REF IN (+) for stating data acquisition chip U1 are connected with the sliding end of an adjustable resistance VR2, and the second of the adjustable resistance VR2 End ground connection, first end are connected with+V the pins of a reference voltage source chip U5, and the model that the reference voltage source chip uses is AD5819JRZ, the adjustable resistance VR2 first end also connect+5V power supplys, the reference voltage source chip by a resistance R28 U5-V pins ground connection, other pins of the reference voltage source chip U5 are vacant.

In the present embodiment, the data acquisition circuit also includes an electric capacity C5 and electric capacity C6, one end of the electric capacity C5 It is connected with the DVDD pins of the data acquisition chip U1, other end ground connection, the electric capacity C6 is connected in parallel with the electric capacity C5, And the node between electric capacity C6 and the electric capacity C5 is also connected with+3.3V power supplys.

The data acquisition circuit also includes an electric capacity C7 and electric capacity C8, the electric capacity C7 first end and the REF IN (+) pin is connected, and the second end ground connection, the electric capacity C8 is connected in parallel with the electric capacity C7.

The data acquisition circuit also includes an electric capacity C9 and electric capacity C10, the electric capacity C9 one end connect with+5V power supplys Connect, other end ground connection, the electric capacity C10 is connected in parallel with the electric capacity C9.

Data collecting system circuit of the present utility model, from the portability of data collecting system instrument and the spy of analysis object Sign considers, devises a set of Portable Data-Acquisition System.Because the structure of instrument is simple, therefore portable performance is good, strong antijamming capability, is suitable for quick Analysis and compared with being used in adverse circumstances.AD7714 applies to the full simulation front end of low frequency measurement application.Device is directly from biography Sensor receives low voltage signal and exports serial digital.It using and-poor (sigma-delta) switch technology to realize up to 24 Position without error performance.Input signal adds to the proprietary front end based on analog modulator, with programmable-gain.Modulator Output is handled by digital filter in piece.The 1st recess of this digital filter can be programmed, permitted by control register in piece Perhaps cut-off frequency and the stabilization time of wave filter are adjusted.

The data collecting system circuit of the present embodiment, although above-mentioned only describe two sensors to realize collection, In other embodiments, more than two sensing circuits can be used according to demand, such as in addition to above-mentioned pressure sensor circuit, also Flow, speed and/or acceleration sensing circuit can be increased, so as to realize the collection of a variety of data.The utility model embodiment, it is first First microcontroller first sends control signal to signal conditioning circuit, it is necessary to gather which sensing data, signal conditioning circuit is again Acquisition channel is selected accordingly, and then outputing signal to data acquisition circuit by corresponding acquisition channel carries out ADC collections/conversion After transmit to microcontroller, microcontroller corresponding signal sent by the communication with host computer.Above-mentioned data collecting system Circuit structure it is simple, there are multiple optional passages, manufacturing cost is relatively low, applied widely.

Embodiment of the present utility model is these are only, not thereby limits the scope of the claims of the present utility model, every profit The equivalent structure or equivalent flow conversion made with the utility model specification and accompanying drawing content, or directly or indirectly it is used in it The technical field of his correlation, is similarly included in scope of patent protection of the present utility model.

Claims (5)

1. a kind of data collecting system circuit, including be connected with upper machine communication microcontroller, be electrically connected with the microcontroller The data acquisition unit connect, it is characterised in that：The data acquisition unit includes the detection electricity electrically connected with the microcontroller Road and the data acquisition circuit electrically connected with the detection circuit and microcontroller；The microcontroller uses model LPC1788 embedded control chip U2, the control chip U2 has 108 pins, by data transfer terminal with it is described Upper machine communication is connected, and the control chip U2 is electrically connected by P0_0 and P0_1 pins with detection circuit；The detection circuit Including multiple sensing circuits and signal conditioning circuit, the signal conditioning circuit has what is electrically connected with the control chip U2 First transmission terminal, also there is the second transmission terminal electrically connected with the multiple sensing circuit, also have and the data 3rd conveying terminal of Acquisition Circuit electrical connection.

2. data collecting system circuit as claimed in claim 1, it is characterised in that：The signal conditioning circuit includes using The how logical conversion chip U3 of MAX384 models, it has 18 pins, the how logical conversion chip U3 /WR pins ground connection, this is more Logical conversion chip U3 A0 pins be connecteds with the P0_1 pins of the control chip U2, the how logical A1 pins for converting chip U3 and The P0_0 pins connection of the control chip U2, EN pins of the how logical conversion chip U3 are grounded by an electric capacity C46, and described Electric capacity C46 node is also connected with+3.3V power supplys, the V- pins ground connection of the how logical conversion chip U3, the how logical conversion chip U3 NO1A pins and NO1B pins electrically connected with the first sensing circuit, NO2A pins and NO2B of the how logical conversion chip U3 draw Pin electrically connects with the second sensing circuit, COMA pins and COMB pins of the how logical conversion chip U3 with the data acquisition Circuit is electrically connected, and V+ pins of the how logical conversion chip U3 are grounded by an electric capacity C45, with the node of the electric capacity C45 also with+ 3.3V power supplys are connected, and V- and GND pin of the how logical conversion chip U3 are grounded, the how logical conversion chip U3 /RS pins lead to Electric capacity C44 ground connection is crossed, is connected with the node also+3.3V power supplys of the electric capacity C44.

3. data collecting system circuit as claimed in claim 2, it is characterised in that：First sensing circuit includes first and passed Sense chip U6 and high-precision voltage reference chip a U4, the first sensing chip U6 and high-precision voltage reference chip U4 are equal With 8 pins, the NO1B of-Singnal Out pins of the first sensing chip U6 and more logical conversion chip U3 draws Pin connects, and the NO1A pins of+Singnal Out pins of the first sensing chip U6 and more logical conversion chip U3 connect Connect ,-In pins the ground connection of the first sensing chip U6, the first sensing chip U6+In pins and the high-accuracy voltage base Quasi- chip U4 OUT pins connection, is also grounded, an electric capacity C13 is connected in parallel with the electric capacity C14, described by an electric capacity C14 First sensing chip U6 remaining 4 pin are vacant；The IN pins of the high-precision voltage reference chip U4 pass through an electric capacity C12 Ground connection, an electric capacity C11 are connected in parallel with the electric capacity C12, and the node between the electric capacity C11 and electric capacity C12 also connects+15V electricity Source, the GND pin ground connection of the high-precision voltage reference chip U4, remaining pin of the high-precision voltage reference chip U4 are empty Put.

4. data collecting system circuit as claimed in claim 2, it is characterised in that：Second sensing circuit includes second and passed Sense chip U7, the first operational amplifier U8, the second operational amplifier U9, the NC pins of the first operational amplifier U8 are vacant, + IN the ends that+IN the ends of the first operational amplifier U8 pass sequentially through a resistance R2, a resistance R1 and the first sensing chip U6 connect Connecing, the node between the resistance R2 and resistance R1 is grounded by an adjustable resistance VR1, the first operational amplifier U8- IN pins pass sequentially through a resistance R3, an electric capacity C47 ground connection ,+VS pins and the+15V power supplys of the first operational amplifier U8 Connection, also it is grounded by an electric capacity C18, the VOUT pins of the first operational amplifier U8 and the second operational amplifier U9 + IN pins connection, also the node between the electric capacity C47 and resistance R3 is connected；The NC of the second operational amplifier U9 Pin is vacant, and-IN the pins of-IN the pins of the second operational amplifier U9 directly with the second sensing chip U7 are connected, Also it is connected by a resistance R4 with the Rset pins of the second sensing chip U7 ,+the VS of the second operational amplifier U9 draws Pin is connected with+15V power supplys, is also grounded by an electric capacity C20, the VOUT pins and described second of the second operational amplifier U9 Sensing chip U7+IN pins connection；+ OUT the pins of the second sensing chip U7 are with more logical conversion chip U3's NO2A pins are connected, and-OUT the pins of the second sensing chip U7 are connected with the NO2B pins of more logical conversion chip U3.

5. data collecting system circuit as claimed in claim 4, it is characterised in that：The data acquisition circuit is adopted including data Collecting chip U1, the data acquisition chip U1 has 24 pins, the P1_20 pins of its SCLK pin and the control chip U2 Connection, the MCLK IN pins of the data acquisition chip U1 are grounded by an electric capacity C1, the MCLK IN pins and the electric capacity C1 node is connected with crystal oscillator Y1 first end, and the MCLK OUT pins of the data acquisition chip U1 are connect by an electric capacity C2 Ground, the MCLK OUT pins of the data acquisition chip U1 connect with the node of the electric capacity C2 and the second end of the crystal oscillator Y1 Connect, the POL pins of data acquisition chip U1 ground connection, the data acquisition chip U1 /SYNC pins pass through an electric capacity C3 Ground connection, and+3.3V power supplys are also connect with electric capacity C3 node, the data acquisition chip U1 /RESET and the control core Piece U2 RESET pins connection, the AIN1 pins and AIN2 pins of the data acquisition chip U1 respectively with an electric capacity C42 two End connection, the node between the electric capacity C42 and the AIN1 pins is by a resistance R13 with more logical conversion chip U3's COMA pins are connected, and the node between the resistance R13 and the electric capacity C42 is also grounded by an electric capacity C43, the electric capacity Node between C42 and the AIN2 pins is connected by a resistance R12 with the COMB pins of more logical conversion chip U3, also Pass sequentially through the resistance R12 and an interface P4 to be connected with REF IN (+) pin of the data acquisition chip U1, the resistance Node between R12 and the electric capacity C42 is also grounded by an electric capacity C41；

Both ends of the AIN3 pins and AIN4 pins of the data acquisition chip U1 respectively with an electric capacity C36 are connected, the electric capacity Node between C36 and the AIN3 pins passes sequentially through a resistance R15 and a first interface and connected with the control chip U2 Connect, the node between the resistance R15 and the electric capacity C36 also by an electric capacity C37 be grounded, the electric capacity C36 with it is described Node between AIN2 pins passes sequentially through a resistance R14 and a second interface and is connected with the control chip U2, also successively It is connected by a resistance R14 and interface P2 with REF IN (+) pin of the data acquisition chip U1, the resistance R14 Node between the electric capacity C36 is also grounded by an electric capacity C35；

Both ends of the AIN5 pins and AIN6 pins of the data acquisition chip U1 respectively with an electric capacity C39 are connected, the electric capacity Node between C39 and the AIN5 pins passes sequentially through a resistance R17 and one the 3rd interface and connected with the control chip U2 Connect, the node between the resistance R17 and the electric capacity C39 also by an electric capacity C40 be grounded, the electric capacity C39 with it is described Node between AIN2 pins passes sequentially through a resistance R16 and one the 4th interface is connected with the control chip U2, also leads to successively The resistance R16 is crossed to be connected with an interface P2 with REF IN (+) pin of the data acquisition chip U1, the resistance R16 with Node between the electric capacity C39 is also grounded by an electric capacity C38；

The data acquisition chip U1 /STANDBY pins are connected with the P2_14 pins of the control chip U2, the data Acquisition chip U1 AVDD is grounded by an electric capacity C14, the DGND ground connection of the data acquisition chip U1, the data acquisition core Piece U1 DVDD and+3.3V power supply is connected, the P1_24 of the DIN pins of the data acquisition chip U1 and the control chip U2 Pin is connected, and the DOUT pins of the data acquisition chip U1 are connected with the P1_23 pins of the control chip U2, the data Acquisition chip U1 /DRDY pins are connected with the P0_14 pins of the control chip U2, the data acquisition chip U1 /CS Pin is connected with the P1_21 pins of the control chip U2, the AGND pins ground connection of the data acquisition chip U1, the data Acquisition chip U1 REF IN (+) are connected with the sliding end of an adjustable resistance VR2, the second end ground connection of the adjustable resistance VR2, First end is connected with+V the pins of a reference voltage source chip U5, and the first end of the adjustable resistance VR2 also passes through a resistance R28 Connect+5V the power supplys ,-V pins ground connection of the reference voltage source chip U5, other pins sky of the reference voltage source chip U5 Put.