CN206611390U - A kind of analog front circuit for physiology potential signal detection - Google Patents

A kind of analog front circuit for physiology potential signal detection Download PDF

Info

Publication number
CN206611390U
CN206611390U CN201720356122.3U CN201720356122U CN206611390U CN 206611390 U CN206611390 U CN 206611390U CN 201720356122 U CN201720356122 U CN 201720356122U CN 206611390 U CN206611390 U CN 206611390U
Authority
CN
China
Prior art keywords
input
drain
path
amplifier
potential signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201720356122.3U
Other languages
Chinese (zh)
Inventor
陈铖颖
陈纲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hi Tech Core (beijing) Technology Co Ltd
Original Assignee
Hi Tech Core (beijing) Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hi Tech Core (beijing) Technology Co Ltd filed Critical Hi Tech Core (beijing) Technology Co Ltd
Priority to CN201720356122.3U priority Critical patent/CN206611390U/en
Application granted granted Critical
Publication of CN206611390U publication Critical patent/CN206611390U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Amplifiers (AREA)

Abstract

The utility model is related to a kind of analog front circuit for physiology potential signal detection, including:Amplifier 100 and gradually-appoximant analog-digital converter 110, wherein, amplifier 100 is used to amplify physiology electric potential signal, and gradually-appoximant analog-digital converter 110 is used to the physiology electric potential signal after amplification being converted to digital code, exports to digital signal processing platform.The technical solution of the utility model, common mode path 1001a produces common mode input Vcm, Vcm and trsanscondutance amplifier is biased by common mode path 1001b, the input transistors of trsanscondutance amplifier is operated in sub-threshold region;The closed loop gain of input capacitance Cin1 and feedback capacity Cf ratio formation amplifier;Input capacitance Cin2 will input common mode node to be isolated with trsanscondutance amplifier negative input;Feedback network 1004 constitutes closed loop gain level structure with trsanscondutance amplifier;Feedback network has high pass characteristic, has filtered out the DC offset voltage in physiology electric potential signal, realizes the fully integrated of amplifier.

Description

Analog front-end circuit for physiological potential signal detection
Technical Field
The utility model relates to a CMOS analog integrated circuit design field, concretely relates to analog front end circuit for biopotential signal detects.
Background
In recent years, with the development of microelectronic technology and biological monitoring technology, wearable medical devices gradually enter people's daily life. As a first-level circuit and an important component in a core chip of the wearable medical equipment, the power consumption, the signal-to-noise ratio and other performances of the analog front-end circuit directly determine the working time and the detection precision of the system.
The frequency of the biopotential signal is typically below 500Hz and the signal amplitude is only a few hundred microvolts. The physiological potential signal contains direct current offset voltage of dozens of millivolts to hundreds of millivolts. Therefore, in order to filter the dc offset voltage, a dc blocking capacitor is connected in series to the input terminal of the analog front end in the conventional design. However, the capacitance is generally over 10 microfarads, the area is very large, and monolithic integration of the capacitor and the chip cannot be realized. Meanwhile, in order to meet the requirement of digital signal processing in a chip, an analog-to-digital converter in an analog front end needs to have effective precision of at least 10 bits. More importantly, the wearable device is powered by a battery, and the amplifier and the analog-to-digital converter must be designed with low power consumption so as to meet the long-time standby requirement.
SUMMERY OF THE UTILITY MODEL
In view of this, the present invention provides an analog front-end circuit for physiological potential signal detection to overcome the deficiencies of the prior art, so as to solve the problems of the prior art: 1) the problem that the single chip integration of the capacitor and the chip cannot be realized due to the use of the DC blocking capacitor; 2) the problem of high power consumption of the amplifier; 3) the contradiction between the sampling precision and the low power consumption requirement of the analog-to-digital converter.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
an analog front end circuit for biopotential signal detection, comprising: an amplifier 100 and a successive approximation analog-to-digital converter 110, wherein,
the amplifier 100 is configured to amplify the physiological potential signal, and the successive approximation analog-to-digital converter 110 is configured to convert the amplified physiological potential signal into a digital code and output the digital code to a digital signal processing platform;
the amplifier 100 comprises a transconductance amplifier, an input capacitor Cin1, an input capacitor Cin2, a common mode path 1001a, a common mode path 1001b, an input path 1002, an output path 1003 and a feedback path 1004, wherein an input signal is connected with one polar plate of the input capacitor Cin1 through the input path 1002, and the other polar plate of the input capacitor Cin1 is connected with a non-inverting input end of the transconductance amplifier; one end of the common mode path 1001a is externally connected with a power supply, and the other end of the common mode path is connected with the inverting input end of the transconductance amplifier through an input capacitor Cin 2; the common mode path 1001b is connected in parallel across the input capacitor Cin 2; an output path 1003 is connected to the output of the transconductance amplifier, and one end of a feedback path 1004 is connected to the non-inverting input of the transconductance amplifier, and the other end is connected to the output path 1003.
Preferably, the common mode path 1001a includes: resistors R1, R2 and R3, wherein the resistors R1 and R2 are connected in series between the power supply and the ground; one end of the resistor R3 is connected between the resistors R1 and R2, and the other end is connected to the input capacitor Cin 2.
Preferably, the resistances of the resistors R1, R2 and R3 are equal.
Preferably, the common mode path 1001b includes: the circuit comprises a common-mode input capacitor Cb and field-effect transistors M1 and M2, wherein the field-effect transistors M1 and M2 are connected in series, and the series circuit is connected with the common-mode input capacitor Cb in parallel.
Preferably, the feedback path 1004 includes: feedback capacitance Cf, field effect transistors M3 and M4, wherein the field effect transistors M3 and M4 are connected in series, and the circuit after series connection is connected with the feedback capacitance Cf in parallel.
Preferably, the transconductance amplifier comprises: NMOS transistors NM1, NM2, NM3, NM4, and NM5, PMOS transistors PM1, PM2, PM3, PM4, and PM5, wherein,
the grid electrode and the drain electrode of the NMOS transistor NM5 are connected, then externally connected with a bias current Iin, and the source electrode is grounded; the gate of the NMOS transistor NM4 is connected to the gate of the NMOS transistor NM5, the source is grounded, and the drain is connected to the drain of the PMOS transistor PM 3; the grid electrode of the PMOS transistor PM3 is connected with the drain electrode to form diode connection, and the source electrode is connected with the power supply VDD; the grid electrode of the PMOS transistor PM4 is connected with the grid electrode of the PM3, the bias voltage is input, the source electrode is connected with the power supply VDD, and the drain electrode is connected with the source electrodes of the PMOS input transistors PM1 and PM 2; gates of the PMOS transistors PM1 and PM2 input a negative-going input signal VIN and a positive-going input signal VIP, respectively, a drain of the PMOS transistor PM1 is connected to a drain of the NMOS transistor NM1, and a drain of the PMOS transistor PM2 is connected to a drain of the NMOS transistor NM 2; the grid and the drain of the NM1 are connected to form a diode connection, and the source is grounded; the grid electrode of NM2 is connected with the grid electrode of NM1, and the source electrode is grounded; the source electrode of the PMOS transistor PM5 is connected with a power supply VDD, the grid electrode of the PMOS transistor PM4 is connected with the grid electrode of the PMOS transistor PM4, and the drain electrode of the PMOS transistor PM5 is connected with the drain electrode of the NMOS transistor NM 3; the drain of the NMOS transistor NM3 is connected to the drain of the PMOS transistor PM5, the gate is connected to the drain of NM2, and the source is grounded;
the drain of the PMOS transistor PM5 is the output Vo of the transconductance amplifier.
Preferably, the transconductance amplifier further comprises: and the compensation capacitor Cc and the compensation resistor Rc are connected in series, one end of the series circuit is connected with the drain of the NMOS transistor NM2, and the other end of the series circuit is connected with the drain of the NMOS transistor NM 3.
Preferably, the transconductance amplifier further comprises a load capacitor CL, one plate of the load capacitor CL is connected to the output Vo of the transconductance amplifier, and the other plate is grounded; the load capacitor CL is used to adjust the bandwidth of the transconductance amplifier.
Preferably, the PMOS transistors PM1 and PM2 operate in the sub-threshold region.
Preferably, the NMOS transistors NM1, NM2, NM3, NM4 and NM5 have the same structure and model, and the PMOS transistors PM1, PM2, PM3, PM4 and PM5 have the same structure and model.
The utility model adopts the above technical scheme, possess following beneficial effect at least:
it can be understood that, in the analog front-end circuit for physiological potential signal detection provided by the present invention, the common mode path 1001a generates the input common mode voltage Vcm, and the input common mode voltage Vcm biases the transconductance amplifier through the common mode path 1001b, so that the input transistor of the transconductance amplifier operates in the sub-threshold region; the ratio of the input capacitance Cin1 to the feedback capacitance Cf forms the closed loop gain of the amplifier; the input common mode node is isolated from the negative input end of the transconductance amplifier by an input capacitor Cin 2; the feedback path 1004 and the transconductance amplifier form a closed-loop gain stage structure; the feedback path has high-pass characteristic, so that the direct-current offset voltage in the physiological potential signal is filtered, the problem of serially connecting a DC blocking capacitor outside a chip is solved, and the full integration of the amplifier is realized.
In addition, the utility model provides an analog front end circuit for physiological potential signal detection, through use the input transistor PM1 and PM2 who work in the subthreshold region in transconductance amplifier for PM1, PM2 have very low power consumption, and the rest transistor works in the saturation region again, have guaranteed the stability of circuit; by adopting a successive approximation analog-to-digital converter in the analog front end, a physiological potential signal can be directly quantized and coded under extremely low power consumption and output to a digital signal processing platform for processing; practice proves, the utility model provides a this kind of an analog front end circuit for biopotential signal detection, the output signal precision reaches more than 78dB, has obtained the SNR output more than 10bit when realizing the extremely low consumption of circuit, has advantages such as precision height, good reliability, low power dissipation, is applicable to the application of biopotential signal detection chip.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic circuit diagram of an analog front-end circuit for biopotential signal detection according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a transconductance amplifier according to an embodiment of the present invention;
fig. 3 is a frequency spectrum diagram of an output signal of the analog front-end circuit for detecting a biopotential signal according to an embodiment of the present invention, when a power supply voltage is 1.8V, an input signal is a sinusoidal signal with a frequency of 45Hz and an amplitude of 600 μ V, and a clock frequency is 1.25 kHz.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be described in detail below. It is to be understood that the embodiments described are only some embodiments of the invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
The technical solution of the present invention is further described in detail by the accompanying drawings and examples.
Referring to fig. 1, an embodiment of the present invention provides an analog front-end circuit for biopotential signal detection, including: an amplifier 100 and a successive approximation analog-to-digital converter 110, wherein,
the amplifier 100 is configured to amplify the physiological potential signal, and the successive approximation analog-to-digital converter 110 is configured to convert the amplified physiological potential signal into a digital code and output the digital code to a digital signal processing platform; wherein,
referring to fig. 2, the amplifier 100 includes a transconductance amplifier, an input capacitor Cin1, an input capacitor Cin2, a common mode path 1001a, a common mode path 1001b, an input path 1002, an output path 1003, and a feedback path 1004, wherein an input signal is connected to one plate of the input capacitor Cin1 through the input path 1002, and the other plate of the input capacitor Cin1 is connected to a non-inverting input terminal of the transconductance amplifier; one end of the common mode path 1001a is externally connected with a power supply, and the other end of the common mode path is connected with the inverting input end of the transconductance amplifier through an input capacitor Cin 2; the common mode path 1001b is connected in parallel across the input capacitor Cin 2; an output path 1003 is connected to the output of the transconductance amplifier, and one end of a feedback path 1004 is connected to the non-inverting input of the transconductance amplifier, and the other end is connected to the output path 1003.
It can be understood that by adopting the successive approximation analog-to-digital converter, the power consumption can be saved, and the output signal-to-noise ratio of more than 10 bits can be realized.
Preferably, the common mode path 1001a includes: resistors R1, R2 and R3, wherein the resistors R1 and R2 are connected in series between the power supply and the ground; one end of the resistor R3 is connected between the resistors R1 and R2, and the other end is connected to the input capacitor Cin 2.
Preferably, the resistances of the resistors R1, R2 and R3 are equal.
Preferably, the common mode path 1001b includes: the circuit comprises a common-mode input capacitor Cb and field-effect transistors M1 and M2, wherein the field-effect transistors M1 and M2 are connected in series, and the series circuit is connected with the common-mode input capacitor Cb in parallel.
Preferably, the feedback path 1004 includes: feedback capacitance Cf, field effect transistors M3 and M4, wherein the field effect transistors M3 and M4 are connected in series, and the circuit after series connection is connected with the feedback capacitance Cf in parallel.
It can be understood that, in the analog front-end circuit for physiological potential signal detection provided by the present invention, the common mode path 1001a generates the input common mode voltage Vcm, and the input common mode voltage Vcm biases the transconductance amplifier through the common mode path 1001b, so that the input transistor of the transconductance amplifier operates in the sub-threshold region, and has extremely small power consumption; the ratio of the input capacitance Cin1 to the feedback capacitance Cf forms the closed loop gain of the amplifier; the input common mode node is isolated from the negative input end of the transconductance amplifier by an input capacitor Cin 2; the feedback path 1004 and the transconductance amplifier form a closed-loop gain stage structure; the feedback path has low-frequency cut-off frequency, forms high-pass characteristic, filters out direct-current offset voltage in the physiological potential signal, and realizes full integration of the amplifier. When the amplifier inputs a sine wave signal, the feedback path 1004 filters out the dc component therein, only retains the ac component therein, and applies a new dc common mode component through the common mode path 1001 b. The amplifier amplifies the sine wave signal by Cin1/Cf times, and outputs a sine wave signal centered on the common mode voltage Vcm.
Preferably, the transconductance amplifier comprises: NMOS transistors NM1, NM2, NM3, NM4, and NM5, PMOS transistors PM1, PM2, PM3, PM4, and PM5, wherein,
the grid electrode and the drain electrode of the NMOS transistor NM5 are connected, then externally connected with a bias current Iin, and the source electrode is grounded; the gate of the NMOS transistor NM4 is connected to the gate of the NMOS transistor NM5, the source is grounded, and the drain is connected to the drain of the PMOS transistor PM 3; the grid electrode of the PMOS transistor PM3 is connected with the drain electrode to form diode connection, and the source electrode is connected with the power supply VDD; the grid electrode of the PMOS transistor PM4 is connected with the grid electrode of the PM3, the bias voltage is input, the source electrode is connected with the power supply VDD, and the drain electrode is connected with the source electrodes of the PMOS input transistors PM1 and PM 2; gates of the PMOS transistors PM1 and PM2 input a negative-going input signal VIN and a positive-going input signal VIP, respectively, a drain of the PMOS transistor PM1 is connected to a drain of the NMOS transistor NM1, and a drain of the PMOS transistor PM2 is connected to a drain of the NMOS transistor NM 2; the grid and the drain of the NM1 are connected to form a diode connection, and the source is grounded; the grid electrode of NM2 is connected with the grid electrode of NM1, and the source electrode is grounded; the source electrode of the PMOS transistor PM5 is connected with a power supply VDD, the grid electrode of the PMOS transistor PM4 is connected with the grid electrode of the PMOS transistor PM4, and the drain electrode of the PMOS transistor PM5 is connected with the drain electrode of the NMOS transistor NM 3; the drain of the NMOS transistor NM3 is connected to the drain of the PMOS transistor PM5, the gate is connected to the drain of NM2, and the source is grounded;
the drain of the PMOS transistor PM5 is the output Vo of the transconductance amplifier.
Preferably, the transconductance amplifier further comprises: and the compensation capacitor Cc and the compensation resistor Rc are connected in series, one end of the series circuit is connected with the drain of the NMOS transistor NM2, and the other end of the series circuit is connected with the drain of the NMOS transistor NM 3.
Preferably, the transconductance amplifier further comprises a load capacitor CL, one plate of the load capacitor CL is connected to the output Vo of the transconductance amplifier, and the other plate is grounded; the load capacitor CL is used to adjust the bandwidth of the transconductance amplifier.
Preferably, the PMOS transistors PM1 and PM2 operate in the sub-threshold region.
It will be appreciated that the PMOS input transistors PM1 and PM2 are configured to operate in the sub-threshold region, with very low power consumption, reducing the power consumption of the overall circuit,
preferably, the NMOS transistors NM1, NM2, NM3, NM4 and NM5 have the same structure and model, and the PMOS transistors PM1, PM2, PM3, PM4 and PM5 have the same structure and model.
Preferably, the successive approximation analog-to-digital converter can be exemplified by a 10bit/1.25kHz successive approximation analog-to-digital converter structure. The input signal is a sine wave signal which is amplified by Cin/Cf times and takes a common mode voltage Vcm as a center, and standard binary digital codes are output through the quantization and the coding of a successive approximation analog-to-digital converter.
In order to further clarify the utility model discloses an important meaning and the beneficial technological effect of the utility model, specially select the power supply voltage to be 1.8V, and input signal frequency is 45Hz, the sinusoidal signal that the range is 600 mu V, and clock frequency is 1.25kHz and inputs the utility model provides a this kind of analog front end circuit for physiological potential signal detects verifies. Fig. 3 shows the result of the spectrum analysis of the output signal of the analog front-end circuit for biopotential signal detection according to the present invention. As shown in FIG. 3, the utility model provides a this kind of an analog front end circuit for biopotential signal detection, to above-mentioned input signal after enlargeing, the spectrum analysis result of 10bit 1.25kHz successive approximation analog-to-digital converter output shows that the output signal-to-noise ratio is more than 78dB, and effective accuracy 9.4bit, the consumption only has 76 microwatts, and technological effect is good.
To sum up, the utility model provides an analog front end circuit for biopotential signal detection has following advantage: (1) the amplifier and a successive approximation analog-digital converter structure are adopted, the amplifier forms a high-pass signal path through a built-in feedback path, the direct-current offset voltage in a physiological potential signal is eliminated, the problem of series connection of a DC blocking capacitor outside a chip is solved, and the full integration of a circuit is realized; (2) by using the input transistors PM1 and PM2 which work in a subthreshold region in the transconductance amplifier, the PM1 and PM2 have very low power consumption, and the rest transistors work in a saturation region, so that the stability of the circuit is ensured; (3) by adopting a successive approximation analog-to-digital converter in the analog front end, a physiological potential signal can be directly quantized and coded under extremely low power consumption and output to a digital signal processing platform for processing; (4) the precision of the output signal of the integrated analog front-end circuit reaches more than 78dB, the signal to noise ratio output of more than 10bit is obtained while the extremely low power consumption of the circuit is realized, and the circuit has the advantages of high precision, strong reliability, low power consumption and the like, and is suitable for application of a physiological potential signal detection chip.
The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and all should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims. The terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The term "plurality" means two or more unless expressly limited otherwise.

Claims (10)

1. An analog front-end circuit for biopotential signal detection, comprising: an amplifier 100 and a successive approximation analog-to-digital converter 110, wherein,
the amplifier 100 is configured to amplify the physiological potential signal, and the successive approximation analog-to-digital converter 110 is configured to convert the amplified physiological potential signal into a digital code and output the digital code to a digital signal processing platform;
the amplifier 100 comprises a transconductance amplifier, an input capacitor Cin1, an input capacitor Cin2, a common mode path 1001a, a common mode path 1001b, an input path 1002, an output path 1003 and a feedback path 1004, wherein an input signal is connected with one polar plate of the input capacitor Cin1 through the input path 1002, and the other polar plate of the input capacitor Cin1 is connected with a non-inverting input end of the transconductance amplifier; one end of the common mode path 1001a is externally connected with a power supply, and the other end of the common mode path is connected with the inverting input end of the transconductance amplifier through an input capacitor Cin 2; the common mode path 1001b is connected in parallel across the input capacitor Cin 2; an output path 1003 is connected to the output of the transconductance amplifier, and one end of a feedback path 1004 is connected to the non-inverting input of the transconductance amplifier, and the other end is connected to the output path 1003.
2. The analog front-end circuit for physiological potential signal detection according to claim 1, wherein the common-mode path 1001a includes: resistors R1, R2 and R3, wherein the resistors R1 and R2 are connected in series between the power supply and the ground; one end of the resistor R3 is connected between the resistors R1 and R2, and the other end is connected to the input capacitor Cin 2.
3. The analog front-end circuit for physiological potential signal detection according to claim 2, wherein the resistances of the resistors R1, R2 and R3 are equal.
4. The analog front-end circuit for physiological potential signal detection according to claim 1, wherein the common-mode path 1001b includes: the circuit comprises a common-mode input capacitor Cb and field-effect transistors M1 and M2, wherein the field-effect transistors M1 and M2 are connected in series, and the series circuit is connected with the common-mode input capacitor Cb in parallel.
5. The analog front-end circuit for physiological potential signal detection of claim 1, wherein the feedback path 1004 comprises: feedback capacitance Cf, field effect transistors M3 and M4, wherein the field effect transistors M3 and M4 are connected in series, and the circuit after series connection is connected with the feedback capacitance Cf in parallel.
6. The analog front-end circuit for physiological potential signal detection according to any one of claims 1 to 5, wherein the transconductance amplifier comprises: NMOS transistors NM1, NM2, NM3, NM4, and NM5, PMOS transistors PM1, PM2, PM3, PM4, and PM5, wherein,
the grid electrode and the drain electrode of the NMOS transistor NM5 are connected, then externally connected with a bias current Iin, and the source electrode is grounded; the gate of the NMOS transistor NM4 is connected to the gate of the NMOS transistor NM5, the source is grounded, and the drain is connected to the drain of the PMOS transistor PM 3; the grid electrode of the PMOS transistor PM3 is connected with the drain electrode to form diode connection, and the source electrode is connected with the power supply VDD; the grid electrode of the PMOS transistor PM4 is connected with the grid electrode of the PM3, the bias voltage is input, the source electrode is connected with the power supply VDD, and the drain electrode is connected with the source electrodes of the PMOS input transistors PM1 and PM 2; gates of the PMOS transistors PM1 and PM2 input a negative-going input signal VIN and a positive-going input signal VIP, respectively, a drain of the PMOS transistor PM1 is connected to a drain of the NMOS transistor NM1, and a drain of the PMOS transistor PM2 is connected to a drain of the NMOS transistor NM 2; the grid and the drain of the NM1 are connected to form a diode connection, and the source is grounded; the grid electrode of NM2 is connected with the grid electrode of NM1, and the source electrode is grounded; the source electrode of the PMOS transistor PM5 is connected with a power supply VDD, the grid electrode of the PMOS transistor PM4 is connected with the grid electrode of the PMOS transistor PM4, and the drain electrode of the PMOS transistor PM5 is connected with the drain electrode of the NMOS transistor NM 3; the drain of the NMOS transistor NM3 is connected to the drain of the PMOS transistor PM5, the gate is connected to the drain of NM2, and the source is grounded;
the drain of the PMOS transistor PM5 is the output Vo of the transconductance amplifier.
7. The analog front-end circuit for physiological potential signal detection according to claim 6, wherein the transconductance amplifier further comprises: and the compensation capacitor Cc and the compensation resistor Rc are connected in series, one end of the series circuit is connected with the drain of the NMOS transistor NM2, and the other end of the series circuit is connected with the drain of the NMOS transistor NM 3.
8. The analog front-end circuit for biopotential signal detection of claim 6 wherein said transconductance amplifier further comprises a load capacitor CL having one plate connected to the output Vo of said transconductance amplifier and the other plate connected to ground; the load capacitor CL is used to adjust the bandwidth of the transconductance amplifier.
9. The analog front-end circuit for physiological potential signal detection according to claim 6, wherein the PMOS transistors PM1 and PM2 operate in a sub-threshold region.
10. The analog front-end circuit for physiological potential signal detection according to claim 6, wherein the NMOS transistors NM1, NM2, NM3, NM4 and NM5 are identical in structure and model, and the PMOS transistors PM1, PM2, PM3, PM4 and PM5 are identical in structure and model.
CN201720356122.3U 2017-04-06 2017-04-06 A kind of analog front circuit for physiology potential signal detection Active CN206611390U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201720356122.3U CN206611390U (en) 2017-04-06 2017-04-06 A kind of analog front circuit for physiology potential signal detection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201720356122.3U CN206611390U (en) 2017-04-06 2017-04-06 A kind of analog front circuit for physiology potential signal detection

Publications (1)

Publication Number Publication Date
CN206611390U true CN206611390U (en) 2017-11-03

Family

ID=60174147

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201720356122.3U Active CN206611390U (en) 2017-04-06 2017-04-06 A kind of analog front circuit for physiology potential signal detection

Country Status (1)

Country Link
CN (1) CN206611390U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106877830A (en) * 2017-04-06 2017-06-20 高科创芯(北京)科技有限公司 A kind of analog front circuit for physiology potential signal detection
CN107994905A (en) * 2018-01-17 2018-05-04 厦门理工学院 A kind of analog front circuit for ECG signal sampling chip

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106877830A (en) * 2017-04-06 2017-06-20 高科创芯(北京)科技有限公司 A kind of analog front circuit for physiology potential signal detection
CN106877830B (en) * 2017-04-06 2023-05-02 上海芯问科技有限公司 Analog front-end circuit for detecting physiological potential signals
CN107994905A (en) * 2018-01-17 2018-05-04 厦门理工学院 A kind of analog front circuit for ECG signal sampling chip

Similar Documents

Publication Publication Date Title
CN106877830B (en) Analog front-end circuit for detecting physiological potential signals
CN102908137B (en) Single-channel ECG (Electrocardiogram) collection chip
Chandrakumar et al. 5.5 A 2µW 40mVpp linear-input-range chopper-stabilized bio-signal amplifier with boosted input impedance of 300MΩ and electrode-offset filtering
US7324035B2 (en) Amplifier with pulse coded output and remote signal reconstruction from the pulse output
Li et al. An ECG recording front-end with continuous-time level-crossing sampling
Zeng et al. A dual-loop eight-channel ECG recording system with fast settling mode for 12-lead applications
CN104000584A (en) Weak signal acquisition circuit with high SNR (Signal to Noise Ratio)
CN206611390U (en) A kind of analog front circuit for physiology potential signal detection
CN111697928A (en) Capacitor coupling chopper amplifier
Liu et al. A battery-less portable ECG monitoring system with wired audio transmission
Zhang et al. High input impedance low-noise CMOS analog frontend IC for wearable electrocardiogram monitoring
Abbasi A wearable EEG amplifier using a novel teraohm low-distortion tunable hybrid pseudo-resistor
Buaban et al. A low-power high-input-impedance ECG readout system employing a very high-gain amplification and a signal-folding technique for dry-electrode recording
Mohamed et al. A low power low noise capacitively coupled chopper instrumentation amplifier in 130 nm CMOS for portable biopotential acquisiton systems
Chen et al. A 0.6 V, 8.4 uW AFE circuit for biomedical signal recording
Tu et al. Analog front-end amplifier for ECG applications with feed-forward EOS cancellation
Zhou et al. Flicker noise analysis on chopper amplifier
Feng et al. A low-power low-noise amplifier for EEG/ECG signal recording applications
Yang et al. Continuous-time sigma-delta modulator design for wireless biomedical sensing applications
Panchal et al. Design and implementation of low noise amplifier and variable gain amplifier for ECG systems
Mu et al. An 8-Channel Analog Front-End with a PVT-lnsensitive Switched-Capacitor and Analog Combo DC Servo Loop Achieving 300mV Tolerance and 0.64 s Recovery Time to Electrode-DC Offset for Physiological Signal Recording
Giri et al. Fully integrated sub-threshold body biased low noise portable ECG frontend
Majidzadeh et al. A 16-channel 220 µW neural recording IC with embedded delta compression
Patra et al. A 343nW biomedical signal acquisition system powered by energy efficient (62.8%) power aware RF energy harvesting circuit
Zou et al. Fully integrated triple-mode sigma-delta modulator for speech codec

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant