CN206575509U - A kind of many video source access splicers - Google Patents

Abstract

The utility model provides a kind of many video source access splicers, including main control unit and the video exchange unit being sequentially connected, video input unit and video output unit, the main control unit includes the CPU and control panel being connected with each other, the video exchange unit includes the video input apparatus being sequentially connected, input interface and exchange chip, the video input unit includes the interface conversion circuit being sequentially connected, first FPGA and MCU, the exchange chip connects the interface conversion circuit, the video output unit includes the output interface and display end being sequentially connected, the MCU connections output interface, the CPU connects the interface conversion circuit respectively, first FPGA, the MCU and the output interface.The utility model realizes many video source flexible access processing, can be used widely in large scale LED/LCD splice displaying systems.

Description

A multi-video source access splicer

technical field

The utility model belongs to the technical field of splicers, in particular to a multi-video source access splicer.

Background technique

With the development of science and technology, small-pitch LED and large-size LCD splicing display systems are increasingly used in many industries, such as outdoor advertising, exhibition booths, traffic dispatching, public security fire protection, etc. Over the past few years, with the decline in the manufacturing cost of display terminals, the prices have become cheaper and cheaper, enabling more and more users to use larger display terminals, which puts forward higher requirements for the functions of the display system: The diversity of input ports, the synchronization of cross-screen display, the access of high-resolution video data, and the access of network video signals. In order to meet the increasing functional requirements in an increasingly complex application environment, in a multi-screen display system, a multi-screen splicer is required to meet these functional requirements and leave room for future system expansion.

Most of the existing video splicers access a single video source, which cannot meet the requirements for multiple video sources to be connected and spliced. A patent for a split structure of an LCD splicer and an LCD screen (public number: CN203930266U) is disclosed A splicer box body, a splicer fixing plate and an output port are provided, a splicer fixing plate is respectively fixed at two ends of the splicer box body, and an output port is arranged on one side of the splicer box body; the liquid crystal screen includes The screen body, the screen body back cover and the input port, the screen body back cover is fixed on the screen body, the screen body back cover is provided with an input port, the output port on the LCD splicer and the input port on the LCD screen are connected by The signal connection line is electrically connected. This patent makes the liquid crystal display unit and the liquid crystal splicer separate and set, which expands the application range of the splicing wall, but does not fundamentally change the application range from the access source, and cannot realize the splicing processing of multi-video access.

Utility model content

The purpose of the utility model is to provide a multi-video source access splicer, which can realize flexible access processing of multi-video sources, and can be widely used in large-size LED/LCD splicing display systems.

The utility model provides the following technical solutions:

A multi-video source access splicer, comprising a main control unit and a sequentially connected video switching unit, a video input unit, and a video output unit, the main control unit includes a CPU and a control panel connected to each other, and the video switching unit includes A video input device, an input interface, and a switching chip connected in sequence, the video input unit includes an interface conversion circuit, a first FPGA and an MCU connected in sequence, the switching chip is connected to the interface conversion circuit, and the video output unit includes sequentially connected to the output interface and the display terminal, the MCU is connected to the output interface, and the CPU is respectively connected to the interface conversion circuit, the first FPGA, the MCU and the output interface.

Preferably, the main control unit also includes a power supply and a clock device respectively connected to the CPU, the power supply provides power for the entire splicer system through the CPU, and the clock device provides power for the entire splicer system through the CPU. Clock signal to keep the video output synchronized.

Preferably, the input interface includes a DVI input interface and a network input interface correspondingly connected to the video input device, so as to realize the connection of various video sources to the splicer.

Preferably, the switching chip includes a video switching chip and an Ethernet switching chip, the input end of the video switching chip is connected to the DVI input interface, the output end of the video switching chip is connected to the interface conversion circuit, and the Ethernet The input end of the network switching chip is connected to the network input interface, and the output end of the Ethernet switching chip is connected to the interface conversion circuit to complete the exchange of various video data.

Preferably, the output interface includes a network output interface and a DVI output interface respectively connected to the MCU, and the output terminals of the network output interface and the DVI output interface are respectively connected to the corresponding display terminals to complete the video splicing process .

Preferably, the network output interface includes a second FPGA and a video compression chip connected in sequence, the input end of the second FPGA is connected to the MCU, and the output end of the video compression chip is connected to the display end for network video Splicing compression processing display.

The beneficial effects of the utility model are as follows: the exchange unit setting is adopted to realize the video data exchange of multiple video sources; the input unit adopts the interactive setting of FPGA and MCU to realize the input video exchange splicing processing, and the operation speed is fast; the output unit adopts FPGA and general format Double processing realizes fast video display function, and through video compression chip, realizes network video back-to-county function; the main control unit is fully controlled, and the operation is simple and easy to promote.

Description of drawings

The accompanying drawings are used to provide a further understanding of the utility model, and constitute a part of the description, and are used to explain the utility model together with the embodiments of the utility model, and do not constitute a limitation to the utility model. In the attached picture:

Fig. 1 is a structural representation of the utility model;

The marks in the figure are: 1. Video switching unit; 2. Video input unit; 3. Video output unit; 4. Main control unit.

detailed description

As shown in Figure 1, a kind of multi-video source access splicing device comprises main control unit 4 and the video switching unit 1, video input unit 2 and video output unit 3 that are connected in sequence, and main control unit 4 comprises CPU and connected to each other The control panel and the CPU are connected to the video input unit 2 and the video output unit 4 respectively. Video input unit 2 is responsible for video signal access and effect processing; video output unit 3 is mainly responsible for video signal output to the corresponding display unit and output video signal effect processing; video exchange unit 1 is mainly responsible for video signal processing as required The exchange from the input port to the output port, the mutual exchange of instruction data between each board; the main control unit 4 is responsible for the communication with the host computer, and sends the instructions of the host computer to the corresponding functional unit for specific operations, and at the same time Monitor the working status of the system and send a reminder to the customer when an abnormality is found.

As shown in Figure 1, the video switching unit 1 includes a video input device, an input interface and a switching chip connected in sequence, and the input interface includes a DVI input interface and a network input interface respectively connected to the video input device correspondingly, so as to realize multiple video source access The splicer; the switching chip includes a video switching chip and an Ethernet switching chip, the input end of the video switching chip is connected to the DVI input interface, the output end of the video switching chip is connected to the interface conversion circuit, the input end of the Ethernet switching chip is connected to the network input interface, and the Ethernet The output end of the network switching chip is connected to the interface conversion circuit to complete the exchange of various video data.

As shown in Figure 1, the video input unit 2 comprises the interface conversion circuit, the first FPGA and the MCU connected in sequence, and the switching chip is connected to the interface conversion circuit, and the video input unit 2 needs to be adapted to multiple different video interfaces, such as DVI/HDMI/ VGA/SDI/IP, etc., so for each different interface, a different interface conversion circuit is required to convert the input video signal into an RGB signal or a YCbCr signal, and input it to the FPGA for processing. Among them, the IP input board is relatively In particular, it accesses the compressed network video signal, which needs to be decompressed into the original video signal, and then converted into a video format that FPGA can receive; FPGA plays the role of GPU in the input unit and is completely used for video signal storage, processing, format conversion and forwarding, and a set of control registers are defined inside the FPGA, which are used to communicate with the onboard microcontroller, receive and complete the instructions issued by the main control unit 4 . In the video input unit 2, the FPGA needs to perform processing such as amplification, cutting, adjustment of brightness, contrast, and color saturation of the input video signal; the video input unit 2 does not have high requirements for the onboard single-chip microcomputer, and mainly realizes the interaction of instructions.

As shown in Figure 1, the video output unit 3 comprises the output interface and the display terminal connected in sequence, the MCU is connected with the output interface, and the output interface comprises a network output interface and a DVI output interface connected with the MCU respectively, and the output of the network output interface and the DVI output interface The terminals are respectively connected to the corresponding display terminals to complete the video splicing process; the network output interface includes a second FPGA and a video compression chip connected in sequence, the input terminal of the second FPGA is connected to the MCU, and the output terminal of the video compression chip is connected to the display terminal for network video Splicing compression processing display.

As shown in Figure 1, the main control unit 4 also includes a power supply and a clock device respectively connected to the CPU, the power supply provides power for the entire splicer system through the CPU, and the clock device provides a clock signal for the entire splicer through the CPU to keep the video output synchronous . The main control unit 4 is the brain of the entire splicing device, and communicates through the control panel to realize the function of sending instructions and at the same time realize the monitoring of the entire splicing device.

The above is only a preferred embodiment of the present utility model, and is not intended to limit the present utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, for those skilled in the art, it can still understand the foregoing The technical solutions described in each embodiment are modified, or some of the technical features are equivalently replaced. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present utility model shall be included in the protection scope of the present utility model.

Claims (6)

1. A kind of multi-video source access splicing device is characterized in that, comprises main control unit and video exchange unit, video input unit and video output unit connected in turn, and described main control unit comprises interconnected CPU and control panel, The video switching unit includes a video input device, an input interface, and a switching chip connected in sequence, the video input unit includes an interface conversion circuit, a first FPGA, and an MCU connected in sequence, and the switching chip is connected to the interface conversion circuit, so The video output unit includes an output interface and a display terminal connected in sequence, the MCU is connected to the output interface, and the CPU is respectively connected to the interface conversion circuit, the first FPGA, the MCU and the output interface. 2 . The multi-video source access splicer according to claim 1 , wherein the main control unit further includes a power supply and a clock device respectively connected to the CPU. 3 . 3 . The multi-video source access splicer according to claim 1 , wherein the input interface includes a DVI input interface and a network input interface respectively correspondingly connected to the video input device. 4 . 4. A kind of multi-video source access splicing device according to claim 3, is characterized in that, described exchange chip comprises video exchange chip and Ethernet exchange chip, and the input terminal of described video exchange chip is connected with described DVI input An interface, the output end of the video switching chip is connected to the interface conversion circuit, the input end of the Ethernet switching chip is connected to the network input interface, and the output end of the Ethernet switching chip is connected to the interface conversion circuit. 5. A kind of multi-video source access splicer according to claim 1, is characterized in that, described output interface comprises the network output interface and the DVI output interface that are respectively connected with described MCU, and described network output interface and all The output ends of the DVI output interface are respectively connected to the corresponding display ends. 6. A kind of multi-video source access splicing device according to claim 5, is characterized in that, described network output interface comprises the second FPGA and the video compression chip that are connected successively, and the input end of described second FPGA connects all The MCU, the output end of the video compression chip is connected to the display end.