CN206559620U - Single recording access realizes onboard miaow head and earphone microphone head switching circuit - Google Patents
Single recording access realizes onboard miaow head and earphone microphone head switching circuit Download PDFInfo
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- CN206559620U CN206559620U CN201720185302.XU CN201720185302U CN206559620U CN 206559620 U CN206559620 U CN 206559620U CN 201720185302 U CN201720185302 U CN 201720185302U CN 206559620 U CN206559620 U CN 206559620U
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Abstract
The utility model provides a kind of single recording access and realizes onboard miaow head and earphone microphone head switching circuit, belongs to signal switching circuit field.The utility model includes signaling switch control module, power module and GPIO control modules, the input of the signaling switch control module is connected with the output end of onboard miaow head and earphone microphone head, the output end of the signaling switch control module is connected with audio input interface, the GPIO control modules are connected with signaling switch control module and earphone microphone head respectively, and the power module is powered for circuit.The beneficial effects of the utility model are：Using and switching to onboard miaow head and earphone microphone head is realized on the IC that single recording access can be used, product function and usage scenario has been expanded；And it is with low cost, reliability is high；The earphone of compatible three kinds of different systems of in the market, no matter what miaow head access is, can ensure that product has sound-recording function always.
Description
Technical field
The utility model is related to signal switching circuit, more particularly to a kind of single recording access realizes onboard miaow head and earphone microphone
Head switching circuit.
Background technology
Existing many AUDIO IC only have an audio input interface, and with the development of consumer electronics technology, greatly
Partial consumption electronic product will also support earphone sound-recording function in addition to onboard miaow head.Therefore need an inexpensive one kind
Audio signal switching circuit, to support an audio input interface to connect two audio input sources.
Meanwhile, because (OMTP is band by general earphone interface standard has without miaow head currently on the market earphone, OMTP
MIC earphone 3.5mm interface standards) and CTIA (the earphone communication standard that a kind of U.S.'s radio communication and internet society release)
Three kinds, different replies are generally done, to ensure that product has record always using the earphone interface of three kinds of different systems on existing market
Sound function, in the market, the technical scheme without two kinds of Universal joints.
Utility model content
To solve the problems of the prior art, the utility model provides a kind of single recording access and realizes onboard miaow head and earphone
Miaow head switching circuit.
The utility model includes signaling switch control module, power module and GPIO control modules, the signaling switch control
The input of molding block is connected with the output end of onboard miaow head and earphone microphone head, the output end of the signaling switch control module with
Audio input interface is connected, and the GPIO control modules are connected with signaling switch control module and earphone microphone head respectively, the electricity
Source module is powered for circuit.
The utility model is further improved, and the signaling switch control module includes signaling switch chip U1, the letter
Number switch chip U1 the 1st pin B1 lug supports, the 2nd pin G ground connection, the 3rd pin B0 fishplate bars carry miaow head CON1, the 4th pin A
Audio input interface is connect, the 5th pin V connects power supply, and the 6th pin S connects GPIO control modules, and the signaling switch chip U1 controls sound
Frequency is exported from the 1st pin B1 or the 3rd pin B0, from the 4th pin A outputs.
The utility model is further improved, and the power module includes miaow head power supply and power supply, the miaow head electricity consumption
The one end of the earphone microphone head end in source respectively with resistance R1, electric capacity C1 is connected, another termination signaling switch chip U1 of resistance R1
The 1st pin B1 and earphone base, electric capacity C1 other ends ground connection, the onboard miaow head end of the miaow head power supply respectively with resistance
R3, electric capacity C3 one end are connected, the 3rd pin B0 and onboard miaow head of another termination signaling switch chip U1 of resistance R3
CON1, the electric capacity C3 other ends ground connection, the power supply is connected with the 5th pin V and electric capacity C2 one end respectively, and the electric capacity C2 is another
One end is grounded.
The utility model is further improved, and the GPIO control modules are the CPU_GPIO mouths being connected with CPU, described
CPU_GPIO mouthfuls are connected by resistance R2 with signaling switch chip U1 the 1st pin B1 and earphone base.
The utility model is further improved, and when no earphone is inserted, CPU_GPIO mouthfuls are set to the low electricity of output state
Put down, now S=0, audio signal walks signaling switch chip U1 B0 mouthfuls of the 3rd pin, and onboard miaow head CON1 signal and audio is defeated
Incoming interface is connected, and onboard miaow head can record.
The utility model is further improved, when three section earphones insertions, CPU_GPIO mouthful be set to band it is internal pull up it is defeated
Enter state, now the miaow head pin of earphone base is connected with signaling switch chip U1 the 2nd pin G by headset body, therefore earphone base
Input HP_MIC is pulled low；Earphone base input HP_MIC is connected with CPU_GPIO mouthfuls by resistance R2, so CPU_GPIO
Mouth is synchronous to be pulled low, now S=0, and audio signal walks signaling switch chip U1 B0 mouthfuls of the 3rd pin, onboard miaow head CON1 letter
Number it is connected with audio input interface, onboard miaow head can record.
The utility model is further improved, when CTIA standards earphone is inserted, and CPU_GPIO mouthfuls are set on band inside
Drawing input state, now the miaow head pin of earphone base is driven high by R1 resistance, therefore CPU_GPIO mouthfuls of current potentials are height, now S=1,
Audio signal walks signaling switch chip U1 B1 mouthfuls of the 1st pin, and the signal of earphone microphone head is connected with audio input interface, earphone microphone
Head can record.
The utility model is further improved, when OMTP standards earphone is inserted, and CPU_GPIO mouthfuls are set on band inside
Draw input state, now the miaow head pin of earphone base it is actual access be signaling switch chip U1 the 2nd pin G, therefore earphone base is defeated
Enter to hold HP_MIC to be pulled low, earphone base input HP_MIC is connected with CPU_GPIO mouthfuls by resistance R2, so CPU_GPIO mouthfuls
Synchronously it is pulled low, now S=0, audio signal walks signaling switch chip U1 B0 mouthfuls of the 3rd pin, onboard miaow head CON1 signal
It is connected with audio input interface, onboard miaow head can record.
Compared with prior art, the beneficial effects of the utility model are：Realization pair on the IC of single recording access can be used
The use and switching of onboard miaow head and earphone microphone head, have expanded product function and usage scenario；And it is with low cost, reliability is high；
The earphone of compatible three kinds of different systems of in the market, no matter what miaow head access is, can ensure that product has sound-recording function always.
Brief description of the drawings
Fig. 1 is the utility model circuit diagram.
Embodiment
The utility model is described in further details with reference to the accompanying drawings and examples.
As shown in figure 1, the utility model includes signaling switch control module, power module and GPIO control modules, it is described
The input of signaling switch control module is connected with the output end of onboard miaow head and earphone microphone head, the signaling switch control module
Output end be connected with audio input interface, the GPIO control modules respectively with signaling switch control module and earphone microphone head phase
Even, the power module is powered for circuit.
The signaling switch control module of this example includes signaling switch chip U1, the 1st pin of the signaling switch chip U1
B1 lug supports, the 2nd pin G ground connection, the 3rd pin B0 fishplate bars carry miaow head CON1, the 4th pin A and connect audio input interface, and the 5th draws
Pin V connects power supply, and the 6th pin S connects GPIO control modules, and the signaling switch chip U1 controls audio is drawn from the 1st pin B1 or the 3rd
Pin B0 is exported, from the 4th pin A outputs.
The power module includes miaow head power supply and power supply, the earphone microphone head end of the miaow head power supply respectively with resistance
R1, electric capacity C1 one end are connected, the 1st pin B1 and earphone base of another termination signaling switch chip U1 of resistance R1, described
The electric capacity C1 other ends are grounded, and the one end of the onboard miaow head end of the miaow head power supply respectively with resistance R3, electric capacity C3 is connected, described
Another termination signaling switch chip U1 of resistance R3 the 3rd pin B0 and onboard miaow head CON1, the electric capacity C3 other ends ground connection, institute
State power supply to be connected with the 5th pin V and electric capacity C2 one end respectively, the electric capacity C2 other ends ground connection.
The GPIO control modules are the CPU_GPIO mouths being connected with the CPU of earphone, and described CPU_GPIO mouthfuls passes through resistance
R2 is connected with signaling switch chip U1 the 1st pin B1 and earphone base.
Principle of the present utility model is：When CPU_GPIO mouthfuls of output states are low level, the signaling switch chip U1
The 6th pin S input be 0, audio signal is inputted by onboard miaow head, now, and onboard miaow head can record；Work as CPU_GPIO
When mouth output state is high level, the 6th pin S of signaling switch chip U1 input is 1, and audio signal passes through earphone
Miaow head is inputted.
Specifically：When no earphone is inserted, CPU_GPIO mouthfuls are set to output state low level, now S=0, audio
Signal walks signaling switch chip U1 B0 mouthfuls of the 3rd pin, and onboard miaow head CON1 signal is connected with audio input interface, onboard miaow
Head can record.
When three section earphone insertions, CPU_GPIO mouthfuls are set to the internal miaow head for pulling up input state, now earphone base of band
Pin is connected with signaling switch chip U1 the 2nd pin G by headset body, therefore earphone base input HP_MIC is pulled low；Earphone
Seat input HP_MIC is connected with CPU_GPIO mouthfuls by resistance R2, so CPU_GPIO mouthfuls of synchronizations are pulled low, now S=0, sound
Frequency signal walks signaling switch chip U1 B0 mouthfuls of the 3rd pin, and onboard miaow head CON1 signal is connected with audio input interface, onboard
Miaow head can record.
When CTIA standards earphone is inserted, CPU_GPIO mouthfuls are set to the internal pull-up input state of band, now earphone base
Miaow head pin is driven high by R1 resistance, therefore CPU_GPIO mouthfuls of current potentials are height, now S=1, and audio signal walks signaling switch chip U1
B1 mouthfuls of the 1st pin, the signal of earphone microphone head is connected with audio input interface, and earphone microphone head can record.
When OMTP standards earphone is inserted, CPU_GPIO mouthfuls are set to the internal pull-up input state of band, now earphone base
The actual access of miaow head pin be signaling switch chip U1 the 2nd pin G, the left and right acoustic channels directly only tens of this pin and earphone
The resistance of ohm, because the left and right acoustic channels of earphone only have AC signal, direct current signal is 0, therefore earphone base input HP_MIC is drawn
Low, earphone base input HP_MIC is connected with CPU_GPIO mouthfuls by resistance R2, so CPU_GPIO mouthfuls are synchronously pulled low, now
S=0, audio signal walks signaling switch chip U1 B0 mouthfuls of the 3rd pin, onboard miaow head CON1 signal and audio input interface phase
Even, onboard miaow head can record.
To sum up, the utility model, which can be used, realizes using to onboard miaow head and earphone microphone head on the IC of single recording access
With switching, product function and usage scenario have been expanded；And it is with low cost, reliability is high；The either ear of which kind of standard of in the market
Machine, no matter what miaow head that accesses makes, can ensure that product has sound-recording function always, compatibility is good.
Embodiment described above is better embodiment of the present utility model, and it is new not to limit this practicality with this
The specific implementation scope of type, scope of the present utility model includes being not limited to present embodiment, all according to the utility model
The equivalence changes made are in protection domain of the present utility model.
Claims (8)
1. single recording access realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：Mould is controlled including signaling switch
Block, power module and GPIO control modules, the input of the signaling switch control module and onboard miaow head and earphone microphone head
Output end is connected, and the output end of the signaling switch control module is connected with audio input interface, the GPIO control modules point
It is not connected with signaling switch control module and earphone microphone head, the power module is powered for circuit.
2. single recording access according to claim 1 realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：
The signaling switch control module includes signaling switch chip U1, the signaling switch chip U1 the 1st pin B1 lug supports,
2nd pin G is grounded, and the 3rd pin B0 fishplate bars carry miaow head CON1, the 4th pin A and connect audio input interface, and the 5th pin V connects power supply, the
6 pin S connect GPIO control modules, and the signaling switch chip U1 controls audio to be exported from the 1st pin B1 or the 3rd pin B0, from
4th pin A is exported.
3. single recording access according to claim 2 realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：
The power module includes miaow head power supply and power supply, the earphone microphone head end of the miaow head power supply respectively with resistance R1, electric capacity
C1 one end is connected, and the 1st pin B1 and earphone base of another termination signaling switch chip U1 of resistance R1, the electric capacity C1 are another
One end is grounded, and the one end of the onboard miaow head end of the miaow head power supply respectively with resistance R3, electric capacity C3 is connected, and the resistance R3 is another
One termination signaling switch chip U1 the 3rd pin B0 and onboard miaow head CON1, the electric capacity C3 other ends ground connection, the power supply point
It is not connected with the 5th pin V and electric capacity C2 one end, the electric capacity C2 other ends ground connection.
4. single recording access according to claim 3 realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：
The GPIO control modules are the CPU_GPIO mouths being connected with CPU, and described CPU_GPIO mouthfuls passes through resistance R2 and signaling switch core
Piece U1 the 1st pin B1 is connected with earphone base.
5. single recording access according to claim 4 realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：
When no earphone is inserted, CPU_GPIO mouthfuls are set to output state low level, now S=0, and audio signal walks signaling switch core
Piece U1 B0 mouthfuls of the 3rd pin, onboard miaow head CON1 signal is connected with audio input interface, and onboard miaow head can record.
6. single recording access according to claim 4 realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：
When three section earphone insertions, CPU_GPIO mouthfuls are set to the internal miaow head pin and signal for pulling up input state, now earphone base of band
Switch chip U1 the 2nd pin G is connected by headset body, therefore earphone base input HP_MIC is pulled low；Earphone base input
HP_MIC is connected with CPU_GPIO mouthfuls by resistance R2, thus CPU_GPIO mouthfuls it is synchronous be pulled low, now S=0, audio signal is walked
Signaling switch chip U1 B0 mouthfuls of the 3rd pin, onboard miaow head CON1 signal is connected with audio input interface, and onboard miaow head can be recorded
Sound.
7. single recording access according to claim 4 realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：
When CTIA standards earphone is inserted, CPU_GPIO mouthfuls are set to the internal pull-up input state of band, and now the miaow head pin of earphone base leads to
Cross R1 resistance to be driven high, therefore CPU_GPIO mouthfuls of current potentials are height, now S=1, what audio signal walked signaling switch chip U1 the 1st draws
B1 mouthfuls of pin, the signal of earphone microphone head is connected with audio input interface, and earphone microphone head can record.
8. single recording access according to claim 4 realizes onboard miaow head and earphone microphone head switching circuit, it is characterised in that：
When OMTP standards earphone is inserted, CPU_GPIO mouthfuls are set to the internal pull-up input state of band, and now the miaow head pin of earphone base is real
That border is accessed is signaling switch chip U1 the 2nd pin G, therefore earphone base input HP_MIC is pulled low, earphone base input HP_
MIC is connected with CPU_GPIO mouthfuls by resistance R2, thus CPU_GPIO mouthfuls it is synchronous be pulled low, now S=0, audio signal walks letter
Number switch chip U1 B0 mouthfuls of the 3rd pin, onboard miaow head CON1 signal is connected with audio input interface, and onboard miaow head can be recorded
Sound.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720185302.XU CN206559620U (en) | 2017-02-28 | 2017-02-28 | Single recording access realizes onboard miaow head and earphone microphone head switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720185302.XU CN206559620U (en) | 2017-02-28 | 2017-02-28 | Single recording access realizes onboard miaow head and earphone microphone head switching circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206559620U true CN206559620U (en) | 2017-10-13 |
Family
ID=60361471
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720185302.XU Active CN206559620U (en) | 2017-02-28 | 2017-02-28 | Single recording access realizes onboard miaow head and earphone microphone head switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206559620U (en) |
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2017
- 2017-02-28 CN CN201720185302.XU patent/CN206559620U/en active Active
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| CP02 | Change in the address of a patent holder |
Address after: 518000 Meisheng Huigu Science Park, No. 83 Dabao Road, 33 District, Shanghe Street, Baoan District, Shenzhen City, Guangdong Province, 5 4th Floors of Meigu, 5 2nd Floors-2 of Meigu, 6 2nd Floors-2 of Meigu and 6 4th Floors of Meigu Patentee after: EMDOOR DIGITAL TECHNOLOGY Co.,Ltd. Address before: Baoan District Xin'an street Shenzhen city Guangdong province 28 Boseong 518000 Dabao Road No. 49-1 6FC Patentee before: EMDOOR DIGITAL TECHNOLOGY Co.,Ltd. |
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| CP02 | Change in the address of a patent holder |
Address after: 901, building 1, No. 9, Jinxiu Middle Road, Laokeng community, Longtian street, Pingshan District, Shenzhen City, Guangdong Province Patentee after: EMDOOR DIGITAL TECHNOLOGY Co.,Ltd. Address before: 518000 4th floor, building 5, building 2-2, building 6, building 2-2, building 6, building 4, Meisheng Huigu Science Park, 83 Dabao Road, Shanghe community, Xin'an street, Bao'an District, Shenzhen City, Guangdong Province Patentee before: EMDOOR DIGITAL TECHNOLOGY Co.,Ltd. |
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| CP02 | Change in the address of a patent holder |