CN206481290U - For modulus and the signal processing circuit of digital-to-analogue conversion - Google Patents
For modulus and the signal processing circuit of digital-to-analogue conversion Download PDFInfo
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- CN206481290U CN206481290U CN201720147800.5U CN201720147800U CN206481290U CN 206481290 U CN206481290 U CN 206481290U CN 201720147800 U CN201720147800 U CN 201720147800U CN 206481290 U CN206481290 U CN 206481290U
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Abstract
Disclose a kind of for modulus and the signal processing circuit of digital-to-analogue conversion.The signal processing circuit for analog-to-digital conversion includes：Comparator, for comparing signal amplitude and at least one threshold amplitude of the sampled signal in each sampling period, and exports comparative result；Switching device, is electrically connected with the comparator, for receiving the comparative result from the comparator, and selects a range voltage to be used as output among multiple range voltages according to the comparative result；And quantizer, electrically connect, for receiving selected range voltage from the switching device, the signal amplitude is quantified according to selected range voltage with the switching device, and output quantization level.It is thereby achieved that efficient quantizing process.
Description
Technical field
The application is related to field of signal processing, and is used for more particularly, to a kind of at the signal of modulus and digital-to-analogue conversion
Manage circuit.
Background technology
The features such as there is low supply voltage, low-power consumption, high integration and small chip area due to digital signal processing circuit,
So present information communication system is all based on Digital Signal Processing and carrys out work mostly.Digital display circuit can only be to numeral letter
Number handled, and many physical quantitys in industry and life are all the analog quantitys of consecutive variations, for example, audio, temperature, pressure
Power, flow etc., therefore, this, which is accomplished by introducing, can be converted to analog quantity the analog-to-digital conversion of digital quantity.
In the prior art, analog-to-digital conversion mainly includes sampling, quantified and three steps of coding.Sampling is in time will
The process of analog signal discretization；Quantization is come the process of approximate representation analog sampling value using limited level；And encoding is
The process that each quantization level is represented with certain digit code.
Existing quantification technique is broadly divided into uniform quantization and non-uniform quantizing two types.Uniform quantization is using uniform
Quantized interval, its realize it is simple, but in the case where quantization digit is limited, quantizing noise with the reduction of signal level significantly
Improve.The method of lower quantization noise typically has two kinds：1) resolution ratio is improved, such as using more quantization digits；2) increase
Sample rate, makes sampled signal try one's best and approaches measured signal.However, both approaches are all not suitable for for digital communication, because
It is required for increasing sizable transmission frequency bandwidth for them, but noise power can only be reduced very little.
Therefore, proposing non-uniform quantizing, it is by being first compressed (nonlinear change) to sampled signal, carrying out again uniformly
Quantify, quantized interval can be determined according to the different intervals of signal, i.e., more quantized level is provided in small signal region, and
Less quantized level is provided in big range of signal, so that quantizing noise when improving the larger small-signal of probability of occurrence.
Utility model content
However, in the prior art, either uniform quantization or non-uniform quantizing, can only all use fixed quantization amount
Journey, not can configure.So the drawbacks of is that, in the case where quantization digit is limited, quantizing noise is larger.Although non-uniform quantizing
Situation is better than uniform quantization due to introducing compression processing, but remains on and there is above mentioned problem.In addition, in non-uniform quantizing
When, although the compression processing at analog-to-digital conversion end and the divergence process at corresponding digital-to-analogue conversion end improve small letter to a certain extent
Number quantizing noise, but further to whole signal processing algorithm introduce companding processing error.Therefore, it is existing to quantify
Technical efficiency is not high.
In order to solve the above-mentioned technical problem, it is proposed that the application.Embodiments herein provide it is a kind of be used for modulus and
The signal processing circuit of digital-to-analogue conversion, it can realize efficient quantizing process.
According to the one side of the application, there is provided a kind of signal processing circuit for analog-to-digital conversion, the circuit bag
Include：Comparator, for comparing signal amplitude and at least one threshold amplitude of the sampled signal in each sampling period, and is exported
Comparative result；Switching device, is electrically connected with the comparator, for receiving the comparative result, and root from the comparator
Carry out among multiple range voltages to select a range voltage as output according to the comparative result；And quantizer, it is and described
Switching device is electrically connected, for receiving selected range voltage from the switching device, according to selected range voltage come
The signal amplitude is quantified, and output quantization level.
In one embodiment, the switching device indicates that the signal amplitude is more than or equal in the comparative result
During first threshold amplitude, the first range voltage is exported；And it is described to indicate that the signal amplitude is less than in the comparative result
During first threshold amplitude, the second range voltage is exported, the first range voltage is more than the second range voltage.
In one embodiment, the switching device indicates that the signal amplitude is more than or equal in the comparative result
During the first threshold amplitude, the first range voltage is exported；Indicate that the signal amplitude is less than in the comparative result
The first threshold amplitude but during more than or equal to Second Threshold amplitude, exports the second range voltage；And in the ratio
When relatively result indicates that the signal amplitude is less than the Second Threshold amplitude, the 3rd range voltage, second range are exported
Voltage is more than the 3rd range voltage.
In one embodiment, the quantizer uses selected range voltage as the reference voltage, according to default
Quantization digit is carried out closely to obtain multiple quantization levels using one of the multiple quantization level to the signal amplitude
Like expression.
In one embodiment, among the multiple quantization level between two neighboring quantization level quantized interval is expired
Foot：
Wherein, Δ is quantized interval, and Vr is reference voltage, and N is quantization digit.
In one embodiment, the circuit also includes：Sampler, is electrically connected with the comparator, for receiving conduct
The analog signal of input, and the analog signal is sampled according to the sampling period, believed with generating the sampling
Number and be output to the comparator.
In one embodiment, the circuit also includes：Encoder, is electrically connected with the quantizer, for from the amount
Change device and receive the quantization level, and digital coding is carried out to the quantization level using default quantization digit, with life
Into quantization encoding part.
In one embodiment, the encoder carrys out generation mode coded portion always according to selected range voltage, and
And the mode encoding portion and the quantization encoding part are combined, to generate encoded signal as output.
According to the another aspect of the application, there is provided a kind of signal processing circuit for digital-to-analogue conversion, the circuit bag
Include：Decoder, for receiving the encoded signal as input, is separated into quantization encoding part by the encoded signal and pattern is compiled
Code part, and the quantization encoding part is decoded according to the mode encoding portion, to generate stairstep signal
Signal amplitude.
In one embodiment, the decoder is selected according to the mode encoding portion among multiple range voltages
One range voltage, multiple amounts is obtained according to default quantization digit using selected range voltage as the reference voltage
Change level, and the signal amplitude is obtained using the quantization encoding part and the multiple quantization level.
In one embodiment, the circuit also includes：Wave filter, is electrically connected with the decoder, for from the solution
Code device receives the stairstep signal, and the stairstep signal is smoothed, to generate analog signal as output.
Compared with prior art, it is used for modulus and the signal transacting electricity of digital-to-analogue conversion using according to the embodiment of the present application
Road, can compare signal amplitude and at least one threshold of the sampled signal in each sampling period after sampled signal is received
Value amplitude, and comparative result is exported, a range voltage is selected among multiple range voltages according to the comparative result
As output, the signal amplitude is quantified according to selected range voltage, and output quantization level.Therefore,
In the case where quantization digit is constant, less quantized interval can be provided in small signal region, and in big range of signal
Larger quantization interval is provided, for the signal of different amplitudes, quantified precision can be made full use of, quantizing noise is minimized,
It is achieved thereby that efficient quantizing process.
Brief description of the drawings
By the way that the embodiment of the present application is described in more detail with reference to accompanying drawing, the above-mentioned and other purposes of the application,
Feature and advantage will be apparent.Accompanying drawing is used for providing further understanding the embodiment of the present application, and constitutes explanation
A part for book, is used to explain the application together with the embodiment of the present application, does not constitute the limitation to the application.In the accompanying drawings,
Identical reference number typically represents same parts or step.
Fig. 1 illustrates the rendering of the quantizing process according to the embodiment of the present application.
Fig. 2 illustrates the structural representation of the signal processing system according to the embodiment of the present application.
Fig. 3 illustrates the structural representation of the signal processing circuit for analog-to-digital conversion according to the application first embodiment
Figure.
Fig. 4 illustrates the structural representation of the signal processing circuit for analog-to-digital conversion according to the application second embodiment
Figure.
Fig. 5 A illustrate the schematic diagram of the dynamic range of 16 quantification treatments according to prior art.
Fig. 5 B illustrate the schematic diagram of the dynamic range of 24 quantification treatments according to prior art.
Fig. 6 illustrates the schematic diagram of the dynamic range of 16 quantification treatments according to the embodiment of the present application from a kind of visual angle.
Fig. 7 illustrates the schematic diagram of the dynamic range of 16 quantification treatments according to the embodiment of the present application from another visual angle.
Fig. 8 illustrates the structural representation of the signal processing circuit for digital-to-analogue conversion according to the embodiment of the present application.
Fig. 9 illustrates the schematic flow sheet of the signal processing method for analog-to-digital conversion according to the embodiment of the present application.
Figure 10 illustrates the schematic flow sheet of the signal processing method for digital-to-analogue conversion according to the embodiment of the present application.
Embodiment
Below, the example embodiment according to the application will be described in detail by referring to the drawings.Obviously, described embodiment is only
Only be a part of embodiment of the application, rather than the application whole embodiments, it should be appreciated that the application is not by described herein
The limitation of example embodiment.
Application general introduction
As described above, either uniform quantization or non-uniform quantizing, existing quantizing process all can only be using fixed
Quantify range, not can configure, so as to cause quantitative efficiency low.
For the technical problem, the basic conception of the application is that proposition is a kind of for modulus and the signal transacting of digital-to-analogue conversion
Circuit and method, it can be during being quantified, and the amplitude based on input signal is adaptively adjusted quantization range.Cause
This, for the signal of different amplitudes, can fully improve quantified precision, quantizing noise be minimized, it is achieved thereby that efficiently
Quantizing process.
Below, Fig. 1 will be referred to, the basic conception of the application is summarily described.Because non-uniform quantizing can pass through compression
Realized with uniform quantization, so for the sake of simplicity, directly will be illustrated here by taking uniform quantization as an example.
Fig. 1 illustrates the rendering of the quantizing process according to the embodiment of the present application.
Assuming that in advance with sampling period Ts(that is, sample frequency 1/Ts) analog signal x (n) is sampled, it is assumed that simulation
Signal x (n) amplitude range is from-VmTo+Vm(that is, it is 2V completely to quantify range Vppm), and assume that quantization digit N is 3, such as
Shown in Fig. 1.
It is recognised that quantized interval (or being quantified precision) Δ is met：
Quantizing noise e (n) is a stochastic variable, obeys white noise and is uniformly distributed, its mean μ e is met：
μ e=0
Its variance δ e (that is, quantization error, also referred to as quantizing noise or quantization noise power) are met：
From above equation as can be seen that quantized interval and quantization error are solely dependent upon quantization digit N and quantify range
Vpp.However, increase quantization digit N can cause transmission frequency bandwidth to increase, but noise power can only be reduced very little, so this
It is unfavorable for digital communication.On the other hand, although during existing quantization, maximum quantization range be it is nominal,
Maximum is may not exceed, but if can adaptively be changed according to the range value of signal by configuring, then
As long as the value after changing is still less than maximum range, you can realize the effect of dynamic optimization quantified precision and quantizing noise.
After the general principle of the application is described, carry out specifically to introduce the various non-limits of the application below with reference to the accompanying drawings
Property embodiment processed.
Example system
Fig. 2 illustrates the structural representation of the signal processing system according to the embodiment of the present application.
As shown in Fig. 2 including the signal transacting for analog-to-digital conversion according to the signal processing system 10 of the embodiment of the present application
Circuit 100 and the signal processing circuit 200 for digital-to-analogue conversion.
The signal processing circuit 100 for being used for analog-to-digital conversion can be quantisation element, for completing for sampled signal
Quantization operation, i.e., using limited level come approximate representation analog sampling value.Further, this is used for the signal of analog-to-digital conversion
Process circuit 100 can include other parts, and as analog-digital converter (ADC), the letter for completing whole analog-to-digital conversion
Number processing (generally, including sampling, quantify and coded treatment), i.e., when by Time Continuous, amplitude, also continuous analog quantity is converted to
Between discrete, amplitude also discrete data signal.
Correspondingly, the signal processing circuit 200 for being used for digital-to-analogue conversion can be decoding element, for completing for coding
The decoding operate of signal, i.e., be converted to encoded signal using limited level the stairstep signal of Time Continuous.Further
Ground, the signal processing circuit 200 for being used for digital-to-analogue conversion can include other parts, and as digital analog converter (DAC), use
It is in the signal transacting (generally, including decoding and filtering process) for completing whole digital-to-analogue conversion, i.e., time discrete, amplitude is also discrete
Data signal be converted to Time Continuous, amplitude also continuous analog quantity.
Below, by refer to the attached drawing, the signal processing circuit for analog-to-digital conversion according to the embodiment of the present application is described first
100。
Exemplary signal process circuit for analog-to-digital conversion
Fig. 3 illustrates the structural representation of the signal processing circuit for analog-to-digital conversion according to the application first embodiment
Figure.
In the first embodiment of the application, the signal processing circuit 100 for being used for analog-to-digital conversion can be quantisation element.
As shown in figure 3, the signal processing circuit 100 for analog-to-digital conversion can include：Comparator 110, derailing switch
Part 120 and quantizer 130.
The comparator 110 can compare signal amplitude and at least one threshold value width of the sampled signal in each sampling period
Degree, and export comparative result.
For example, comparator 110 can receive sampled signal, and by the sampled signal each sampling period signal width
Degree is compared with one or more threshold amplitudes.For example, comparator can include：Two-way is inputted, and can be analog signal；With one
Road is exported, depending on different circuit designs, can be high level or low level analog signal, or binary signal 0 or 1
Data signal.
For example, the threshold amplitude can depend on different design requirements and be set to one or more.If it is desired to will
When sampled signal divides into two grades of big signal and small-signal, then a threshold voltage can be set, if it is desired to will sample
When signal distinguishing is big signal, middle signal and small-signal Three Estate, it can set two threshold voltages, similarly, can also set
More level of signal are put, and multiple threshold voltages are correspondingly set, as a rule, the number of threshold voltage can be signal etc.
The number of level subtracts one.
The switching device 120 can be electrically connected with the comparator 110, for receiving the ratio from the comparator 110
Relatively result, and select a range voltage to be used as output among multiple range voltages according to the comparative result.
For example, the switching device 120 can be a kind of selection circuit, it can receive the comparative result of comparator 110, and
And an output is selected among multiple range voltages according to the comparative result, it is used as current range voltage.Default range
The number of voltage is identical with the number of the level of signal of sampled signal.
In the case of two level of signal, a threshold voltage, the switching device 120 is indicated in the comparative result
When going out the signal amplitude more than or equal to first threshold amplitude, the first range voltage is exported；And refer in the comparative result
When showing that the signal amplitude is less than the first threshold amplitude, the second range voltage is exported, the first range voltage is more than
The second range voltage.
In the case of three level of signal, two threshold voltages, the switching device 120 is indicated in the comparative result
When going out the signal amplitude more than or equal to first threshold amplitude, the first range voltage is exported；Indicated in the comparative result
When the signal amplitude is less than the first threshold amplitude but is more than or equal to Second Threshold amplitude, the second range voltage is exported；
And when the comparative result indicates that the signal amplitude is less than the Second Threshold amplitude, the 3rd range voltage is exported,
The second range voltage is more than the 3rd range voltage.
The quantizer 130 is electrically connected with the switching device 120, for receiving selected from the switching device 120
Range voltage, quantifies according to selected range voltage to the signal amplitude, and output quantization level.
For example, the quantizer 130 can be quantified using selected range voltage as the reference voltage according to default
Digit carries out approximate table using one of the multiple quantization level to obtain multiple quantization levels to the signal amplitude
Show.
For example, being according to the quantizer 130 of the embodiment of the present application with quantizer of the prior art maximum difference, the amount
It is not fixed, and not always full range voltage to change the range voltage that is used of device 130, but can be as needed, using many
One of individual gear, as long as no more than full range voltage.
For example, in the case of third gear range voltage, when comparator 110 judges sampled signal in current sample period
When signal amplitude is big signal, the quantizer 130 can use the first range voltage corresponding with big signal, and using pre-
If quantization digit the first range voltage is divided, to obtain multiple interval larger quantization level, and use institute
One of multiple quantization levels are stated to carry out approximate representation to the larger signal amplitude；When comparator 110 judges sampling letter
Number current sample period signal amplitude be middle signal when, the quantizer 130 can use corresponding with middle signal second
Range voltage, and the second range voltage is divided using default quantization digit, it is medium to obtain multiple intervals
Quantization level, and approximate representation is carried out to the medium signal amplitude using one of the multiple quantization level；When than
Sampled signal is judged when the signal amplitude of current sample period is small-signal compared with device 110, and the quantizer 130 can be used
The 3rd range voltage corresponding with small-signal, and the 3rd range voltage is divided using default quantization digit, with
Multiple less quantization levels in interval are obtained, and using one of the multiple quantization level come to the less signal amplitude
Carry out approximate representation.
For example, after selected range voltage, quantizer 130 can be using any in uniform quantization or non-uniform quantizing
A kind of mode performs subsequent operation.
In the case of uniform quantization, the quantized interval among the multiple quantization level between two neighboring quantization level
Meet：
Wherein, Δ is quantized interval, and Vr is reference voltage, and N is quantization digit.It is in not in the signal amplitude of sampled signal
During co-extensive, the Vr is range voltage corresponding with the scope.
In the case of non-uniform quantizing, sampled signal can be first compressed by quantizer 130, then carry out even amount
Change.Input voltage x is changed into output voltage y by the process of compression equivalent to using a nonlinear circuit：Y=f (x), it is one
Individual be compressed to big signal and the process being amplified to small-signal.Signal changes after the processing of this nonlinear circuit
Proportionate relationship between big signal and small-signal, is basically unchanged the ratio of big signal or becomes smaller, and small-signal is corresponding
Ground proportionally increases, and realizes the effect of " pressure is mended greatly small ".
For example, in the case of non-uniform quantizing, can be realized using well known μ rules or A rules in the prior art.
Obviously, the application not limited to this.Either existing or exploitation in the future any uniform or non-uniform quantizing is calculated
Method, can be applied in the signal processing method according to the embodiment of the present application, and should also be included in the protection model of the application
In enclosing.
As can be seen here, using the signal processing system according to the application first embodiment, sampled signal can received
Afterwards, compare signal amplitude and at least one threshold amplitude of sampled signal in each sampling period, and export comparative result,
One range voltage is selected as output among multiple range voltages according to the comparative result, according to selected range
Voltage quantifies to the signal amplitude, and output quantization level.Therefore, can in the case where quantization digit is constant
To provide less quantized interval in small signal region, and larger quantization interval is provided in big range of signal, for not
With the signal of amplitude, quantified precision can be made full use of, quantizing noise is minimized, it is achieved thereby that efficient quantizing process.
Fig. 4 illustrates the structural representation of the signal processing circuit for analog-to-digital conversion according to the application second embodiment
Figure.
In the second embodiment of the application, the signal processing circuit 100 for being used for analog-to-digital conversion can also be that modulus turns
Parallel operation (ADC).
As shown in figure 4, the signal processing circuit 100 for analog-to-digital conversion can include：Sampler 105, comparator
110th, switching device 120, quantizer 130 and encoder.Wherein, comparator 110, switching device 120 and quantizer 130 and
It is essentially identical in one embodiment, its detailed description is omitted herein.
The sampler 105 can be electrically connected with the comparator 110, for receiving the analog signal as input, and
The analog signal is sampled according to the sampling period, to generate the sampled signal and be output to the comparator
110。
Sampled value is properly termed as instead of limited amplitude of original analog signal, the signal being made up of sampled value is properly termed as adopting
Sample signal.
For example, sampler 105 utilizes sampling period TsIn time by analog signal discretization, that is, in analog signal
In the time domain of appearance, using at intervals of Ts、2Ts、……、nTsSignal amplitude corresponding to the moment such as (n are natural number), approx
Instead of countless amplitudes of the original analog signal in this time domain.
For example, according to Nyquist law, the rule that sampling process should be followed is, sampling period TsInverse (i.e.,
Sample frequency fs) highest frequency f in signal should be more thanmax2 times, i.e. (fs>2fmax).So, the data signal after sampling
The information in original analog can intactly be retained., can be with order to obtain preferable information content in general practical application
Sample frequency is set to 2.56~4 times of signal highest frequency.For example, in the case of voice signal, its frequency range is led to
Often it is 20Hz-20KHz, generally, sample frequency can be set to 44.1KHz.
The encoder 140 can be electrically connected with the quantizer 130, for receiving the quantization from the quantizer 130
Level, and digital coding is carried out to the quantization level using default quantization digit, with generating quantification coded portion.
For example, encoder 140 can be represented the level value after quantization using numeral, Ran Houli according to certain rule
Represented with the code (for example, binary code) of multiple bits it is quantified after sampled value.
For example, encoder 140 can complete above-mentioned cataloged procedure using arbitrary pattern.Conventional pattern includes nature
Binary code, folding binary code, cyclic binary code (Gray code) etc..
Obviously, the application not limited to this.Either existing or exploitation in the future any pattern, can be applied to
According in the signal processing method of the embodiment of the present application, and it should also be included in the protection domain of the application.
Further, the encoder 140 can also according to selected range voltage come generation mode coded portion, and
And the mode encoding portion and the quantization encoding part are combined, to generate encoded signal as output.
For example, the encoder 140 can electrically connect to obtain selected amount from switching device 120 with switching device 120
Journey voltage.Or, the encoder 140 directly can also obtain the information from quantizer 130.
For example, according to the number of range voltage, the encoder 140 can distribute one or more bits will be selected
Range voltage is encoded in the lump.Similarly, it can also be encoded here using any pattern.
For example, in the case of three range voltage, the mode encoding portion that the encoder 140 can distribute 2 carrys out table
Show selected range voltage.Simply, 11 can be used to represent the first higher range voltage, represented using 10 medium
The second range voltage, represent the 3rd relatively low range voltage using 01, and retain 00 field.
The mode encoding portion may be embodied within quantization digit N and (be realized with interior), i.e. the digit of mode encoding portion
Added up with the digit of the quantization encoding part as quantization digit N.Alternatively, the mode encoding portion can the amount of being not included in
Change within digit N and (realized with outer), be i.e. the digit of mode encoding portion and the digit of the quantization encoding part is added up and be more than
Quantization digit N.
As can be seen here, can be further according to sampling week using the signal processing system according to the application second embodiment
Phase samples to analog signal, to generate the sampled signal for being used for being quantified, and can utilize default quantization
Number to carry out digital coding to quantization level, can also be according to selected range voltage next life with generating quantification coded portion
Become the mode coded portion, and combines the mode encoding portion and the quantization encoding part, to generate encoded signal.Cause
This, there is provided complete analog-to-digital conversion process for other functions of further perfect analog-digital converter.
Specific example
Below, will be in a specific example, to the signal transacting electricity for analog-to-digital conversion according to the embodiment of the present application
Road is described in detail.In the specific example, entered exemplified by being applied to for Speech processing by embodiments herein
Row explanation.It should be noted that the application not limited to this, and can be used for entering the various analog quantitys such as temperature, pressure, flow
Row processing.
In the application (for example, mobile phone) of Speech processing, there is far field voice and two kinds of near field voice is waited to locate
The voice signal of reason.In the case that near field voice must assure that closely voice signal is very big, ADC quantify it is undistorted, therefore,
ADC quantification treatments acquiescence not can configure using maximum quantization range (or completely quantifying range), be in quantization the drawbacks of such
In the case that number is limited, quantizing noise is big, can only realize that smaller quantizing noise quantifies in other words by increasing quantization digit
Precision.
Such as ADC range is 5V, and default configuration is 5V.For quantization digit N=16 ADC system, it can pass through
16 0 or 1 signal amplitude for carrying out approximate representation analog signal, it has 216=65536 kinds of combinations, quantified precision is 5V/
65536, quantizing noise is (5V/65536)2/ 12, dynamic range is 96dB, is shown below：
2log1065536=96dB
In the case where range is constant, we only have lifting quantization digit to lift dynamic range, and reduce quantizing noise
With improvement quantified precision.Such as, quantization digit is upgraded to 24 or 32 from 16, or from 24 liftings to 32 etc..This
The reason for sample is done is because user's most of the time of mobile phone, which is in, is closely said pattern, if ADC ranges are without maximum range
If easily there is the cut ridge distortion of signal.
Fig. 5 A illustrate the schematic diagram of the dynamic range of 16 quantification treatments according to prior art；And Fig. 5 B illustrate root
According to the schematic diagram of the dynamic range of 24 quantification treatments of prior art.
In digital display circuit, have a corresponding relation with simulation system, as shown in Figure 5A, such as 0dBV and 0dBFS this
Individual corresponding relation, refers to that ADC is converted to the analog signal of 0dBV sizes 0dBFS data signal.Because quantization digit only has
16 bits, represent that scope only has 96dB.Digital display circuit regulation maximum is 0dBFS, then the denotable minimum value of the system
As -96dBFS.That is, 0dBV analog signal corresponds to 0dBFS data signal, and -1dBV analog signal corresponds to -
1dBFS data signal ... ..., -96dBV analog signal corresponds to -96dBFS data signal.This 96dB is referred to as ADC
Dynamic range.Analog signal outside this scope, due to the limitation of quantization digit, will appear from cut ridge phenomenon.That is, simulation letter
Even if number more than 0dBV, corresponding data signal can only also be expressed as 0dBFS, even and if analog signal less than -96dBV,
Corresponding data signal can only also be expressed as -96dBFS.
As described above, being fixed quantisation range according to the ADC system of prior art, it is desirable to realize bigger dynamic range,
Can only be by increasing quantization digit.For example, when quantization digit increase is 24 bits, dynamic range can be changed into 144dB.Such as
Shown in Fig. 5 B, such as this corresponding relation of 24dBV and 0dBFS refers to ADC and is converted to the analog signal of 24dBV sizes
0dBFS data signal.Because quantization digit is changed into 24 bits, represent that scope is also changed into 144dB.Digital display circuit regulation is maximum
It is worth for 0dBFS, then the denotable minimum value of the system is -144dBFS.That is, 24dBV analog signal corresponds to 0dBFS
Data signal, 23dBV analog signal corresponds to -1dBFS data signal ... ..., -120dBV analog signal correspondence
In -144dBFS data signal.In the case, analog signal only just occurs more than 24dBV or less than -120dBV and cut
Width phenomenon.That is, than 16 ADC systems of 24 ADC systems can bear bigger signal, without cut ridge and distortion.Also, 24
The system bottom of position ADC system is made an uproar as -120dBV, and the system bottom of 16 ADC systems is made an uproar as -96dBV, it can thus be seen that preceding
Person is more preferable for the small signal of amplitude, it is ensured that higher signal to noise ratio (SNR).
However, upgrading ADC quantization digit N can cause transmission frequency bandwidth to increase, but can only be noise power reduction very
It is small, so this is unfavorable for digital communication.Adaptively adjusted based on input signal amplitude therefore, expecting realizing
Quantify the scheme of range.Far field voice, above can be more flexibly come maximization property in ADC design compared near field voice
Can, because for the voice of far field, voice signal is small, most of scene is not need full scale configuration.It therefore, it can
According to the amplitude of input signal, in the case where not changing original ADC hardware, in the case of no more than maximum quantization range,
ADC quantization range is adaptively configured, can be with maximized lifting quantified precision and reduction quantizing noise, without changing
ADC quantization digit.
Fig. 6 illustrates the schematic diagram of the dynamic range of 16 quantification treatments according to the embodiment of the present application from a kind of visual angle；
And Fig. 7 illustrates the schematic diagram of the dynamic range of 16 quantification treatments according to the embodiment of the present application from another visual angle.
As shown in Figure 6 and Figure 7, in the ADC system according to the embodiment of the present application, microphone collection can be received first
Voice signal, samples according to certain sample frequency to voice signal.It is then possible to detect the voice letter in each sampling period
Number signal amplitude, judge at the time point, the signal amplitude is big signal, middle signal or small-signal.
For example, when signal amplitude is more than first threshold (such as -10dBV), it is big signal to judge it, at this moment can be by ADC
It is adjusted to full scale, such as 5V.Then, ADC system can carry out quantification treatment according to quantization digit (for example, 16), quantify essence
Spend for 5V/65536, quantified in this range intervals.For example, simulation 5V can be corresponded into digital coding [1,1 ..., 1]
(16 1), and simulation 0V is corresponded into digital coding [0,0 ..., 0] (16 0).Full scale 5V can also be passed through two
Extra order [1,1] is added to above-mentioned digitally coded fixed position (for example, most preceding or last etc.).Next, can also be by
Digital coding passes to rear class algorithm, for subsequent treatments such as compress speech, identifications.
When signal amplitude is more than Second Threshold (such as -34dBV), it is middle signal to judge it, at this moment can be adjusted to ADC
Medium range, such as 0.32V.Then, ADC system can carry out quantification treatment, quantified precision according to quantization digit (for example, 16)
For 0.32V/65536, quantified in this range intervals.For example, can will simulation 0.32V correspond to digital coding [1,
1 ..., 1] (16 1), and simulation 0V is corresponded into digital coding [0,0 ..., 0] (16 0).Can also be by medium range
0.32V is added to above-mentioned digitally coded fixed position (for example, most preceding or last etc.) by two extra orders [1,0].Connect
Get off, digital coding can also be passed to rear class algorithm, for subsequent treatments such as compress speech, identifications.
When signal amplitude is less than the Second Threshold, it is small-signal to judge it, at this moment ADC can be adjusted into small-range,
Such as 0.02V.Then, ADC system can carry out quantification treatment according to quantization digit (for example, 16), and quantified precision is 0.02V/
65536, quantified in this range intervals.For example, simulation 0.02V can be corresponded into digital coding [1,1 ..., 1] (16
1) simulation 0V, and is corresponded to digital coding [0,0 ..., 0] (16 0) by position.Medium range 0.02V can also be passed through two
Position extra order [0,1] is added to above-mentioned digitally coded fixed position (for example, most preceding or last etc.).Next, can be with
Digital coding is passed into rear class algorithm, for subsequent treatments such as compress speech, identifications.
So, embodiments herein adaptively adjusts range scheme based on input signal amplitude, quantifies to compile using 16
Code and 2 ranges coding with outside, it is possible to achieve maximum analog 5V (14dBV) simulates 0.02V (- 130dBV) altogether to minimum
144dB dynamic range, much larger than the dynamic range for the 96dB for fixing 16 bit quantizations.
Even if 2 range codings are included among 16 bits, i.e., 2 ranges using 14 quantization encodings and with are compiled
Code, can also realize maximum analog 5V (14dBV) to minimum simulation 0.02V (- 118dBV) 132dB altogether dynamic range, far
More than the dynamic range for the 96dB for fixing 16 bit quantizations.
Specifically, the embodiment of the present application has the benefit that：
1) it for the signal of different amplitudes, can fully improve ADC quantified precision, optimize quantizing noise；
2) for big signal, it is ensured that quantify cut ridge in the absence of ADC；
3) for middle signal, quantified precision and reduction sample quantization error can be lifted；
4) for small-signal, it can further lift quantified precision and reduction quantifies quantization error.
Exemplary signal process circuit for digital-to-analogue conversion
Fig. 8 illustrates the structural representation of the signal processing circuit for digital-to-analogue conversion according to the embodiment of the present application.
In one embodiment of the application, the signal processing circuit 100 for being used for analog-to-digital conversion can be decoding element.
As shown in figure 8, the signal processing circuit 100 for analog-to-digital conversion can include：Decoder 210.
The decoder 210 can receive the encoded signal as input, and the encoded signal is separated into quantization encoding portion
Divide and mode encoding portion, and the quantization encoding part is decoded according to the mode encoding portion, to generate
The signal amplitude of stairstep signal.
For example, the decoder 210 can select one according to the mode encoding portion among multiple range voltages
Individual range voltage, multiple quantizations is obtained according to default quantization digit using selected range voltage as the reference voltage
Level, and obtain the signal amplitude using the quantization encoding part and the multiple quantization level.
For example, the decoder 210 can be determined and current quantization encoding according to the binary number of mode encoding portion
The range voltage that part correspondence is used, and the weight voltage of each can be calculated according to the digit of quantization encoding part.So
Afterwards, each of the binary number of quantization encoding part according to the size of weight voltage can be converted to phase by the decoder 210
The analog quantity answered, then will represent everybody analog quantity and is added, it is possible to obtain the analog quantity being directly proportional to the digital quantity.
For example, the decoder 210 can be by digital register, analog switch, reference voltage source, resistor network and amplifier
Etc. several parts composition.Because decoding process is actually de-quantization process, it is to implement in first embodiment and second
The inverse process of quantizing process described in example, omits its detailed description herein.
In another embodiment of the application, the signal processing circuit 100 for being used for analog-to-digital conversion can also be that digital-to-analogue turns
Parallel operation (DAC).
Therefore, the signal processing circuit 100 for analog-to-digital conversion can also include：Wave filter 220.
The wave filter 220 can be electrically connected with the decoder 210, for receiving the ladder from the decoder 210
Signal, and the stairstep signal is smoothed, to generate analog signal as output.
For example, the stepped signal that the wave filter 220 can be formed to decoder 210 carries out LPF, to cause
Stepped signal smoothing, so as to generate Time Continuous, amplitude also continuous analog signal.
As can be seen here, using the signal processing system according to the embodiment of the present application, can after encoded signal is received,
The encoded signal is separated into quantization encoding part and mode encoding portion, and according to the mode encoding portion come to institute
State quantization encoding part to be decoded, to generate the signal amplitude of stairstep signal.Further, it is also possible to further enter to stairstep signal
Row filtering, preferably to recover original analog signal.It therefore, it can the number obtained by by way of dynamic quantization range
Word signal reverts to original analog signal again, it is achieved thereby that efficient de-quantization process.
Exemplary signal processing method
Fig. 9 illustrates the schematic flow sheet of the signal processing method for analog-to-digital conversion according to the embodiment of the present application.
As shown in figure 9, the signal processing method for analog-to-digital conversion can include：
In step s 110, signal amplitude and at least one threshold amplitude of the sampled signal in each sampling period are compared,
And export comparative result；
In the step s 120, a range voltage conduct is selected among multiple range voltages according to the comparative result
Output；And
In step s 130, the signal amplitude is quantified according to selected range voltage, and output quantity
Change level.
In one embodiment, step S120 can include：Indicate that the signal amplitude is big in the comparative result
When first threshold amplitude, the first range voltage is exported；And indicate the signal amplitude in the comparative result
During less than the first threshold amplitude, the second range voltage is exported, the first range voltage is more than the second range voltage.
In one embodiment, step S120 can include：Indicate that the signal amplitude is big in the comparative result
When the first threshold amplitude, the first range voltage is exported；The signal is indicated in the comparative result
When amplitude is less than the first threshold amplitude but is more than or equal to Second Threshold amplitude, the second range voltage is exported；And
When the comparative result indicates that the signal amplitude is less than the Second Threshold amplitude, the 3rd range voltage is exported, it is described
Second range voltage is more than the 3rd range voltage.
In one embodiment, step S130 can include：Using selected range voltage as the reference voltage, root
Multiple quantization levels are obtained according to default quantization digit；And using one of the multiple quantization level come to the signal width
Degree carries out approximate representation.
In one embodiment, the signal processing method for analog-to-digital conversion can also include：Receive the mould as input
Intend signal；And the analog signal is sampled according to the sampling period, to generate the sampled signal.
In one embodiment, the signal processing method for analog-to-digital conversion can also include：Utilize default quantization
Number to carry out digital coding to the quantization level, with generating quantification coded portion.
In one embodiment, the signal processing method for analog-to-digital conversion can also include：According to selected range
Voltage carrys out generation mode coded portion；And the mode encoding portion and the quantization encoding part are combined, to generate coding
Signal is used as output.
Figure 10 illustrates the schematic flow sheet of the signal processing method for digital-to-analogue conversion according to the embodiment of the present application.
As shown in Figure 10, the signal processing method for digital-to-analogue conversion can include：
In step S210, the encoded signal as input is received；
In step S220, the encoded signal is separated into quantization encoding part and mode encoding portion；And
In step S230, the quantization encoding part is decoded according to the mode encoding portion, to generate
The signal amplitude of stairstep signal.
In one embodiment, step S230 can include：According to the mode encoding portion come electric from multiple ranges
A range voltage is selected among pressure；Using selected range voltage as the reference voltage, according to default quantization digit come
Obtain multiple quantization levels；And the signal width is obtained using the quantization encoding part and the multiple quantization level
Degree.
In one embodiment, the signal processing method for digital-to-analogue conversion can also include：The stairstep signal is entered
Row smoothing processing, to generate analog signal as output.
The concrete function of above-mentioned each step in modulus and the signal processing method of digital-to-analogue conversion and operation are
, will above with reference to Fig. 1 to Fig. 8 descriptions for being discussed in detail in modulus and the signal handling equipment of digital-to-analogue conversion, and therefore
Omit its repeated description.
The general principle of the application is described above in association with specific embodiment, however, it is desirable to, it is noted that in this application
Advantage, advantage, effect referred to etc. is only exemplary rather than limitation, it is impossible to which it is the application to think these advantages, advantage, effect etc.
Each embodiment is prerequisite.In addition, detail disclosed above is merely to the effect of example and the work readily appreciated
With, and it is unrestricted, above-mentioned details is not intended to limit the application to realize using above-mentioned concrete details.
The device that is related in the application, device, equipment, the block diagram of system only illustratively the example of property and are not intended to
It is required that or hint must be attached in the way of square frame is illustrated, arrange, configure.As it would be recognized by those skilled in the art that
, it can connect, arrange by any-mode, configuring these devices, device, equipment, system.Such as " comprising ", "comprising", " tool
Have " etc. word be open vocabulary, refer to " including but is not limited to ", and can be with its used interchangeably.Vocabulary used herein above
"or" and " and " refer to vocabulary "and/or", and can be with its used interchangeably, unless it is not such that context, which is explicitly indicated,.Here made
Vocabulary " such as " refers to phrase " such as, but not limited to ", and can be with its used interchangeably.
It may also be noted that in device, apparatus and method in the application, each part or each step are to decompose
And/or reconfigure.These decompose and/or reconfigured the equivalents that should be regarded as the application.
The above description of disclosed aspect is provided so that any person skilled in the art can make or use this
Application.Various modifications in terms of these are readily apparent to those skilled in the art, and defined herein
General Principle can apply to other aspect without departing from scope of the present application.Therefore, the application is not intended to be limited to
Aspect shown in this, but according to the widest range consistent with the feature of principle disclosed herein and novelty.
In order to which purpose of illustration and description has been presented for above description.In addition, this description is not intended to the reality of the application
Apply example and be restricted to form disclosed herein.Although already discussed above multiple exemplary aspects and embodiment, this area skill
Art personnel will be recognized that its some modifications, modification, change, addition and sub-portfolio.
Claims (11)
1. a kind of signal processing circuit for analog-to-digital conversion, it is characterised in that the circuit includes：
Comparator, for comparing signal amplitude and at least one threshold amplitude of the sampled signal in each sampling period, and it is defeated
Go out comparative result；
Switching device, is electrically connected with the comparator, for receiving the comparative result from the comparator, and according to described
Comparative result carrys out among multiple range voltages to select a range voltage as output；And
Quantizer, is electrically connected with the switching device, for receiving selected range voltage from the switching device, according to institute
The range voltage of selection quantifies to the signal amplitude, and output quantization level.
2. circuit as claimed in claim 1, it is characterised in that the switching device indicates the letter in the comparative result
When number amplitude is more than or equal to first threshold amplitude, the first range voltage is exported；And indicated in the comparative result described
When signal amplitude is less than the first threshold amplitude, the second range voltage is exported,
The first range voltage is more than the second range voltage.
3. circuit as claimed in claim 2, it is characterised in that the switching device indicates the letter in the comparative result
When number amplitude is more than or equal to the first threshold amplitude, the first range voltage is exported；Indicated in the comparative result
When the signal amplitude is less than the first threshold amplitude but is more than or equal to Second Threshold amplitude, second range is exported
Voltage；And when the comparative result indicates that the signal amplitude is less than the Second Threshold amplitude, export the 3rd range
Voltage,
The second range voltage is more than the 3rd range voltage.
4. circuit as claimed in claim 1, it is characterised in that the quantizer is used as reference using selected range voltage
Voltage, multiple quantization levels are obtained according to default quantization digit, and using one of the multiple quantization level come to institute
State signal amplitude and carry out approximate representation.
5. circuit as claimed in claim 4, it is characterised in that among the multiple quantization level two neighboring quantization level it
Between quantized interval meet：
<mrow>
<mi>&Delta;</mi>
<mo>=</mo>
<mfrac>
<mrow>
<mi>V</mi>
<mi>r</mi>
</mrow>
<msup>
<mn>2</mn>
<mi>N</mi>
</msup>
</mfrac>
</mrow>
Wherein, Δ is quantized interval, and Vr is reference voltage, and N is quantization digit.
6. circuit as claimed in claim 1, it is characterised in that the circuit also includes：
Sampler, is electrically connected with the comparator, for receiving the analog signal as input, and according to the sampling period
To be sampled to the analog signal, to generate the sampled signal and be output to the comparator.
7. circuit as claimed in claim 1, it is characterised in that the circuit also includes：
Encoder, is electrically connected with the quantizer, for receiving the quantization level from the quantizer, and is utilized default
Quantization digit to carry out digital coding to the quantization level, with generating quantification coded portion.
8. circuit as claimed in claim 7, it is characterised in that the encoder is generated always according to selected range voltage
Mode encoding portion, and combine the mode encoding portion and the quantization encoding part, to generate encoded signal as defeated
Go out.
9. a kind of signal processing circuit for digital-to-analogue conversion, it is characterised in that the circuit includes：
Decoder, for receiving the encoded signal as input, quantization encoding part and pattern are separated into by the encoded signal
Coded portion, and the quantization encoding part is decoded according to the mode encoding portion, to generate stairstep signal
Signal amplitude.
10. circuit as claimed in claim 9, it is characterised in that the decoder is according to the mode encoding portion come from many
A range voltage is selected among individual range voltage, according to default amount using selected range voltage as the reference voltage
Change digit to obtain multiple quantization levels, and obtain described using the quantization encoding part and the multiple quantization level
Signal amplitude.
11. circuit as claimed in claim 9, it is characterised in that the circuit also includes：
Wave filter, is electrically connected with the decoder, for receiving the stairstep signal from the decoder, and to the ladder
Signal is smoothed, to generate analog signal as output.
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| CN201720147800.5U CN206481290U (en) | 2017-02-17 | 2017-02-17 | For modulus and the signal processing circuit of digital-to-analogue conversion |
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