CN206480025U - Pattern classifier based on RBF - Google Patents

Abstract

The utility model provides a kind of pattern classifier based on RBF, and it includes first to fourth RBF neuron circuits module, first to fourth resistance and the first to the 5th Gilbert multipliers；The current output terminal of described first to the 5th Gilbert multipliers is sequentially connected the output end I as grader_out；The output of first RBF neuron circuits connects the first input of first resistor one end and the first Gilbert multipliers respectively；The first resistor other end is grounded respectively and the first Gilbert multipliers second are inputted；The output of 2nd RBF neuron circuits connects the first input of second resistance one end and the 2nd Gilbert multipliers respectively；The second resistance other end is grounded respectively and the 2nd Gilbert multipliers second are inputted；The output of 3rd RBF neuron circuits connects 3rd resistor one end respectively and the 4th Gilbert multipliers first are inputted；The 3rd resistor other end is grounded respectively and the 4th Gilbert multipliers second are inputted；The output of 4th RBF neuron circuits connects the 4th resistance one end and the 5th Gilbert multipliers respectively；The 4th resistance other end is grounded respectively and the 5th Gilbert multipliers second are inputted.The grader with having the advantages that Residuated Lattice, it is portability, high speed, expansible.

Description

Pattern classifier based on RBF

Technical field

The utility model is related to a kind of pattern classifier, and in particular to a kind of pattern classifier based on RBF.

Background technology

The theoretical model of RBF (RBF, Radial Basic Function) neutral net is in pattern classification, letter Number approach wait artificial intelligence field be widely used, but at present be also concentrated mainly on traditional computer software simulate In realization.Realization of the RBF neutral nets on software is all to use universal cpu processor, it has not been convenient to be embedded into other application system In system, and study computing is completed by the general-purpose computing system of bulky, do not possess portability.In calculating process In, CPU be often RBF to be waited until neuron calculated one by one after, then calculate the long and, use Serial computing mode, speed is slower.Therefore, the software of RBF neural, which is realized, is difficult to meet it in artificial intelligence application field At a high speed, it is portable, can be embedded in terms of requirement.

The hardware of RBF neural is realized, special neural network chip can be integrated into, with small volume, carrying side Just the characteristics of, easily it is embedded into other systems and realizes special function.In addition, it can also realize the parallel computation of height, gram The defect that RBF neural is realized on software is taken.Therefore, the Research of Hardware Implementation of RBF neural is significant.

The content of the invention

It is suitable by parallel connection the utility model proposes a kind of analog circuit implementation of the pattern classifier based on RBF When the pattern classifier of quantity, appropriate extraneous bias voltage is given, can be achieved to reflect the point that can not be divided in a space Another space is mapped to, so that the point that script can not be divided carries out simply linear partition, the function of implementation pattern classification.

The utility model is achieved through the following technical solutions：A kind of pattern classifier based on RBF, it is characterised in that：Bag Include first to fourth RBF neuron circuits module, first to fourth resistance and the first to the 5th Gilbert multipliers；Described The current output terminal of one to the 5th Gilbert multipliers is sequentially connected the output end I as grader_out；First RBF neurons The output of circuit connects the first input of first resistor one end and the first Gilbert multipliers respectively；The first resistor other end is distinguished Ground connection and the first Gilbert multipliers second are inputted；The output of 2nd RBF neuron circuits connect respectively second resistance one end and First input of the 2nd Gilbert multipliers；The second resistance other end is grounded respectively and the 2nd Gilbert multipliers second are defeated Enter；The output of 3rd RBF neuron circuits connects 3rd resistor one end respectively and the 4th Gilbert multipliers first are inputted；3rd The resistance other end is grounded respectively and the 4th Gilbert multipliers second are inputted；The output of 4th RBF neuron circuits connects respectively Four resistance one end and the 5th Gilbert multipliers；The 4th resistance other end is grounded respectively and the 5th Gilbert multipliers second are defeated Enter；First output end of the first RBF neuron circuit modules is V_x, the second output end is V_x0, the 3rd output end is V_y, the Four output ends are V_y0；First output end of the 2nd RBF neuron circuit modules is V_x, the second output end is V_x0', the 3rd Output end is V_y, the 4th output end is V_y0'；First output end of the 3rd RBF neuron circuit modules is V_x, the second output Hold as V_x0", the 3rd output end is V_y, the 4th output end is V_y0”；First output end of the 4th RBF neuron circuit modules For V_x, the second output end is V_x0" ', the 3rd output end is V_y, the 4th output end is V_y0”'；First Gilbert multipliers first are defeated It is V to go out end_w1, the second output end is V_w2, the 2nd the first output end of Gilbert multipliers is V_w1', the second output end is V_w2'；The Three the first output ends of Gilbert multipliers are V_w1", the second output end is V_w2”；4th the first output end of Gilbert multipliers is V_w1" ', the second output end is V_w2”'；5th the first output end of Gilbert multipliers is V_w1" ", the second output end V_w2" ", the 3rd 3rd end of Gilbert multipliers is V_b。

In the embodiment of the utility model one, Gilbert multipliers include the first to the 17th transistor M₁~M₁₇；The One transistor to the 6th transistor M₁~M₆Emitter stage link together and connect high level；The first transistor M₁Base stage connect second Transistor M₂Base stage；The first transistor M₁Colelctor electrode connect and meet the 9th transistor M respectively₉Emitter stage and the tenth transistor M₁₀ Emitter stage；Second transistor M₂Base stage connect the colelctor electrode of second transistor；Second transistor M₂Colelctor electrode connect the 7th crystal Pipe M₇Colelctor electrode；Third transistor M₃Base stage meet the 4th transistor M₄Base stage；Third transistor M₃Base stage connect the 3rd Transistor M₃Colelctor electrode；Third transistor M₃Colelctor electrode meet the 8th transistor M₈Colelctor electrode；4th transistor M₄Collection Electrode pole meets the 11st transistor M respectively₁₁Emitter stage and the tenth two-transistor M₁₂Emitter stage；5th transistor M₅Base stage Meet the 6th transistor M₆Base stage；5th transistor M₅Base stage meet the 5th transistor M₅Colelctor electrode；5th transistor M₅Collection Electrode meets the 14th transistor M₁₄Colelctor electrode；6th transistor M₆Colelctor electrode meet the 17th transistor M respectively₁₇Colelctor electrode And output I_out1；7th transistor M₇Base stage meet V_w1；7th transistor M₇Emitter stage connect the emitter stage of the 8th transistor respectively And the 13rd transistor M₁₃Colelctor electrode；8th transistor M₈Base stage meet V_w2；9th transistor M₉Base stage to connect the 12nd brilliant Body pipe M₁₂Base stage；9th transistor M₉Colelctor electrode meet the 11st transistor M respectively₁₁Colelctor electrode and the 15th transistor M₁₅Colelctor electrode；Tenth transistor M₁₀Base stage meet the 11st transistor M₁₁Base stage；Tenth transistor M₁₀Colelctor electrode difference Meet the tenth two-transistor M₁₂Colelctor electrode and the 16th transistor M₁₆Colelctor electrode；9th transistor M₉With the tenth transistor M₁₀ Base stage meet V respectively_inBoth positive and negative polarity；13rd transistor M₁₃Base stage meet bias voltage V_bias；14th transistor M₁₄Base The transistor M of pole the 15th₁₅Base stage；15th transistor M₁₅Base stage connect its colelctor electrode；16th transistor M₁₆Base stage connect 17th pipe M₁₇Base stage；16th transistor M₁₆Base stage connect its colelctor electrode；The emitter stage of 13rd to the 17th transistor connects Connect and be grounded together.

In the embodiment of the utility model one, the sqrt circuit includes the 18th to the 26th transistor M₁₈~ M₂₆；The 18th transistor M₁₈Colelctor electrode and the 19th transistor M₁₉Base stage connection is used as sqrt circuit input end I_in； 18th transistor M₁₈Base stage meets the 26th transistor M respectively₂₆Base stage, the 19th transistor M₁₉Emitter stage and the 24th Transistor M₂₄Colelctor electrode；19th transistor M₁₉Base stage meets the 21st transistor M₂₁Base stage；20th transistor M₂₀Base stage Connect its colelctor electrode；21st transistor M₂₁Emitter stage meets the 20th transistor M₂₀Colelctor electrode；21st transistor M₂₁Current collection Pole meets the 20th two-transistor M₂₂Colelctor electrode；20th two-transistor M₂₂Base stage connects the 23rd transistor base；19th is brilliant Body pipe M₁₉Colelctor electrode, the 20th two-transistor M₂₂Emitter stage and the 23rd transistor M₂₃Emitter stage, which links together, connects high electricity It is flat；23rd transistor M₂₃Colelctor electrode meets the 25th transistor M respectively₂₅Colelctor electrode and output I_out2；24th crystal Pipe M₂₄Base stage meets the 25th transistor M respectively₂₅Base stage and output end V_b；26th transistor M₂₆Colelctor electrode connects output I_out2；18th transistor M₁₈Colelctor electrode and the 24th the 26th transistor M₂₄~M₂₆Emitter stage links together ground connection.

In the embodiment of the utility model one, it is brilliant that the class Gaussian function generation circuit includes the 27th to the 52nd Body pipe M₂₇~M₅₂；27th transistor M₂₇Emitter stage, the 28th transistor M₂₈Emitter stage and the 35th to the 4th Ten two-transistor M₃₅~M₄₂Emitter stage, which links together, connects high level；The 27th transistor M₂₇Base stage connects second respectively 17 transistor M₂₇Colelctor electrode and the 28th transistor M₂₈Base stage；27th transistor M₂₇Colelctor electrode connect the 20th Nine transistor M₂₉Emitter stage；28th transistor M₂₈Colelctor electrode meets the 30th transistor M₃₀Emitter stage；29th is brilliant Body pipe M₂₉Base stage meets the 29th transistor M respectively₂₉Colelctor electrode meets the 30th transistor M₃₀Base stage；29th transistor M₂₉ Colelctor electrode meets the 31st transistor M₃₁Colelctor electrode；30th transistor M₃₀Colelctor electrode meets the 47th transistor M₄₇Colelctor electrode； 31st transistor M₃₁Colelctor electrode connects its base stage；31st transistor M₃₁Base stage meets the 31st transistor M respectively₃₁Collection Electrode and the 30th two-transistor M₃₂Base stage；31st transistor M₃₁Emitter stage meets the 33rd M₃₃Colelctor electrode；32nd Transistor M₃₂Colelctor electrode meets the 35th M₃₅Colelctor electrode；30th two-transistor M₃₂Emitter stage meets the 34th transistor M₃₄Collection Electrode；33rd transistor M₃₃Base stage meets the 33rd transistor M respectively₃₃Colelctor electrode and the 34th transistor M₃₄Base stage； 33rd transistor M₃₃Emitter stage, the 34th transistor M₃₄Emitter stage, the 50th to the 50th two-transistor emitter stage connect Be connected together ground connection；35th transistor M₃₅Base stage connects the 35th transistor M respectively₃₅Colelctor electrode, the 36th crystal Pipe M₃₆Base stage, the 41st transistor M₄₁Base stage and the 40th two-transistor M₄₂Base stage；36th transistor M₃₆Colelctor electrode connects 37th transistor M₃₇Base stage；37th transistor M₃₇Colelctor electrode meets the 43rd transistor M respectively₄₃Colelctor electrode and connect 45th transistor M₄₅Colelctor electrode；37th transistor M₃₇Base stage meets the 38th transistor M₃₈Base stage；38th is brilliant Body pipe M₃₈Base stage, the 39th transistor M₃₉Colelctor electrode, the 40th two-transistor M₄₂Colelctor electrode, which links together, connects output I_out3；39th transistor M₃₉Base stage meets the 40th transistor M respectively₄₀Base stage and the 41st transistor M₄₁Colelctor electrode；The 40 transistor M₄₀Colelctor electrode meets the 44th transistor M respectively₄₄Colelctor electrode and the 46th transistor M₄₆Colelctor electrode；4th 13 transistor M₄₃Base stage and the 46th transistor M₄₆Base stage meets input V together_in, the 43rd transistor M₄₃Emitter stage point The 44th transistor M is not met₄₄Emitter stage and the 48th transistor M₄₈Colelctor electrode；44th transistor M₄₄Base stage meets V₁； 45th transistor M₄₅Base stage meets V₂；45th transistor M₄₅Emitter stage meets the 46th transistor M respectively₄₆Emitter stage And the 49th transistor M₄₉Colelctor electrode；47th transistor M₄₇Base stage distinguishes the 47th transistor M₄₇Colelctor electrode, the 4th 18 transistor M₄₈Base stage, the 49th transistor M₄₉Base stage；47th transistor M₄₇Emitter stage meets the 50th transistor M₅₀ Colelctor electrode；48th transistor M₄₈Colelctor electrode meets the 51st transistor M₅₁Colelctor electrode；49th transistor M₄₉Transmitting Pole meets the 50th two-transistor M₅₂Colelctor electrode；50th transistor M₅₀Base stage meets the 50th transistor M respectively₅₀Colelctor electrode, the 5th 11 transistor M₅₁Base stage, the 50th two-transistor M₅₂Base stage.

It is suitable by parallel connection the utility model proposes a kind of analog circuit implementation of the pattern classifier based on RBF When the pattern classifier of quantity, appropriate extraneous bias voltage is given, the function of pattern classification can be achieved.The utility model can collect As special neural network chip, there is small volume, be convenient for carrying, can be embedded in, it is possible to achieve the parallel meter of height Calculate, the volume for overcoming software implementation pattern grader is big, not portable, be difficult the defect that is embedded in, arithmetic speed is slow.This practicality It is new can also be by suitably increasing the number of RBF neuron circuit modules or by the way that the utility model to be carried out to side in parallel Formula, carrys out the function of expanded circuit, it is solved more complicated pattern classification problem.The utility model is by its Residuated Lattice, just The property taken, high speed, it is expansible the advantages of, be expected to be widely used in artificial intelligence fields such as pattern classifications.

Brief description of the drawings

Fig. 1 is the schematic diagram of pattern classifier.

Fig. 2 is the schematic diagram of pattern classifier.

Fig. 3 is the transistor-level schematic of Gilbert multipliers.

Fig. 4 is the transistor-level schematic of sqrt circuit.

The transistor-level schematic of Fig. 5 class Gaussian function generation circuits.

The analogous diagram of Fig. 6 class Gaussian function generation circuits.

The simulation waveform of Fig. 7 class Gaussian function generation circuits and ideal Gaussian function comparison diagram.

The distribution map of five points of Fig. 8.

The functional simulation figure of Fig. 9 pattern classifiers.

Embodiment

The utility model is described further with reference to the accompanying drawings and detailed description.

The utility model utilizes Gilbert multipliers, sqrt circuit, and these are substantially electric for class Gaussian function generation circuit Road unit devises a pattern classifier based on RBF.As shown in figure 1, the pattern classifier has two input (V_x, V_y), One output end (I_out), and 21 control end (wherein (V_x0, V_y0), (V_x0', V_y0'), (V_x0", V_y0"), (V_x0" ', V_y0" ') respectively represent four class Gaussian functions center (i.e. control input-hidden layer weights), V₁And V₂For controlling class high The shape (i.e. control input-hidden layer threshold value) of this function, (V_w1, V_w2), (V_w1', V_w2'), (V_w1", V_w2"), (V_w1" ', V_w2" '), (V_w1" ", V_w2" ") it is respectively intended to (V in five implicit-output layer weights of control, Fig. 2_w1", V_w2") control it is implicit- 1) output layer weights are defaulted as, V_bFor controlling to imply-output layer threshold value).By loading appropriate bias voltage in control end, Just the function that several points on two dimensional surface are correctly classified can be realized.The data of point i.e. on two dimensional surface are by (V_x, V_y) Some points in plane are classified as Type1 by input, the pattern classifier, now network output I_outFor 1；And by plane other one A little points are classified as Type2, now network output I_outFor 0.

Schematic diagram of the present utility model as shown in Fig. 2 the grader include first to fourth RBF neuron circuits module, First to fourth resistance and the first to the 5th Gilbert multipliers；The electric current output of described first to the 5th Gilbert multipliers End is sequentially connected the output end I as grader_out；The output of first RBF neuron circuits connects first resistor one end and respectively First input of one Gilbert multipliers；The first resistor other end is grounded respectively and the first Gilbert multipliers second are inputted； The output of 2nd RBF neuron circuits connects the first input of second resistance one end and the 2nd Gilbert multipliers respectively；Second electricity The resistance other end is grounded respectively and the 2nd Gilbert multipliers second are inputted；The output of 3rd RBF neuron circuits connects the 3rd respectively Resistance one end and the 4th Gilbert multipliers first are inputted；The 3rd resistor other end is grounded and the 4th Gilbert multiplication respectively Device second is inputted；The output of 4th RBF neuron circuits connects the 4th resistance one end and the 5th Gilbert multipliers respectively；4th The resistance other end is grounded respectively and the 5th Gilbert multipliers second are inputted；The first of the first RBF neuron circuit modules Output end is V_x, the second output end is V_x0, the 3rd output end is V_y, the 4th output end is V_y0；The 2nd RBF neurons electricity First output end of road module is V_x, the second output end is V_x0', the 3rd output end is V_y, the 4th output end is V_y0'；Described First output end of three RBF neuron circuit modules is V_x, the second output end is V_x0", the 3rd output end is V_y, the 4th output end For V_y0”；First output end of the 4th RBF neuron circuit modules is V_x, the second output end is V_x0" ', the 3rd output end is V_y, the 4th output end is V_y0”'；First the first output end of Gilbert multipliers is V_w1, the second output end is V_w2, second The output end of Gilbert multipliers first is V_w1', the second output end is V_w2'；3rd the first output end of Gilbert multipliers is V_w1", the second output end is V_w2”；4th the first output end of Gilbert multipliers is V_w1" ', the second output end is V_w2”'；5th The output end of Gilbert multipliers first is V_w1" ", the second output end V_w2" ", the 3rd end of the 3rd Gilbert multipliers is V_b。

Fig. 3 is the transistor-level schematic of Gilbert multipliers, and it is widely used in realizing on a large scale in neutral net Handle Σ function.The dynamic range of collapsible Gilbert multipliers is big, the precision of multiplying is high.RBF neuron circuit moulds Block includes two Gilbert multipliers, sqrt circuit and class Gaussian function generation circuit.Gilbert multipliers include First to the 17th transistor M₁~M₁₇；The first transistor is to the 6th transistor M₁~M₆Emitter stage link together and connect high electricity It is flat；The first transistor M₁Base stage meet second transistor M₂Base stage；The first transistor M₁Colelctor electrode connect that to connect the 9th respectively brilliant Body pipe M₉Emitter stage and the tenth transistor M₁₀Emitter stage；Second transistor M₂Base stage connect the colelctor electrode of second transistor； Second transistor M₂Colelctor electrode meet the pipe M of the 7th crystal₇Colelctor electrode；Third transistor M₃Base stage meet the 4th transistor M₄ Base stage；Third transistor M₃Base stage meet third transistor M₃Colelctor electrode；Third transistor M₃Colelctor electrode connect the 8th crystal Pipe M₈Colelctor electrode；4th transistor M₄Colelctor electrode pole meet the 11st transistor M respectively₁₁Emitter stage and the tenth two-transistor M₁₂Emitter stage；5th transistor M₅Base stage meet the 6th transistor M₆Base stage；5th transistor M₅Base stage connect the 5th crystal Pipe M₅Colelctor electrode；5th transistor M₅Colelctor electrode meet the 14th transistor M₁₄Colelctor electrode；6th transistor M₆Colelctor electrode The 17th transistor M is met respectively₁₇Colelctor electrode and output I_out1；7th transistor M₇Base stage meet V_w1；7th transistor M₇'s Emitter stage connects the emitter stage and the 13rd transistor M of the 8th transistor respectively₁₃Colelctor electrode；8th transistor M₈Base stage connect V_w2；9th transistor M₉Base stage meet the tenth two-transistor M₁₂Base stage；9th transistor M₉Colelctor electrode connect the 11st respectively Transistor M₁₁Colelctor electrode and the 15th transistor M₁₅Colelctor electrode；Tenth transistor M₁₀Base stage meet the 11st transistor M₁₁ Base stage；Tenth transistor M₁₀Colelctor electrode meet the tenth two-transistor M respectively₁₂Colelctor electrode and the 16th transistor M₁₆Collection Electrode；9th transistor M₉With the tenth transistor M₁₀Base stage meet V respectively_inBoth positive and negative polarity；13rd transistor M₁₃Base stage connect Bias voltage V_bias；14th transistor M₁₄The transistor M of base stage the 15th₁₅Base stage；15th transistor M₁₅Base stage Connect its colelctor electrode；16th transistor M₁₆Base stage meet the 17th pipe M₁₇Base stage；16th transistor M₁₆Base stage connect its current collection Pole；The emitter stage of 13rd to the 17th transistor connects ground connection.The transistor size of Gilbert multipliers is referring to table 1.

Table 1

Pipe title	Breadth length ratio (W/L)	Pipe title	Breadth length ratio (W/L)
				M1	60/1	M10	15/1
M2	60/1	M11	15/1
				M3	60/1	M12	15/1
M4	60/1	M13	100/1
				M5	60/1	M14	40/1
M6	60/1	M15	40/1
				M7	5/1	M16	40/1
M8	5/1	M17	40/1
				M9	15/1

The transistor-level schematic of sqrt circuit is as shown in figure 4, its core is by M₁₈, M₁₉, M₂₀And M₂₁Structure Into translinear structures, M₂₀Pipe and M₂₁The breadth length ratio of pipe is M₁₈Pipe and M₁₉4 times of the breadth length ratio of pipe, the circuit can be real Now to electric current sqrt.Specifically in the embodiment of the utility model one, the sqrt circuit includes the 18th to the 26 transistor M₁₈~M₂₆；The 18th transistor M₁₈Colelctor electrode and the 19th transistor M₁₉Base stage connection, which is used as, opens flat Root circuits input I_in；18th transistor M₁₈Base stage meets the 26th transistor M respectively₂₆Base stage, the 19th transistor M₁₉ Emitter stage and the 24th transistor M₂₄Colelctor electrode；19th transistor M₁₉Base stage meets the 21st transistor M₂₁Base stage；Second Ten transistor M₂₀Base stage connects its colelctor electrode；21st transistor M₂₁Emitter stage meets the 20th transistor M₂₀Colelctor electrode；20th One transistor M₂₁Colelctor electrode meets the 20th two-transistor M₂₂Colelctor electrode；20th two-transistor M₂₂Base stage connects the 23rd crystal Pipe base stage；19th transistor M₁₉Colelctor electrode, the 20th two-transistor M₂₂Emitter stage and the 23rd transistor M₂₃Emitter stage connects Be connected together high level；23rd transistor M₂₃Colelctor electrode meets the 25th transistor M respectively₂₅Colelctor electrode and output I_out2；24th transistor M₂₄Base stage meets the 25th transistor M respectively₂₅Base stage and output end V_b；26th transistor M₂₆Colelctor electrode meets output I_out2；18th transistor M₁₈Colelctor electrode and the 24th the 26th transistor M₂₄~M₂₆Emitter stage Link together ground connection.The transistor size of sqrt circuit is referring to table 2.

Table 2

Pipe title	Breadth length ratio (W/L)
		M1	25/1
M2	25/1
		M3	50/1
M4	50/1
		M5	100/1
M6	100/1
		M7	30/1
M8	30/1
		M9	25/1

The transistor-level schematic of Gaussian circuit is as shown in figure 5, the class Gaussian function generation circuit includes the 27 to the 50th two-transistor M₂₇~M₅₂；27th transistor M₂₇Emitter stage, the 28th transistor M₂₈Emitter stage and 35th to the 40th two-transistor M₃₅~M₄₂Emitter stage, which links together, connects high level；27th transistor M₂₇Base stage meets the 27th transistor M respectively₂₇Colelctor electrode and the 28th transistor M₂₈Base stage；27th transistor M₂₇ Colelctor electrode meet the 29th transistor M₂₉Emitter stage；28th transistor M₂₈Colelctor electrode meets the 30th transistor M₃₀Hair Emitter-base bandgap grading；29th transistor M₂₉Base stage meets the 29th transistor M respectively₂₉Colelctor electrode meets the 30th transistor M₃₀Base stage；The 29 transistor M₂₉Colelctor electrode meets the 31st transistor M₃₁Colelctor electrode；30th transistor M₃₀Colelctor electrode connects the 47th Transistor M₄₇Colelctor electrode；31st transistor M₃₁Colelctor electrode connects its base stage；31st transistor M₃₁Base stage connects respectively 31 transistor M₃₁Colelctor electrode and the 30th two-transistor M₃₂Base stage；31st transistor M₃₁Emitter stage connects the 33rd M₃₃Colelctor electrode；30th two-transistor M₃₂Colelctor electrode meets the 35th M₃₅Colelctor electrode；30th two-transistor M₃₂Emitter stage connects 34 transistor M₃₄Colelctor electrode；33rd transistor M₃₃Base stage meets the 33rd transistor M respectively₃₃Colelctor electrode and the 3rd 14 transistor M₃₄Base stage；33rd transistor M₃₃Emitter stage, the 34th transistor M₃₄Emitter stage, the 50th to the 5th Ten two-transistor emitter stages link together ground connection；35th transistor M₃₅Base stage connects the 35th transistor M respectively₃₅ Colelctor electrode, the 36th transistor M₃₆Base stage, the 41st transistor M₄₁Base stage and the 40th two-transistor M₄₂Base stage；3rd 16 transistor M₃₆Colelctor electrode meets the 37th transistor M₃₇Base stage；37th transistor M₃₇Colelctor electrode connects the 40th respectively Three transistor M₄₃Colelctor electrode and meet the 45th transistor M₄₅Colelctor electrode；37th transistor M₃₇It is brilliant that base stage connects the 38th Body pipe M₃₈Base stage；38th transistor M₃₈Base stage, the 39th transistor M₃₉Colelctor electrode, the 40th two-transistor M₄₂Current collection Pole, which links together, meets output I_out3；39th transistor M₃₉Base stage meets the 40th transistor M respectively₄₀Base stage and the 41st Transistor M₄₁Colelctor electrode；40th transistor M₄₀Colelctor electrode meets the 44th transistor M respectively₄₄Colelctor electrode and the 46th crystalline substance Body pipe M₄₆Colelctor electrode；43rd transistor M₄₃Base stage and the 46th transistor M₄₆Base stage meets input V together_in, the 43rd Transistor M₄₃Emitter stage meets the 44th transistor M respectively₄₄Emitter stage and the 48th transistor M₄₈Colelctor electrode；44th Transistor M₄₄Base stage meets V₁；45th transistor M₄₅Base stage meets V₂；45th transistor M₄₅Emitter stage connects the 40th respectively Six transistor M₄₆Emitter stage and the 49th transistor M₄₉Colelctor electrode；47th transistor M₄₇Base stage difference the 47th is brilliant Body pipe M₄₇Colelctor electrode, the 48th transistor M₄₈Base stage, the 49th transistor M₄₉Base stage；47th transistor M₄₇Transmitting Pole meets the 50th transistor M₅₀Colelctor electrode；48th transistor M₄₈Colelctor electrode meets the 51st transistor M₅₁Colelctor electrode；4th 19 transistor M₄₉Emitter stage meets the 50th two-transistor M₅₂Colelctor electrode；50th transistor M₅₀It is brilliant that base stage connects the 50th respectively Body pipe M₅₀Colelctor electrode, the 51st transistor M₅₁Base stage, the 50th two-transistor M₅₂Base stage.The circuit chip pipe size such as institute of table 3 Show.

Table 3

Pipe title	Breadth length ratio (W/L)	Pipe title	Breadth length ratio (W/L)	Pipe title	Breadth length ratio (W/L)
						M27	14/1	M36	100/1	M44	30/1
M28	14/1	M37	100/1	M45	30/1
						M29	14/1	M38	100/1	M46	100/1
M30	14/1	M39	100/1	M47	100/1
						M31	9/1	M40	100/1	M48	100/1
M32	9/1	M41	100/1	M49	100/1
						M33	9/1	M42	100/1	M50	100/1
M34	9/1	M43	30/1	M51	100/1
						M35	100/1	M44	30/1

The method of work of above-mentioned RBF pattern classifier is：The data of point on two dimensional surface are by (V_x, V_y) input, the mould Some points in plane are classified as Type1 by formula grader by judging, now network output I_outFor 1；And by other in plane Point is classified as Type2, now network output Io_utFor 0；The deterministic process of the wherein pattern classifier comprises the following steps：It is wherein defeated Enter to hold V_xAnd V_yThe pattern classifier is entered data into, the function of input layer in RBF neural is completed；(V_x0, V_y0), (V_x0', V_y0'), (V_x0", V_y0"), (V_x0" ', V_y0" ') center that represents four class Gaussian functions respectively is control input-hidden layer power Value, (V_w1, V_w2), (V_w1', V_w2'), (V_w1", V_w2"), (V_w1" ', V_w2" '), (V_w1" ", V_w2" ") be respectively intended to control five it is hidden Containing-output layer weights, (V_w1", V_w2") implicit-output layer weights of control are defaulted as 1, V_bFor controlling to imply-output layer threshold Value；First to fourth RBF neuron circuit modules realize I_out=bexp (- ((V_x-V_x0)²+(V_y-V_y0)²)/d) form of calculation, B and d completes to imply layer function in RBF neural to be constant more than zero；First to the 5th Gilbert multipliers can be right Hidden layer output is weighted summation operation, i.e. I_out=k₁y₁+k₂y₂+k₃y₃+k₄y₄+k₅, k₁, k₂, k₃, k₄, k₅For constant, y1, Y2, y3, y4 are respectively output and the RBF neuron circuit modules of first, second, third, fourth RBF neuron circuit modules Output, finally by output end I_outOutput category result, completes the function of output layer in RBF neural.

Gilbert multipliers include the first to the 17th transistor M₁~M₁₇, wherein the 7th transistor M₇With the 8th crystal Pipe M₈With identical breadth length ratio, the 9th transistor M₉, the tenth transistor M₁₀, the 11st transistor M₁₁With the 12nd M₁₂With phase Same breadth length ratio, transistor channel width is represented with W, L represents transistor channel length, C_oxRepresent transistor unit area grid oxygen Electric capacity, μ_pAnd μ_nThe channel mobility of hole and electronics is represented respectively, then the output current of the circuit is：

By V_w1With V_inAnode be connected, use V_xRepresent, by V_w2With V_in Negative terminal be connected, use V_x0Represent, then can obtain：

That is I_out1=k (V_x-V_x0)², wherein

The M of the sqrt circuit₂₀Pipe and M₂₁The breadth length ratio of pipe is M₁₈Pipe and M₁₉4 times of the breadth length ratio of pipe, to input Electric current sqrtI.e.

The class Gaussian function generation circuit includes the 27th to the 50th two-transistor M₂₇~M₅₂, it is assumed that the 30th Six to the 41st transistor M₃₆~M₄₁With identical breadth length ratio, and it is the 35th transistor M₃₅A times, the 40th Two-transistor M₄₂Breadth length ratio be the 35th transistor M₃₅C times, the 48th transistor M₄₈, the 49th transistor M₄₉, the 51st transistor M₅₁, the 50th be transistor M₅₂With identical breadth length ratio, and it is the 47th transistor M₄₇、 50th transistor M₅₀A times, obtaining output current is：

WhereinC_oxFor transistor unit area grid oxygen electric capacity, μ moves for raceway groove Shifting rate, W is transistor channel width, and L is transistor channel length, by the input voltage V for adjusting two differential pairs₁And V₂, Adjust V_inwcAnd V_w, so as to adjust the shape of the class Gaussian function of the circuit output；Required particular Gaussian function isSome discrete points of required particular Gaussian function are taken, by CADENCE software emulations, in formula (2) Guidance under adjust circuit parameter it is final to obtain what is approached so that the corresponding point of class Gaussian function approaches these discrete points Class Gaussian function I_out=bexp (- ((V_x-V_x0)²+(V_y-V_y0)²)/d)。

By the input voltage V for adjusting two differential pairs₁And V₂, V can be adjusted_inwcAnd V_w, so as to adjust the circuit output Class Gaussian function shape, as shown in Figure 6.Fig. 7 is b=40, the class that ideal Gaussian function during d=0.02 and adjustment are obtained Gaussian function, with 0.01 is step-length in the range of -0.4~0.4, takes identical discrete point to two curves, respectively constitute vectorial A And B, R is utilized in MATLAB softwares²=(A*B)²/A²*B²It can calculate and obtain the goodness of fit for R²=0.99775, therefore, should Circuit simulation waveform can be fitted well with ideal Gaussian function.For required particular Gaussian function (b and d are constant), we can take some discrete points, by CADENCE software emulations, be adjusted under the guidance of formula (2) Circuit parameter, so that the corresponding point of class Gaussian function approaches these discrete points, finally obtains the class Gaussian function approached.Example Such as, b=40, d=0.02 in the figure 7, class Gaussian function generation circuit parameter can be obtained for V by emulation₁=-0.13V, V₂= 0.13V,

In the specific embodiment of the utility model one, using MATLAB softwares and CADENCE softwares to the pattern based on RBF Grader carries out the simulating, verifying of function.The circuit is completed based on 0.18 μm of CMOS technology parameter of SMIC, supply voltage V_ddFor 1.8V, V_ssFor -1.8V.As shown in figure 8, in a graphic memory in (0,1), (1,0), (0,0), (1,0.9), (0.9,1) five can not linear partition point (this five points can not be divided into (0,0) with straight line, (1,0.9), (0.9,1) and (1,0), two groups of (0,1)), we can utilize four Gaussian function X₁=G₁(X, Y), X₂=G₂(X, Y), X₃= G₃(X, Y) and X₄=G₄The effect of (X, Y) maps that to another four dimensional planes P (X₁,X₂,X₃,X₄) so that originally can not Four points divided are in new plane P (X₁,X₂,X₃,X₄) interior redistribution, so as to realize linear partition.The utility model passes through solution The pattern classification problems of certainly such a five points verifies the function of the pattern classifier, i.e., using the pattern classifier to two The point inputted on dimensional plane is classified, and the data of the point on two dimensional surface are by (V_x, V_y) input, the pattern classifier is by plane On point (1,0.9), (0.9,1) and (0,0) is classified as Type1, at this moment network output I_outFor 1；And by the point (1,0) in plane (0,1) is classified as Type2, at this moment network output I_outFor 0.

Corresponding RBF neural is trained by MATLAB softwares, so as to obtain the parameter of neutral net, then The parameter of neutral net is converted into the offset parameter needed for the pattern classifier, is loaded into circuit to realize specific pattern Classification feature.Realize that different pattern classification functions need to write different training programs to be trained, in order that this practicality The new pattern classification function of realizing five points, the training code write is as follows.The non-the utility model of programming content will The content of protection.Neural Network Toolbox function net=newrb (P, T, eg, sc) in routine call MATLAB softwares comes Neutral net is trained.In the training process, when the input of neutral net is vectorial for P, output vector constantly approaches the phase Vector T is hoped, when the mean square deviation precision approached is less than eg=0.0001, neutral net deconditioning now obtains one Variance precision eg<0.0001, dispersion constant sc=1 RBF neural shows training followed by 4 last orders Neural network parameter afterwards.

RBF neural trains code：

Emulated by MATLAB, obtained neural network parameter as shown in table 4.

Table 4

The parameter of neutral net obtained by being trained by MATLAB is converted into inclined needed for the paralleling model grader Parameter is put, input 0 is represented with 0V, input 1 is represented with 0.3V, then can obtain required circuit parameter values by calculating, its Middle process emulation can obtain V₁And V₂Respectively 0.13V and -0.13V, it is determined that the shape of class Gaussian function.Required parameter is direct It is loaded on the paralleling model grader circuit, is emulated with CADENCE, (wherein 0V is represented its simulation result as shown in Figure 9 0,0.3V of input represents input 1, and 0.27V represents input 0.9).From the simulation result can be seen that when input for point (1, 0.9), when (0.9,1) or (0,0), it is output as 1；When input is point (1,0) or (0,1), 0 is output as, correctly realizing will Five click through row mode classification, and demonstrating the pattern classifier has good pattern classification function.

Above is preferred embodiment of the present utility model, all changes made according to technical solutions of the utility model are produced Function without departing from technical solutions of the utility model scope when, belong to protection domain of the present utility model.

Claims (4)

1. a kind of pattern classifier based on RBF, it is characterised in that：Including first to fourth RBF neuron circuits module, first To the 4th resistance and the first to the 5th Gilbert multipliers；

The current output terminal of described first to the 5th Gilbert multipliers is sequentially connected the output end I as grader_out；First The output of RBF neuron circuits connects the first input of first resistor one end and the first Gilbert multipliers respectively；First resistor is another One end is grounded respectively and the first Gilbert multipliers second are inputted；The output of 2nd RBF neuron circuits connects second resistance respectively One end and the first input of the 2nd Gilbert multipliers；The second resistance other end is grounded and the 2nd Gilbert multipliers respectively Two inputs；The output of 3rd RBF neuron circuits connects 3rd resistor one end respectively and the 4th Gilbert multipliers first are inputted； The 3rd resistor other end is grounded respectively and the 4th Gilbert multipliers second are inputted；The output difference of 4th RBF neuron circuits Connect the 4th resistance one end and the 5th Gilbert multipliers；The 4th resistance other end is grounded and the 5th Gilbert multipliers respectively Second input；

First output end of the first RBF neuron circuit modules is V_x, the second output end is V_x0, the 3rd output end is V_y, the Four output ends are V_y0；First output end of the 2nd RBF neuron circuit modules is V_x, the second output end is V_x0', the 3rd is defeated It is V to go out end_y, the 4th output end is V_y0'；First output end of the 3rd RBF neuron circuit modules is V_x, the second output end For V_x0' ', the 3rd output end is V_y, the 4th output end is V_y0''；First output end of the 4th RBF neuron circuit modules For V_x, the second output end is V_x0' ' ', the 3rd output end is V_y, the 4th output end is V_y0'''；First Gilbert multipliers One output end is V_w1, the second output end is V_w2, the 2nd the first output end of Gilbert multipliers is V_w1', the second output end is V_w2'；3rd the first output end of Gilbert multipliers is V_w1' ', the second output end is V_w2''；4th Gilbert multipliers One output end is V_w1' ' ', the second output end is V_w2'''；5th the first output end of Gilbert multipliers is V_w1' ' ' ', second Output end V_w2' ' ' ', the 3rd end of the 3rd Gilbert multipliers is V_b。

2. the pattern classifier according to claim 1 based on RBF, it is characterised in that：Gilbert multipliers include First to the 17th transistor M₁~M₁₇；The first transistor is to the 6th transistor M₁~M₆Emitter stage link together and connect high level； The first transistor M₁Base stage meet second transistor M₂Base stage；The first transistor M₁Colelctor electrode connect and connect the 9th transistor respectively M₉Emitter stage and the tenth transistor M₁₀Emitter stage；Second transistor M₂Base stage connect the colelctor electrode of second transistor；Second Transistor M₂Colelctor electrode meet the pipe M of the 7th crystal₇Colelctor electrode；Third transistor M₃Base stage meet the 4th transistor M₄Base Pole；Third transistor M₃Base stage meet third transistor M₃Colelctor electrode；Third transistor M₃Colelctor electrode meet the 8th transistor M₈ Colelctor electrode；4th transistor M₄Colelctor electrode pole meet the 11st transistor M respectively₁₁Emitter stage and the tenth two-transistor M₁₂'s Emitter stage；5th transistor M₅Base stage meet the 6th transistor M₆Base stage；5th transistor M₅Base stage meet the 5th transistor M₅ Colelctor electrode；5th transistor M₅Colelctor electrode meet the 14th transistor M₁₄Colelctor electrode；6th transistor M₆Colelctor electrode point The 17th transistor M is not met₁₇Colelctor electrode and output I_out1；7th transistor M₇Base stage meet V_w1；7th transistor M₇Hair Emitter-base bandgap grading connects the emitter stage and the 13rd transistor M of the 8th transistor respectively₁₃Colelctor electrode；8th transistor M₈Base stage meet V_w2； 9th transistor M₉Base stage meet the tenth two-transistor M₁₂Base stage；9th transistor M₉Colelctor electrode connect the 11st crystal respectively Pipe M₁₁Colelctor electrode and the 15th transistor M₁₅Colelctor electrode；Tenth transistor M₁₀Base stage meet the 11st transistor M₁₁Base Pole；Tenth transistor M₁₀Colelctor electrode meet the tenth two-transistor M respectively₁₂Colelctor electrode and the 16th transistor M₁₆Colelctor electrode； 9th transistor M₉With the tenth transistor M₁₀Base stage meet V respectively_inBoth positive and negative polarity；13rd transistor M₁₃Base stage connect biasing Voltage V_bias；14th transistor M₁₄The transistor M of base stage the 15th₁₅Base stage；15th transistor M₁₅Base stage connect its collection Electrode；16th transistor M₁₆Base stage meet the 17th pipe M₁₇Base stage；16th transistor M₁₆Base stage connect its colelctor electrode；The The emitter stage of 13 to the 17th transistors connects ground connection.

3. the pattern classifier according to claim 1 based on RBF, it is characterised in that：RBF neuron circuit modules include Two Gilbert multipliers, sqrt circuit and class Gaussian function generation circuit；

Sqrt circuit includes the 18th to the 26th transistor M₁₈~M₂₆；18th transistor M₁₈Colelctor electrode and the 19th Transistor M₁₉Base stage connection is used as sqrt circuit input end I_in；18th transistor M₁₈It is brilliant that base stage connects the 26th respectively Body pipe M₂₆Base stage, the 19th transistor M₁₉Emitter stage and the 24th transistor M₂₄Colelctor electrode；19th transistor M₁₉Base stage connects 21st transistor M₂₁Base stage；20th transistor M₂₀Base stage connects its colelctor electrode；21st transistor M₂₁Emitter stage connects 20 transistor M₂₀Colelctor electrode；21st transistor M₂₁Colelctor electrode meets the 20th two-transistor M₂₂Colelctor electrode；22nd is brilliant Body pipe M₂₂Base stage connects the 23rd transistor base；19th transistor M₁₉Colelctor electrode, the 20th two-transistor M₂₂Emitter stage and 23rd transistor M₂₃Emitter stage, which links together, connects high level；23rd transistor M₂₃Colelctor electrode connects the 20th respectively Five transistor M₂₅Colelctor electrode and output I_out2；24th transistor M₂₄Base stage meets the 25th transistor M respectively₂₅Base stage with Output end V_b；26th transistor M₂₆Colelctor electrode meets output I_out2；18th transistor M₁₈Colelctor electrode and the two ten four the second 16 transistor M₂₄~M₂₆Emitter stage links together ground connection.

4. the pattern classifier according to claim 3 based on RBF, it is characterised in that：The class Gaussian function produces electricity Road includes the 27th to the 50th two-transistor M₂₇~M₅₂；27th transistor M₂₇Emitter stage, the 28th transistor M₂₈ Emitter stage and the 35th to the 40th two-transistor M₃₅~M₄₂Emitter stage, which links together, connects high level；Described 27th Transistor M₂₇Base stage meets the 27th transistor M respectively₂₇Colelctor electrode and the 28th transistor M₂₈Base stage；27th is brilliant Body pipe M₂₇Colelctor electrode meet the 29th transistor M₂₉Emitter stage；28th transistor M₂₈Colelctor electrode connects the 30th crystal Pipe M₃₀Emitter stage；29th transistor M₂₉Base stage meets the 29th transistor M respectively₂₉Colelctor electrode meets the 30th transistor M₃₀ Base stage；29th transistor M₂₉Colelctor electrode meets the 31st transistor M₃₁Colelctor electrode；30th transistor M₃₀Colelctor electrode connects 47 transistor M₄₇Colelctor electrode；31st transistor M₃₁Colelctor electrode connects its base stage；31st transistor M₃₁Base stage is distinguished Meet the 31st transistor M₃₁Colelctor electrode and the 30th two-transistor M₃₂Base stage；31st transistor M₃₁Emitter stage connects the 3rd 13 M₃₃Colelctor electrode；30th two-transistor M₃₂Colelctor electrode meets the 35th M₃₅Colelctor electrode；30th two-transistor M₃₂Emitter stage Meet the 34th transistor M₃₄Colelctor electrode；33rd transistor M₃₃Base stage meets the 33rd transistor M respectively₃₃Colelctor electrode and 34th transistor M₃₄Base stage；33rd transistor M₃₃Emitter stage, the 34th transistor M₃₄Emitter stage, the 50th to 50th two-transistor emitter stage links together ground connection；35th transistor M₃₅Base stage connects the 35th transistor respectively M₃₅Colelctor electrode, the 36th transistor M₃₆Base stage, the 41st transistor M₄₁Base stage and the 40th two-transistor M₄₂Base stage；The 36 transistor M₃₆Colelctor electrode meets the 37th transistor M₃₇Base stage；37th transistor M₃₇Colelctor electrode connects the 4th respectively 13 transistor M₄₃Colelctor electrode and meet the 45th transistor M₄₅Colelctor electrode；37th transistor M₃₇Base stage connects the 38th Transistor M₃₈Base stage；38th transistor M₃₈Base stage, the 39th transistor M₃₉Colelctor electrode, the 40th two-transistor M₄₂Collection Electrode, which links together, meets output I_out3；39th transistor M₃₉Base stage meets the 40th transistor M respectively₄₀Base stage and the 40th One transistor M₄₁Colelctor electrode；40th transistor M₄₀Colelctor electrode meets the 44th transistor M respectively₄₄Colelctor electrode and the 46th Transistor M₄₆Colelctor electrode；43rd transistor M₄₃Base stage and the 46th transistor M₄₆Base stage meets input V together_in, the 40th Three transistor M₄₃Emitter stage meets the 44th transistor M respectively₄₄Emitter stage and the 48th transistor M₄₈Colelctor electrode；40th Four transistor M₄₄Base stage meets V₁；45th transistor M₄₅Base stage meets V₂；45th transistor M₄₅Emitter stage connects the 4th respectively 16 transistor M₄₆Emitter stage and the 49th transistor M₄₉Colelctor electrode；47th transistor M₄₇Base stage difference the 47th Transistor M₄₇Colelctor electrode, the 48th transistor M₄₈Base stage, the 49th transistor M₄₉Base stage；47th transistor M₄₇Hair Emitter-base bandgap grading meets the 50th transistor M₅₀Colelctor electrode；48th transistor M₄₈Colelctor electrode meets the 51st transistor M₅₁Colelctor electrode；The 49 transistor M₄₉Emitter stage meets the 50th two-transistor M₅₂Colelctor electrode；50th transistor M₅₀Base stage connects the 50th respectively Transistor M₅₀Colelctor electrode, the 51st transistor M₅₁Base stage, the 50th two-transistor M₅₂Base stage.