CN206479189U - Double remaining circuits and encoder - Google Patents
Double remaining circuits and encoder Download PDFInfo
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- CN206479189U CN206479189U CN201720175348.3U CN201720175348U CN206479189U CN 206479189 U CN206479189 U CN 206479189U CN 201720175348 U CN201720175348 U CN 201720175348U CN 206479189 U CN206479189 U CN 206479189U
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Abstract
The utility model provides double remaining circuits and encoder, including data acquisition chip, single-chip microcomputer, external memory storage and half duplex communication chip, and data acquisition chip is used to gather code-disc data, and code-disc data are sent into single-chip microcomputer；Single-chip microcomputer is used to be handled code-disc data, obtains angle value, and angle value is sent into user terminal by half duplex communication chip；External memory storage is used for the supplemental characteristic of data storage acquisition chip, and multiple pairs of remaining circuits are separately positioned on code-disc, so as to improve the stability of output, and improves Consumer's Experience.
Description
Technical field
The utility model is related to encoder techniques field, more particularly, to double remaining circuits and encoder.
Background technology
At present, code-disc data are gathered by the chip being arranged on code-disc, common encoder is generally using a chip
Gathered data, the stability of output is low.Once breaking down, then need to remove to be changed, so that lose time, user's body
Test difference.
Utility model content
In view of this, the purpose of this utility model is to provide double remaining circuits and encoder, can improve the steady of output
It is qualitative, and improve Consumer's Experience.
In a first aspect, the utility model embodiment provides a kind of pair of remaining circuit, including：Data acquisition chip, monolithic
Machine, external memory storage and half duplex communication chip；
The data acquisition chip, is connected with the single-chip microcomputer, for gathering code-disc data, and by the code-disc data
It is sent to the single-chip microcomputer；
The single-chip microcomputer, is connected with the half duplex communication chip, for the code-disc data to be handled, obtains
Angle value, and the angle value is sent to user terminal by the half duplex communication chip；
The external memory storage, is connected with the data acquisition chip, the ginseng for storing the data acquisition chip
Number data.
With reference in a first aspect, the utility model embodiment provide first aspect the first possible embodiment, its
In, the data acquisition chip includes MU150 chips, the connection serial clock pin SCL of pin 1 of the MU150 chips, pin
2 connection serial interface data pin SDA, pin 3 is connected with electric capacity C1 one end, and pin 4 is connected with the electric capacity C1 other end
Connect, and be grounded；
The connection of pin 14 supply voltage VCC, the supply voltage VCC are connected with electric capacity C2 one end, and pin 13 is grounded
And be connected with the electric capacity C2 other end, the connection clock MA of pin 11, the connection data of pin 9 SLO.
With reference in a first aspect, the utility model embodiment provide first aspect second of possible embodiment, its
In, the external memory storage includes 24AA02 chips, the connection of the pin 1 serial clock pin SCL of the 24AA02 chips, described
Serial clock pin SCL is connected with resistance R2 one end, and the other end connection supply voltage VCC of the resistance R2, pin 2 connects
Ground, the connection of pin 3 serial interface data pin SDA, the serial interface data pin SDA is connected with resistance R3 one end,
The other end of the resistance R3 connects the supply voltage VCC；
Pin 5 is grounded, and is connected with electric capacity C6 one end, and pin 4 connects the supply voltage VCC, and with the electricity
The other end for holding C6 is connected.
With reference in a first aspect, the utility model embodiment provide first aspect the third possible embodiment, its
In, the single-chip microcomputer includes C8051F330 chips, and the connection clock MA of pin 1 of the C8051F330 chips, pin 2 is grounded,
And be connected with electric capacity C8 one end, pin 3 is connected with the other end and supply voltage of the electric capacity C8 respectively, pin 20 with
Electric capacity C3 one end is connected, the other end ground connection of the electric capacity C3, the connection data of pin 19 SLO.
With reference in a first aspect, the utility model embodiment provide first aspect the 4th kind of possible embodiment, its
In, the half duplex communication chip includes MAX485 chips, the pins 2 of the MAX485 chips and pin 3 with RS485 interfaces
It is connected, the connection of pin 1 receives data pin RXD, the linkup transmit data pin TXD of pin 4, the connection supply voltage of pin 8
VCC, pin 5 is grounded, and pin 6 and pin 7 are connected with the user terminal.
With reference in a first aspect, the utility model embodiment provide first aspect the 5th kind of possible embodiment, its
In, in addition to：
First voltage conversion chip, for the first DC voltage to be converted into the second DC voltage, and is described pair of remaining
Encoder is powered.
With reference to the 5th kind of possible embodiment of first aspect, the utility model embodiment provides the of first aspect
Six kinds of possible embodiments, wherein, second voltage conversion chip, for second DC voltage to be converted into the 3rd direct current
Voltage, and powered for the single-chip microcomputer.
With reference to the 6th kind of possible embodiment of first aspect, the utility model embodiment provides the of first aspect
Seven kinds of possible embodiments, wherein, the first DC voltage is DC voltage 10 to 30 volts of DC voltage, second direct current
Press as 5 volts of DC voltage, the 3rd DC voltage is 3.3 volts of DC voltage.
Second aspect, the utility model embodiment also provides encoder, including double remaining circuits as described above and code-disc,
Multiple described pair of remaining circuits are separately positioned on the code-disc.
With reference to second aspect, the utility model embodiment provides the first possible embodiment of second aspect, its
In, the number of described pair of remaining circuit is two.
The utility model embodiment provides double remaining circuits and encoder, including data acquisition chip, single-chip microcomputer, outside
Memory and half duplex communication chip, data acquisition chip are used to gather code-disc data, and code-disc data are sent into single-chip microcomputer；
Single-chip microcomputer is used to be handled code-disc data, obtains angle value, and angle value is sent into use by half duplex communication chip
Family end；External memory storage is used for the supplemental characteristic of data storage acquisition chip, and multiple pairs of remaining circuits are separately positioned on code
On disk, so as to improve the stability of output, and Consumer's Experience is improved.
Other feature and advantage of the present utility model will illustrate in the following description, also, partly from specification
In become apparent, or understood by implementing the utility model.The purpose of this utility model and other advantages are in explanation
Specifically noted structure is realized and obtained in book, claims and accompanying drawing.
To enable above-mentioned purpose of the present utility model, feature and advantage to become apparent, preferred embodiment cited below particularly, and
Coordinate appended accompanying drawing, be described in detail below.
Brief description of the drawings
, below will be right in order to illustrate more clearly of the utility model embodiment or technical scheme of the prior art
The accompanying drawing used required in embodiment or description of the prior art is briefly described, it should be apparent that, describe below
In accompanying drawing be some embodiments of the present utility model, for those of ordinary skill in the art, do not paying creativeness
On the premise of work, other accompanying drawings can also be obtained according to these accompanying drawings.
Double remaining circuit diagrams that Fig. 1 provides for the utility model embodiment；
The data acquisition chip structural representation that Fig. 2 provides for the utility model embodiment；
The external memory storage structural representation that Fig. 3 provides for the utility model embodiment；
The single chip computer architecture schematic diagram that Fig. 4 provides for the utility model embodiment；
The half duplex communication chip structure schematic diagram that Fig. 5 provides for the utility model embodiment；
The first voltage conversion chip structural representation that Fig. 6 provides for the utility model embodiment；
The second voltage conversion chip structural representation that Fig. 7 provides for the utility model embodiment；
The coder structure schematic diagram that Fig. 8 provides for the utility model embodiment.
Icon：
10- data acquisition chips；20- single-chip microcomputers；30- half duplex communication chips；40- external memory storages.
Embodiment
To make the purpose, technical scheme and advantage of the utility model embodiment clearer, below in conjunction with accompanying drawing to this
The technical scheme of utility model is clearly and completely described, it is clear that described embodiment is that the utility model part is real
Apply example, rather than whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making
The every other embodiment obtained under the premise of creative work, belongs to the scope of the utility model protection.
For encoder common in the prior art generally using a chip gathered data, the stability of output is low.One
Denier breaks down, then needs to remove to be changed, so that lose time, poor user experience.The utility model embodiment is provided
Double remaining circuits and encoder, including data acquisition chip, single-chip microcomputer, external memory storage and half duplex communication chip, data
Acquisition chip is used to gather code-disc data, and code-disc data are sent into single-chip microcomputer；Single-chip microcomputer is used at code-disc data
Reason, obtains angle value, and angle value is sent into user terminal by half duplex communication chip；External memory storage is used for data storage
The supplemental characteristic of acquisition chip, and multiple pairs of remaining circuits are separately positioned on code-disc, so as to improve the stabilization of output
Property, and improve Consumer's Experience.
For ease of understanding the present embodiment, the utility model embodiment is described in detail below.
Double remaining circuit diagrams that Fig. 1 provides for the utility model embodiment.
Reference picture 1, it is logical that double remaining circuits include data acquisition chip 10, single-chip microcomputer 20, external memory storage 40 and half-duplex
Interrogate chip 30；
Data acquisition chip 10, is connected with the single-chip microcomputer 20, for gathering code-disc data, and by the code-disc data
It is sent to the single-chip microcomputer 20；
Single-chip microcomputer 20, is connected with the half duplex communication chip 30, for the code-disc data to be handled, obtains
Angle value, and the angle value is sent to user terminal by the half duplex communication chip 30；
Here, angle value is by half duplex communication chip 30 to be sent to user terminal in the form of binary code.
Wherein, user terminal can be computer or host computer.
Single-chip microcomputer 20 exports default technical parameter, and default technical parameter can include but is not limited to, specially encode
Digit, output form, baud rate and turnover rate of device etc..
External memory storage 40, is connected with the data acquisition chip 10, the parameter for data storage acquisition chip 10
Data.
Here, due to the no integrated memory in the inside of data acquisition chip 10, accordingly, it would be desirable to plug-in external memory storage 40,
Pass through the supplemental characteristic of the data storage acquisition chip 10 of external memory storage 40.
Further, it specifically can refer to Fig. 2, data acquisition chip 10 includes MU150 chips, the MU150 chips draw
Pin 1 connects serial clock pin SCL, and the connection serial interface data pin SDA of pin 2, pin 3 is connected with electric capacity C1 one end
Connect, pin 4 is connected with the electric capacity C1 other end, and is grounded；
The connection of pin 14 supply voltage VCC, the supply voltage VCC are connected with electric capacity C2 one end, and pin 13 is grounded
And be connected with the electric capacity C2 other end, the connection clock MA of pin 11, the connection data of pin 9 SLO.
Further, it specifically can refer to Fig. 3, external memory storage 40 includes 24AA02 chips, the 24AA02 chips draw
The connection of pin 1 serial clock pin SCL, the serial clock pin SCL are connected with resistance R2 one end, and the resistance R2's is another
One end connects supply voltage VCC, and pin 2 is grounded, and the connection serial interface data pin SDA of pin 3, the serial interface data is drawn
Pin SDA is connected with resistance R3 one end, and the other end of the resistance R3 connects the supply voltage VCC；
Pin 5 is grounded, and is connected with electric capacity C6 one end, and pin 4 connects the supply voltage VCC, and with the electricity
The other end for holding C6 is connected.
Further, Fig. 4 is specifically can refer to, single-chip microcomputer 20 includes C8051F330 chips, the C8051F330 chips
Pin 1 connects clock MA, and pin 2 is grounded, and is connected with electric capacity C8 one end；
Pin 3 is connected with the other end and supply voltage of the electric capacity C8 respectively；
Pin 20 is connected with electric capacity C3 one end, the other end ground connection of the electric capacity C3, the connection data of pin 19 SLO.
Further, Fig. 5 is specifically can refer to, half duplex communication chip 30 includes MAX485 chips, the MAX485 chips
Pin 2 be connected with pin 3 with RS485 interfaces, the connection of pin 1 receives data pin RXD；
The linkup transmit data pin TXD of pin 4, the connection supply voltage VCC of pin 8, pin 5 is grounded, pin 6 and pin 7
It is connected with the user terminal.
Wherein, pin 6 and pin 7 user terminal that is connected with user terminal can be host computer or computer.
Specifically, the serial clock pin SCL and serial interface data pin SDA of MU150 chips and 24AA02 chips
Serial clock pin SCL is connected with serial interface data pin SDA.
The clock MA and data SLO of MU150 chips are connected with the clock MA and data SLO of C8051F chips.
The supply voltage VCC of MU150 chips is connected with the supply voltage VCC of MAX485 chips, and grounded part
It is connected.
Further, in addition to：
First voltage conversion chip, for the first DC voltage to be converted into the second DC voltage, and is described pair of remaining
Encoder is powered.
Here, first voltage conversion chip can be 5430 chips, and the structure chart of first voltage conversion chip can specifically join
According to Fig. 6, as shown in fig. 6, the pin 1 of 5430 chips is connected with electric capacity C5 one end, the electric capacity C5 other end respectively with pin
8th, diode D1 negative electrode is connected with inductance L1 one end, diode D1 plus earth, the inductance L1 other end respectively with
Electric capacity C4 positive pole, resistance R1 one end are connected with supply voltage VCC, electric capacity C4 negative pole ground connection, and resistance R1 one end connects
Supply voltage VCC is met, the resistance R1 other end is connected with resistance R4 one end and pin 4 respectively, resistance R4 another termination
Ground.
Pin 7 is connected with electric capacity C7 one end and supply voltage respectively, the electric capacity C7 other end respectively with pin 6 and ground
It is connected；
Pin 5 is connected with resistance R5 one end, resistance R5 other end connection supply voltage.
Further, in addition to：
Second voltage conversion chip, for second DC voltage to be converted into the 3rd DC voltage, and is the list
Piece machine is powered.
Here, second voltage conversion chip includes CON3 chips, and the structure chart of second voltage conversion chip specifically can refer to
Fig. 7, as shown in fig. 7, negative pole of the pin 1 of CON3 chips respectively with ground, electric capacity C12 negative pole and electric capacity C11 is connected, electric capacity
C12 positive pole is connected with pin 2, pin 2 connection supply voltage, pin 3 respectively with supply voltage VCC and electric capacity C11 just
Pole is connected.
Further, the first DC voltage be DC voltage 10 to 30 volts of DC voltage, second DC voltage is straight
5 volts of voltage is flowed, the 3rd DC voltage is 3.3 volts of DC voltage.
The coder structure schematic diagram that Fig. 8 provides for the utility model embodiment.
Reference picture 8, encoder includes multiple pairs of remaining circuits and code-disc.Multiple pairs of remaining circuits are separately positioned on code-disc
On.Wherein, the number for the double remaining circuits being arranged on code-disc is two.
Reading, and independent output are carried out to code-disc using two completely self-contained pair of remaining circuits, output can be improved
Stability.
When one of break down, another can be used, it is not necessary to remove and changed, so as to improve user
Experience, that is, save the time of user and reduce the cost of user.
The utility model embodiment provides double remaining circuits and encoder, including data acquisition chip, single-chip microcomputer, outside
Memory and half duplex communication chip, data acquisition chip are used to gather code-disc data, and code-disc data are sent into single-chip microcomputer；
Single-chip microcomputer is used to be handled code-disc data, obtains angle value, and angle value is sent into use by half duplex communication chip
Family end；External memory storage is used for the supplemental characteristic of data storage acquisition chip, and multiple pairs of remaining circuits are separately positioned on code
On disk, so as to improve the stability of output, and Consumer's Experience is improved.
The computer program product that the utility model embodiment is provided, including store the computer-readable of program code
Storage medium, the instruction that described program code includes can be used for performing the method described in previous methods embodiment, implement
Reference can be made to embodiment of the method, will not be repeated here.
It is apparent to those skilled in the art that, for convenience and simplicity of description, the system of foregoing description
With the specific work process of device, the corresponding process in preceding method embodiment is may be referred to, be will not be repeated here.
In addition, in the description of the utility model embodiment, unless otherwise clearly defined and limited, term " installation ",
" connected ", " connection " should be interpreted broadly, for example, it may be being fixedly connected or being detachably connected, or integratedly be connected
Connect；Can be mechanical connection or electrical connection；Can be joined directly together, can also be indirectly connected to by intermediary, can
To be the connection of two element internals.For the ordinary skill in the art, above-mentioned term can be understood with concrete condition
Concrete meaning in the utility model.
If the function is realized using in the form of SFU software functional unit and is used as independent production marketing or in use, can be with
It is stored in a computer read/write memory medium.
Understood based on such, the portion that the technical solution of the utility model substantially contributes to prior art in other words
Divide or the part of the technical scheme can be embodied in the form of software product, the computer software product is stored in one
In storage medium, including some instructions are to cause a computer equipment (can be personal computer, server, or net
Network equipment etc.) perform all or part of step of the utility model each embodiment methods described.And foregoing storage medium bag
Include：USB flash disk, mobile hard disk, read-only storage (ROM, Read-Only Memory), random access memory (RAM, Random
Access Memory), magnetic disc or CD etc. are various can be with the medium of store program codes.
, it is necessary to explanation in description of the present utility model, term " " center ", " on ", " under ", it is "left", "right", " perpendicular
Directly ", the orientation or position relationship of the instruction such as " level ", " interior ", " outer " are, based on orientation shown in the drawings or position relationship, to be only
Described for the ease of description the utility model and simplifying, rather than to indicate or imply that signified device or element must have specific
Orientation, with specific azimuth configuration and operation, therefore it is not intended that to limitation of the present utility model.
In addition, term " first ", " second ", " the 3rd " are only used for describing purpose, and it is not intended that indicating or implying phase
To importance.
Finally it should be noted that：Embodiment described above, embodiment only of the present utility model, to illustrate this
The technical scheme of utility model, rather than its limitations, protection domain of the present utility model are not limited thereto, although with reference to foregoing
The utility model is described in detail embodiment, it will be understood by those within the art that：It is any to be familiar with this skill
The technical staff in art field is in the technical scope that the utility model is disclosed, and it still can be to the skill described in previous embodiment
Art scheme is modified or can readily occurred in change, or carries out equivalent substitution to which part technical characteristic；And these modifications,
Change is replaced, and the essence of appropriate technical solution is departed from the spirit and model of the utility model embodiment technical scheme
Enclose, should all cover within protection domain of the present utility model.Therefore, protection domain of the present utility model described should be wanted with right
The protection domain asked is defined.
Claims (10)
1. a kind of pair of remaining circuit, it is characterised in that including：Data acquisition chip, single-chip microcomputer, external memory storage and half-duplex are logical
Interrogate chip；
The data acquisition chip, is connected with the single-chip microcomputer, is sent for gathering code-disc data, and by the code-disc data
To the single-chip microcomputer；
The single-chip microcomputer, is connected with the half duplex communication chip, for the code-disc data to be handled, obtains angle
Value, and the angle value is sent to user terminal by the half duplex communication chip；
The external memory storage, is connected with the data acquisition chip, the parameter number for storing the data acquisition chip
According to.
2. according to claim 1 pair of remaining circuit, it is characterised in that the data acquisition chip includes MU150 chips,
The MU150 chips pin 1 connection serial clock pin SCL, pin 2 connection serial interface data pin SDA, pin 3 with
Electric capacity C1 one end is connected, and pin 4 is connected with the electric capacity C1 other end, and is grounded；
The connection of pin 14 supply voltage VCC, the supply voltage VCC are connected with electric capacity C2 one end, pin 13 be grounded and with
The electric capacity C2 other end is connected, the connection clock MA of pin 11, the connection data of pin 9 SLO.
3. according to claim 1 pair of remaining circuit, it is characterised in that the external memory storage includes 24AA02 chips,
The connection serial clock pin SCL of pin 1 of the 24AA02 chips, the serial clock pin SCL and resistance R2 one end phase
Connection, the other end connection supply voltage VCC of the resistance R2, pin 2 is grounded, the connection serial interface data pin of pin 3
SDA, the serial interface data pin SDA is connected with resistance R3 one end, and the other end of the resistance R3 connects the electricity
Source voltage VCC；
Pin 5 is grounded, and is connected with electric capacity C6 one end, and pin 4 connects the supply voltage VCC, and with the electric capacity C6
The other end be connected.
4. according to claim 1 pair of remaining circuit, it is characterised in that the single-chip microcomputer includes C8051F330 chips, institute
State C8051F330 chips pin 1 connection clock MA, pin 2 is grounded, and is connected with electric capacity C8 one end, pin 3 respectively with
The other end of the electric capacity C8 is connected with supply voltage, and pin 20 is connected with electric capacity C3 one end, and the electric capacity C3's is another
One end is grounded, the connection data of pin 19 SLO.
5. according to claim 1 pair of remaining circuit, it is characterised in that the half duplex communication chip includes MAX485 cores
Piece, the pin 2 of the MAX485 chips is connected with pin 3 with RS485 interfaces, and the connection of pin 1 receives data pin RXD,
The linkup transmit data pin TXD of pin 4, the connection supply voltage VCC of pin 8, pin 5 is grounded, pin 6 and pin 7 with it is described
User terminal is connected.
6. according to claim 1 pair of remaining circuit, it is characterised in that also include：
First voltage conversion chip, for the first DC voltage to be converted into the second DC voltage, and is described pair of remaining coding
Device is powered.
7. according to claim 6 pair of remaining circuit, it is characterised in that also include：
Second voltage conversion chip, for second DC voltage to be converted into the 3rd DC voltage, and is the single-chip microcomputer
Power supply.
8. according to claim 7 pair of remaining circuit, it is characterised in that the first DC voltage is DC voltage 10 to direct current
30 volts of voltage, second DC voltage is 5 volts of DC voltage, and the 3rd DC voltage is 3.3 volts of DC voltage.
9. a kind of encoder, it is characterised in that multiple including the double remaining circuits and code-disc described in claim any one of 1-8
Described pair of remaining circuit is separately positioned on the code-disc.
10. encoder according to claim 9, it is characterised in that the number of described pair of remaining circuit is two.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720175348.3U CN206479189U (en) | 2017-02-24 | 2017-02-24 | Double remaining circuits and encoder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720175348.3U CN206479189U (en) | 2017-02-24 | 2017-02-24 | Double remaining circuits and encoder |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206479189U true CN206479189U (en) | 2017-09-08 |
Family
ID=59747046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720175348.3U Expired - Fee Related CN206479189U (en) | 2017-02-24 | 2017-02-24 | Double remaining circuits and encoder |
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| Country | Link |
|---|---|
| CN (1) | CN206479189U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106643829A (en) * | 2017-02-24 | 2017-05-10 | 长春键坤联合科技发展有限公司 | Dual-redundancy circuit and encoder |
-
2017
- 2017-02-24 CN CN201720175348.3U patent/CN206479189U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106643829A (en) * | 2017-02-24 | 2017-05-10 | 长春键坤联合科技发展有限公司 | Dual-redundancy circuit and encoder |
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