CN206440783U - A kind of speed adjusting module test device of many gears of low-voltage - Google Patents
A kind of speed adjusting module test device of many gears of low-voltage Download PDFInfo
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- CN206440783U CN206440783U CN201621188878.3U CN201621188878U CN206440783U CN 206440783 U CN206440783 U CN 206440783U CN 201621188878 U CN201621188878 U CN 201621188878U CN 206440783 U CN206440783 U CN 206440783U
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Abstract
The utility model discloses a kind of speed adjusting module test device of many gears of low-voltage, including main frame, human-computer interaction module, data acquisition module and measurement jig, the signal end of measurement jig is connected with the signal end of data acquisition module, the signal end of data acquisition module is connected with the signal end of main frame, and the signal end of main frame is connected with the signal end of human-computer interaction module；The human-computer interaction module includes keyboard, mouse and display；The data acquisition module includes data collecting plate card；The measurement jig includes load circuit, probe carriage and data acquisition control plate, and probe carriage is provided with probe.The utility model drop has lacked manually-operated complicated property, reduces cost of labor, the problem of solving relatively slow artificial operation gearshift, inefficiency, it is to avoid Traditional Man reading, long-term work fatiguability, the problem of easily misreading.
Description
Technical field
The utility model is related to electronic surveying control field, the speed adjusting module test dress of particularly a kind of many gears of low-voltage
Put.
Background technology
Self shifter is measured during the low voltage signal of multiple gears, existing gearshift measuring method, measurement voltage
Conventional tool has two kinds：Universal meter and oscillograph, although both instruments can meet the required precision of measurement, not
Possess control function, to switch gear, it is necessary to which manual intervention is shifted gears, and is then measured again, then is shifted gears, and is so repeated, increase
Add manually-operated complicated property, add hand labor cost.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art that there is provided a kind of speed adjusting module of many gears of low-voltage
Measurement apparatus, device drop has lacked manually-operated complicated property, reduces cost of labor, solve artificial operation gearshift it is relatively slow,
The problem of inefficiency, it is to avoid Traditional Man reading, long-term work fatiguability, the problem of easily misreading.
The technical solution of the utility model is as follows：A kind of speed adjusting module test device of many gears of low-voltage, including calculate
Machine host, human-computer interaction module, data acquisition module and measurement jig, the signal end of measurement jig and the letter of data acquisition module
Number end be connected, the signal end of data acquisition module is connected with the signal end of main frame, the signal end of main frame and people
The signal end of machine interactive module is connected；The human-computer interaction module includes keyboard, mouse and display；The data acquisition module
Block includes data collecting plate card；The measurement jig includes setting on load circuit, probe carriage and data acquisition control plate, probe carriage
There is probe.
It is preferred that, the data collecting plate card includes electric source filter circuit, channel selecting impulse circuit, channel selecting coding
On circuit, coding electrification reset circuit, channel selection circuit and signal output apparatus, the channel selecting impulse circuit and coding
Reset circuit is connected with electric source filter circuit respectively, and channel selecting impulse circuit is connected with channel selecting coding circuit, passage
Selection coding circuit is connected with signal output apparatus and channel selection circuit respectively.
It is preferred that, electric source filter circuit includes the of connector JP1, the first electric capacity C1 and the second electric capacity C2, connector JP1
One end is connected by the first electric capacity C1 with connector JP1 the second end, and connector JP1 first end is also connected with VCC ends, connection
Device JP1 the second end ground connection, the second electric capacity C2 is in parallel with the first electric capacity C1.
It is preferred that, channel selecting impulse circuit 2 includes the 6th resistance R6 and the 3rd triode Q3, the 6th resistance R6 one end
It is connected with connector JP1 first end, the 6th resistance R6 the second end is connected with the 3rd triode Q3 emitter stage, the three or three pole
Pipe Q3 base stage is connected with Clock ends, and the 3rd triode Q3 colelctor electrode is connected with connector JP1 the second end, the three or three pole
Pipe Q3 grounded collector.
It is preferred that, coding electrification reset circuit includes second resistance R2 and the 6th electric capacity C6, second resistance R2 first end
It is connected with connector JP1 first end, the second resistance R2 other end is grounded by the 6th electric capacity C6, and second resistance R2's is another
End also passes sequentially through the 6th electric capacity C6, the 3rd triode Q3, the 6th resistance R6 and is connected with connector JP1 first end.
It is preferred that, channel selecting coding circuit includes the first chip U1, the 4th electric capacity C4, the 5th electric capacity C5,3rd resistor
R3, the 4th resistance R4, the 5th resistance R5, the first triode Q1 and the second triode Q2, the first chip U1 the first pin pass through
Second resistance R2 is connected with connector JP1 first end, and the first chip U1 second pin passes through the 6th resistance R6 and connector
JP1 first end is connected, the first chip U1 the 3rd pin the 4th pin respectively with the first chip U1, the of the first chip U1
Five pins, the first chip U1 the 6th pin, the first chip U1 the 8th pin are connected, and the of the first chip U1 the 7th pin
One connection end is connected with connector JP1 first end, and another connection end of the first chip U1 the 7th pin passes through resistance
R5 is connected with the first chip U1 the 9th pin, and first connection end of the first chip U1 the 8th pin passes through the 4th electric capacity C4
It is connected with the first chip U1 the tenth pin, another connection end of the first chip U1 the 8th pin is with the first triode Q1's
Emitter stage is connected, and the first triode Q1 colelctor electrode is connected with the second triode Q2 emitter stage, the first triode Q1 base stage
It is connected by 3rd resistor R3 with the first chip U1 the 12nd pin, the second triode Q2 colelctor electrode and the first chip U1's
9th pin is connected, and the second triode Q2 base stage is connected by the 4th resistance R4 with the first chip U1 the 14th pin, the
Five electric capacity C5 are in parallel with the 4th electric capacity C4, and the first chip U1 the tenth pin is connected with the first chip U1 the 16th pin.
It is preferred that, channel selection circuit includes the second chip U2 and gear interface P3, gear interface P3 first end and the
Two chip U2 the 5th pin is connected, and gear interface P3 the second end is connected with the second chip U2 second pin, gear interface
P3 the 3rd end is connected with the second chip U2 the 12nd pin, gear interface P3 the 4th end and the 15th of the second chip U2 the
Pin be connected, gear interface P3 the 5th end is connected with the second chip U2 the 14th pin, gear interface P3 the 6th end and
13rd pin of the second chip is connected.
It is preferred that, signal output apparatus includes first resistor R1, the 3rd electric capacity C3 and output interface P2, output interface P2's
First end is connected by the 3rd electric capacity C3 with output interface P2 the second end, output interface P2 first end ground connection, output interface
P2 the second end is connected by first resistor R1 with the second chip U2 the 3rd pin.
It is preferred that, the first chip U1 model 74HC163 counters, the second chip U2 model CD4051 chips.
The beneficial effects of the utility model are：
(1) device drop has lacked manually-operated complicated property, reduces cost of labor, solve artificial operation gearshift compared with
Slowly, the problem of inefficiency；
(2) avoid using Traditional Man reading, long-term work fatiguability, the problem of causing easily to misread；
(3) simple in construction, connection is available, easy to use.
Brief description of the drawings
Fig. 1 is structural representation of the present utility model；
Fig. 2 is the electrical block diagram of the utility model data collecting plate card；
In figure, 10- measurement jigs, 20- human-computer interaction modules, 30- data acquisition modules, 40- main frames, 101- is born
Circuit is carried, 102- probe carriages, 103- data acquisition control plates, 201- keyboards, 202- mouses, 203- displays, 301- data are adopted
Collect board.
Embodiment
The technical solution of the utility model, but protection domain of the present utility model are described in further detail below in conjunction with the accompanying drawings
It is not limited to as described below.
Embodiment：
As shown in Figure 1 and Figure 2, the speed adjusting module measurement apparatus of many gears of a kind of low-voltage, including main frame 40, people
Machine interactive module 20, data acquisition module 30 and measurement jig 10, signal end and the data acquisition module 30 of measurement jig 10
Signal end is connected, and the signal end of data acquisition module 30 is connected with the signal end of main frame 40, the letter of main frame 40
Number end is connected with the signal end of human-computer interaction module 20；The human-computer interaction module 20 includes keyboard 201, mouse 202 and shown
Show device 203；The data acquisition module 30 includes data collecting plate card 301；The measurement jig 10 include load circuit 101,
Probe carriage 102 and data acquisition control plate 103, probe carriage 102 are provided with probe.
It is preferred that, the data collecting plate card 301 includes electric source filter circuit, channel selecting impulse circuit, channel selecting
Coding circuit, coding electrification reset circuit, channel selection circuit and signal output apparatus, the channel selecting impulse circuit and volume
Code electrification reset circuit is connected with electric source filter circuit respectively, and channel selecting impulse circuit is connected with channel selecting coding circuit,
Channel selecting coding circuit is connected with signal output apparatus and channel selection circuit respectively.
It is preferred that, electric source filter circuit includes the of connector JP1, the first electric capacity C1 and the second electric capacity C2, connector JP1
One end is connected by the first electric capacity C1 with connector JP1 the second end, and connector JP1 first end is also connected with VCC ends, connection
Device JP1 the second end ground connection, the second electric capacity C2 is in parallel with the first electric capacity C1.
It is preferred that, channel selecting impulse circuit includes the 6th resistance R6 and the 3rd triode Q3, the 6th resistance R6 one end
It is connected with connector JP1 first end, the 6th resistance R6 the second end is connected with the 3rd triode Q3 emitter stage, the three or three pole
Pipe Q3 base stage is connected with Clock ends, and the 3rd triode Q3 colelctor electrode is connected with connector JP1 the second end, the three or three pole
Pipe Q3 grounded collector.
It is preferred that, coding electrification reset circuit includes second resistance R2 and the 6th electric capacity C6, second resistance R2 first end
It is connected with connector JP1 first end, the second resistance R2 other end is grounded by the 6th electric capacity C6, and second resistance R2's is another
End also passes sequentially through the 6th electric capacity C6, the 3rd triode Q3, the 6th resistance R6 and is connected with connector JP1 first end.
It is preferred that, channel selecting coding circuit includes the first chip U1, the 4th electric capacity C4, the 5th electric capacity C5,3rd resistor
R3, the 4th resistance R4, the 5th resistance R5, the first triode Q1 and the second triode Q2, the first chip U1 the first pin pass through
Second resistance R2 is connected with connector JP1 first end, and the first chip U1 second pin passes through the 6th resistance R6 and connector
JP1 first end is connected, the first chip U1 the 3rd pin the 4th pin respectively with the first chip U1, the of the first chip U1
Five pins, the first chip U1 the 6th pin, the first chip U1 the 8th pin are connected, and the of the first chip U1 the 7th pin
One connection end is connected with connector JP1 first end, and another connection end of the first chip U1 the 7th pin passes through resistance
R5 is connected with the first chip U1 the 9th pin, and first connection end of the first chip U1 the 8th pin passes through the 4th electric capacity C4
It is connected with the first chip U1 the tenth pin, another connection end of the first chip U1 the 8th pin is with the first triode Q1's
Emitter stage is connected, and the first triode Q1 colelctor electrode is connected with the second triode Q2 emitter stage, the first triode Q1 base stage
It is connected by 3rd resistor R3 with the first chip U1 the 12nd pin, the second triode Q2 colelctor electrode and the first chip U1's
9th pin is connected, and the second triode Q2 base stage is connected by the 4th resistance R4 with the first chip U1 the 14th pin, the
Five electric capacity C5 are in parallel with the 4th electric capacity C4, and the first chip U1 the tenth pin is connected with the first chip U1 the 16th pin.
It is preferred that, channel selection circuit includes the second chip U2 and gear interface P3, gear interface P3 first end and the
Two chip U2 the 5th pin is connected, and gear interface P3 the second end is connected with the second chip U2 second pin, gear interface
P3 the 3rd end is connected with the second chip U2 the 12nd pin, gear interface P3 the 4th end and the 15th of the second chip U2 the
Pin be connected, gear interface P3 the 5th end is connected with the second chip U2 the 14th pin, gear interface P3 the 6th end and
13rd pin of the second chip is connected.
It is preferred that, signal output apparatus includes first resistor R1, the 3rd electric capacity C3 and output interface P2, output interface P2's
First end is connected by the 3rd electric capacity C3 with output interface P2 the second end, output interface P2 first end ground connection, output interface
P2 the second end is connected by first resistor R1 with the second chip U2 the 3rd pin.
It is preferred that, the first chip U1 model 74HC163 counters, the second chip U2 model CD4051 chips.
Operation principle：After energization, coding electrification reset circuit causes channel selecting coding circuit to reset, and whole circuit is waited
The channel selecting pulse of computer, after pulse enters channel selecting impulse circuit, trigger port selection coding circuit is compiled
Code, the coding of channel selecting coding circuit is output to channel selection circuit, and channel selection circuit selects corresponding gear passage,
Voltage signal is transported to signal output apparatus, and signal output apparatus is conveyed to calculating after carrying out low-pass filtering treatment to voltage signal
Machine processing.
Embodiment described above only expresses embodiment of the present utility model, and it describes more specific and detailed,
But therefore it can not be interpreted as the limitation to the utility model the scope of the claims.It should be pointed out that for the common of this area
For technical staff, without departing from the concept of the premise utility, various modifications and improvements can be made, these all belong to
In protection domain of the present utility model.
Claims (9)
1. a kind of speed adjusting module test device of many gears of low-voltage, it is characterised in that including main frame, man-machine interaction mould
Block, data acquisition module and measurement jig, the signal end of measurement jig are connected with the signal end of data acquisition module, data acquisition
The signal end of module is connected with the signal end of main frame, the signal end of main frame and the signal end of human-computer interaction module
It is connected；The human-computer interaction module includes keyboard, mouse and display；The data acquisition module includes data acquisition board
Card；The measurement jig includes load circuit, probe carriage and data acquisition control plate, and probe carriage is provided with probe.
2. a kind of speed adjusting module test device of many gears of low-voltage according to claim 1, it is characterised in that the data
Analog input card include electric source filter circuit, channel selecting impulse circuit, channel selecting coding circuit, coding electrification reset circuit,
Channel selection circuit and signal output apparatus, the channel selecting impulse circuit and coding electrification reset circuit are filtered with power supply respectively
Wave circuit be connected, channel selecting impulse circuit is connected with channel selecting coding circuit, channel selecting coding circuit respectively with signal
Output circuit and channel selection circuit are connected.
3. a kind of speed adjusting module test device of many gears of low-voltage according to claim 2, it is characterised in that power filter
The first end that circuit includes connector JP1, the first electric capacity C1 and the second electric capacity C2, connector JP1 passes through the first electric capacity C1 and company
The second end for meeting device JP1 is connected, and connector JP1 first end is also connected with VCC ends, connector JP1 the second end ground connection, second
Electric capacity C2 is in parallel with the first electric capacity C1.
4. a kind of speed adjusting module test device of many gears of low-voltage according to claim 2, it is characterised in that channel selecting
Impulse circuit includes the 6th resistance R6 and the 3rd triode Q3, and the 6th resistance R6 one end is connected with connector JP1 first end,
6th resistance R6 the second end is connected with the 3rd triode Q3 emitter stage, and the 3rd triode Q3 base stage is connected with Clock ends,
3rd triode Q3 colelctor electrode is connected with connector JP1 the second end, the 3rd triode Q3 grounded collector.
5. the speed adjusting module test device of many gears of a kind of low-voltage according to claim 2, it is characterised in that electric on coding
Reset circuit includes second resistance R2 and the 6th electric capacity C6, and second resistance R2 first end is connected with connector JP1 first end,
The second resistance R2 other end is grounded by the 6th electric capacity C6, the second resistance R2 other end also pass sequentially through the 6th electric capacity C6,
3rd triode Q3, the 6th resistance R6 are connected with connector JP1 first end.
6. a kind of speed adjusting module test device of many gears of low-voltage according to claim 2, it is characterised in that channel selecting
Coding circuit includes the first chip U1, the 4th electric capacity C4, the 5th electric capacity C5,3rd resistor R3, the 4th resistance R4, the 5th resistance
R5, the first triode Q1 and the second triode Q2, the first chip U1 the first pin pass through second resistance R2's and connector JP1
First end is connected, and the first chip U1 second pin is connected by the 6th resistance R6 with connector JP1 first end, the first chip
U1 the 3rd pin respectively with the first chip U1 the 4th pin, the first chip U1 the 5th pin, the first chip U1 the 6th
Pin, the first chip U1 the 8th pin are connected, and first connection end of the first chip U1 the 7th pin is with connector JP1's
First end is connected, and another connection end of the first chip U1 the 7th pin passes through resistance R5 and the first chip U1 the 9th pin
It is connected, the tenth pin phase that first connection end of the first chip U1 the 8th pin passes through the 4th electric capacity C4 and the first chip U1
Even, another connection end of the first chip U1 the 8th pin is connected with the first triode Q1 emitter stage, the first triode Q1
Colelctor electrode be connected with the second triode Q2 emitter stage, the first triode Q1 base stage passes through 3rd resistor R3 and the first chip
U1 the 12nd pin is connected, and the second triode Q2 colelctor electrode is connected with the first chip U1 the 9th pin, the second triode
Q2 base stage is connected by the 4th resistance R4 with the first chip U1 the 14th pin, and the 5th electric capacity C5 and the 4th electric capacity C4 are simultaneously
Connection, the first chip U1 the tenth pin is connected with the first chip U1 the 16th pin.
7. a kind of speed adjusting module test device of many gears of low-voltage according to claim 2, it is characterised in that channel selecting
Circuit includes the second chip U2 and gear interface P3, and gear interface P3 first end is connected with the second chip U2 the 5th pin,
Gear interface P3 the second end is connected with the second chip U2 second pin, and gear interface P3 the 3rd end is with the second chip U2's
12nd pin is connected, and gear interface P3 the 4th end is connected with the second chip U2 the 15th pin, and the of gear interface P3
Five ends are connected with the second chip U2 the 14th pin, gear interface P3 the 6th end and the 13rd pin phase of the second chip
Even.
8. a kind of speed adjusting module test device of many gears of low-voltage according to claim 2, it is characterised in that signal output
Circuit includes first resistor R1, the 3rd electric capacity C3 and output interface P2, output interface P2 first end by the 3rd electric capacity C3 with
Output interface P2 the second end is connected, output interface P2 first end ground connection, and output interface P2 the second end passes through first resistor
R1 is connected with the second chip U2 the 3rd pin.
9. the speed adjusting module test dress of a kind of many gears of low-voltage according to claim 1, claim 6 or claim 8
Put, it is characterised in that the first chip U1 model 74HC163 counters, the second chip U2 model CD4051 chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621188878.3U CN206440783U (en) | 2016-10-28 | 2016-10-28 | A kind of speed adjusting module test device of many gears of low-voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621188878.3U CN206440783U (en) | 2016-10-28 | 2016-10-28 | A kind of speed adjusting module test device of many gears of low-voltage |
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| Publication Number | Publication Date |
|---|---|
| CN206440783U true CN206440783U (en) | 2017-08-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621188878.3U Active CN206440783U (en) | 2016-10-28 | 2016-10-28 | A kind of speed adjusting module test device of many gears of low-voltage |
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| Country | Link |
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| CN (1) | CN206440783U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107991614A (en) * | 2017-10-08 | 2018-05-04 | 刘道灵 | A kind of quartz watch battery electric quantity checking device |
-
2016
- 2016-10-28 CN CN201621188878.3U patent/CN206440783U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107991614A (en) * | 2017-10-08 | 2018-05-04 | 刘道灵 | A kind of quartz watch battery electric quantity checking device |
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