CN206349915U - A kind of high frequency high power high speed FET drive circuit - Google Patents
A kind of high frequency high power high speed FET drive circuit Download PDFInfo
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- CN206349915U CN206349915U CN201621421811.XU CN201621421811U CN206349915U CN 206349915 U CN206349915 U CN 206349915U CN 201621421811 U CN201621421811 U CN 201621421811U CN 206349915 U CN206349915 U CN 206349915U
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- resistance
- diode
- triode
- electric capacity
- isolating transformer
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Abstract
The utility model is a kind of high frequency high power high speed FET drive circuit, is made up of resistance, electric capacity, diode, triode and isolating transformer, and resistance R1 left ends are connected with drive signal, and right-hand member is connected with triode V1 base stages；Isolating transformer T1 vice-side windings lower end, resistance R4 lower ends, resistance R6 lower ends, electric capacity C3 lower ends are connected with FET source electrode s, whole connecting lines include high strength enamelled wire coiling and Double-wire parallel wound of the isolating transformer using 0.03 0.08 millimeters of line footpath, and the magnetic core of isolating transformer uses high-frequency magnetic.The utility model can be minimized the distributed inductance of wire, the high frequency Kelvin effect of wire and various distributed constants, the speed and amplifying power of the transmission of its signal be improved, so as to lift the switching speed of FET.
Description
Technical field
The utility model is related to a kind of high frequency high power high speed FET drive circuit, belongs under high-frequency signal with higher
The ultrahigh speed FET drive circuit of multiplication factor, especially opens the turn-off time in the super of nanosecond order under high-frequency signal
High speed FET drive circuit technology.
Background technology
In the prior art, the drive circuit of FET is be driven using triode usually can be because when signal amplifies
For the saturation problem of triode FET can not be allowed to accomplish quickly to turn on and off, especially triode is easily accessible saturation shape
State and saturation back driving circuit amplifying power is poor, so FET can not be accomplished quickly to turn on and off, the ring of hyperfrequency
Under border, the transformer for playing buffer action in drive circuit, because circuit has distributed inductance, high frequency Kelvin effect and various points
The joint effect of cloth parameter, can have very big signal delay and signal abnormal between the output of transformer and the pulse being originally inputted
Become, therefore in the environment of hyperfrequency, traditional transformer can not reach the requirement of driving and isolation；Existing product can not
Meet and require.Therefore, the ultrahigh speed FET drive circuit that explore has higher magnification under high-frequency signal becomes newly
One in development the problem of must solve.
The content of the invention
The purpose of this utility model proposes a kind of high frequency high power high speed FET drive circuit aiming above mentioned problem,
The drive circuit can be minimized the distributed inductance of wire, the high frequency Kelvin effect of wire and various distributed constants, lifting
The speed and amplifying power of its signal transmission, so as to lift the switching speed of FET.
The utility model proposes this high frequency high power high speed FET drive circuit, by resistance, electric capacity, diode,
Triode and isolating transformer composition, it is characterised in that resistance R1 left ends are connected with drive signal, right-hand member and triode V1 base stages
It is connected；Triode V1 colelctor electrodes, electric capacity C1 upper ends, electric capacity C2 upper ends are connected with power supply VCC1；Electric capacity C1 and electric capacity C2 lower end
Ground connection；Triode V1 emitter stages, resistance R2 upper ends are connected with the upper end of isolating transformer T1 primary side windings；Resistance R2 lower end,
The lower end of isolating transformer T1 primary side windings, which is connected, to be grounded；The upper end of isolating transformer T1 vice-side windings, resistance R3 left end phase
Even；Resistance R3 right-hand members, diode VD1 anodes are connected with diode VD3 anodes；Diode VD1 negative electrodes and diode VD2 anode phases
Even；Diode VD2 negative electrodes are connected with triode V2 base stages；Diode VD3 negative electrodes, triode V2 colelctor electrodes, diode VD6 are cloudy
Pole, triode V3 colelctor electrodes are connected with power supply VCC2；Triode V2 emitter stages, resistance R4 upper ends are connected with resistance R5 left ends；Electricity
Resistance R5 right-hand members, diode VD4 anodes are connected with diode VD6 anodes；Diode VD4 negative electrodes are connected with diode VD5 anodes；Two
Pole pipe VD5 negative electrodes are connected with triode V3 base stages；Triode V3 emitter stages, resistance R6 upper ends, electric capacity C3 upper ends and FET
Grid g is connected；Isolating transformer T1 vice-side windings lower end, resistance R4 lower ends, resistance R6 lower ends, electric capacity C3 lower ends and FET
Source electrode s is connected.
Described six Schottky diodes VD1, VD2, VD3, VD4, VD5, VD6 respectively constitute two power of Darlington transistor
The Bake anti-saturation clamp circuit of triode, makes the pressure drop of opening of two power main switch triodes be clamped at 1.4V forever.
Whole connecting lines include isolating transformer using 0.03-0.08 millimeter of line footpath high strength enamelled wire coiling and
Double-wire parallel wound, the magnetic core of isolating transformer uses high-frequency magnetic.This just makes the distributed inductance of wire, high frequency Kelvin effect and various
Distributed constant is minimized.
The utility model uses Double-wire parallel wound, can make the distributed inductance of wire, the high frequency Kelvin effect of wire and various
Distributed constant is minimized, thus greatly improve its signal transmission speed and signal distortion is low；Carried using Darlington transistor
The high amplifying power of drive circuit；Bake anti-saturation clamp circuit, makes two pliotrons of Darlington transistor open pressure
Drop is clamped at 1.4V magnifying state forever, and the time that drive circuit driving FET is turned on and off is nanosecond amount
Level, switching speed improves about two orders of magnitude than common driver circuit.
Brief description of the drawings
Fig. 1 is circuit structure diagram of the present utility model.
In Fig. 1, electric capacity C3 upper end is the output end of the utility model drive circuit, is connected with the grid g of FET；
The lower ends of transformer T1 vice-side windings, resistance R4 lower end, resistance R6 lower end, the source electrode of electric capacity C3 lower end and FET
S is connected；The connected mode of triode V2 and V3 and its Bake anti-saturation clamp circuit is the core of drive circuit, triode
V2 and V3 connected mode constitutes Darlington transistor.
Embodiment
The utility model is further illustrated below in conjunction with the accompanying drawings.
The calculating of parameter such as triode, diode specification, size of resistance and existing skill in the utility model shown in Fig. 1
Art is identical, belongs to mature technology therefore is no longer discussed.
The utility model and prior art are not both that drive signal is followed first by emitter follower, emitter-base bandgap grading
The power supply of follower is anti-interference using electric capacity, and then transformer carries out signal isolation, and improving drive circuit using Darlington transistor puts
Big ability, two triodes of composition Darlington transistor will open the eternal clamper of pressure drop using Bake anti-saturation clamp circuit and exist
1.4V magnifying state, embodiments thereof is as follows：Resistance R1 left end is connected with drive signal；Resistance R1 right-hand member and triode
V1 base stage is connected；Triode V1 colelctor electrode, electric capacity C1 upper end, electric capacity C2 upper end, power supply VCC1 are connected；Electric capacity C1's
Lower end and electric capacity C2 lower end ground connection；Triode V1 emitter stage, resistance R2 upper end, the upper end phase of transformer T1 primary side windings
Even；Resistance R2 lower end, the lower end of transformer T1 primary side windings, which are connected, to be grounded；The upper end of transformer T1 vice-side windings, resistance R3
Left end be connected；Resistance R3 right-hand member, diode VD1 anode, diode VD3 anode is connected；Diode VD1 negative electrode with
Diode VD2 anode is connected；Diode VD2 negative electrode is connected with triode V2 base stage；Diode VD3 negative electrode, three poles
Pipe V2 colelctor electrode, diode VD6 negative electrode, triode V3 colelctor electrode, power supply VCC2 are connected；Triode V2 emitter stage,
Resistance R4 upper end, resistance R5 left end are connected；Resistance R5 right-hand member, diode VD4 anode, diode VD6 anode phase
Even；Diode VD4 negative electrode is connected with diode VD5 anode；Diode VD5 negative electrode is connected with triode V3 base stage；
Triode V3 emitter stage, resistance R6 upper end, electric capacity C3 upper end, the grid g of FET is connected；Transformer T1 secondary around
Lower end, resistance R4 lower end, resistance R6 lower end, the electric capacity C3 lower end of group are connected with the source electrode s of FET.
Six diodes VD1, VD2, VD3, VD4, VD5 and VD6 are Schottky diode, and they respectively constitute Darlington
The Bake anti-saturation clamp circuit of two pliotrons of pipe, make two power main switch triodes opens pressure drop quilt forever
Clamper is in 1.4V magnifying state, and so, power main switch triode always works at magnifying state, during the switch of FET
Between will significantly reduce.Whole connecting lines include the high intensity enamel-cover that isolating transformer uses 0.03-0.08 millimeter of line footpath
Line coiling, and the mode of Double-wire parallel wound is used, this just makes the distributed inductance of wire, high frequency Kelvin effect and various distributions
Parameter is minimized.
The operation principle of this drive circuit can also be further described below：
Pliotron V2, V3 constitute Darlington transistor, six VD1, VD2, VD3, VD4, VD5, VD6 points of Schottky diodes
Not Gou Cheng Darlington transistor two pliotrons Bake anti-saturation clamp circuit, after triode ON, emitter junction knot electricity
Press as 0.7V, the tube voltage drop of two Schottky diodes concatenated with base stage is also 0.7V, diode VD1, VD4 anode potential
It is 2.1V, then the collector potential after pliotron conducting is（Tube voltage drop）1.4V, when transistor collector current potential（Pipe
Pressure drop）Rise, flows into the electric current increase of base stage, collector current increase, transistor collector current potential（Tube voltage drop）Reduction, is maintained
1.4V；As long as the tube voltage drop of triode can not possibly be less than 1.4V under the clamper of triode ON Bake anti saturation circuit；Make two
Power main switch triode opens the magnifying state that pressure drop is clamped at 1.4V forever, so, the switch time of FET
Will significantly it reduce.
Actual measurement shows：Using the method for Double-wire parallel wound, can make the distributed inductance of wire, the high frequency Kelvin effect of wire and
Various distributed constants are minimized, thus greatly improve its signal transmission speed and signal distortion is low；Using Darlington
Pipe improves the amplifying power of drive circuit；Bake anti-saturation clamp circuit, opens two pliotrons of Darlington transistor
Logical pressure drop is clamped at 1.4V magnifying state forever.Under square-wave signal driving in the range of frequency 1M-2M, this driving electricity
The time that road driving FET is turned on and off is that within 30ns, switching speed improves about two than common driver circuit
The order of magnitude.
Claims (2)
1. a kind of high frequency high power high speed FET drive circuit, by resistance, electric capacity, diode, triode and isolating transformer
Composition, it is characterised in that resistance R1 left ends are connected with drive signal, and right-hand member is connected with triode V1 base stages；Triode V1 current collections
Pole, electric capacity C1 upper ends, electric capacity C2 upper ends are connected with power supply VCC1；Electric capacity C1 and electric capacity C2 lower end ground connection；Triode V1 launches
Pole, resistance R2 upper ends are connected with the upper end of isolating transformer T1 primary side windings；Resistance R2 lower end, isolating transformer T1 primary sides around
The lower end of group, which is connected, to be grounded；The upper end of isolating transformer T1 vice-side windings, resistance R3 left end are connected；Resistance R3 right-hand members, two poles
Pipe VD1 anodes are connected with diode VD3 anodes；Diode VD1 negative electrodes are connected with diode VD2 anodes；Diode VD2 negative electrodes with
Triode V2 base stages are connected；Diode VD3 negative electrodes, triode V2 colelctor electrodes, diode VD6 negative electrodes, triode V3 colelctor electrodes and
Power supply VCC2 is connected；Triode V2 emitter stages, resistance R4 upper ends are connected with resistance R5 left ends；Resistance R5 right-hand members, diode VD4 sun
Pole is connected with diode VD6 anodes；Diode VD4 negative electrodes are connected with diode VD5 anodes；Diode VD5 negative electrodes and triode
V3 base stages are connected；Triode V3 emitter stages, resistance R6 upper ends, electric capacity C3 upper ends are connected with fet gate g；Isolating transformer
T1 vice-side windings lower end, resistance R4 lower ends, resistance R6 lower ends, electric capacity C3 lower ends are connected with FET source electrode s, whole connecting lines
The high strength enamelled wire coiling using 0.03-0.08 millimeter of line footpath and Double-wire parallel wound including isolating transformer, isolate transformation
The magnetic core of device uses high-frequency magnetic.
2. high frequency high power high speed FET drive circuit according to claim 1, it is characterised in that six diode VD1,
VD2, VD3, VD4, VD5 and VD6 are Schottky diode, and the Bake for respectively constituting two pliotrons of Darlington transistor resists
Saturation clamp circuit, makes the pressure drop of opening of two power main switch triodes be clamped at 1.4V forever.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621421811.XU CN206349915U (en) | 2016-12-23 | 2016-12-23 | A kind of high frequency high power high speed FET drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621421811.XU CN206349915U (en) | 2016-12-23 | 2016-12-23 | A kind of high frequency high power high speed FET drive circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206349915U true CN206349915U (en) | 2017-07-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621421811.XU Expired - Fee Related CN206349915U (en) | 2016-12-23 | 2016-12-23 | A kind of high frequency high power high speed FET drive circuit |
Country Status (1)
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|---|---|
| CN (1) | CN206349915U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109936349A (en) * | 2019-03-29 | 2019-06-25 | 吕建华 | A kind of design and application improving electronic power switch devices switch speed |
-
2016
- 2016-12-23 CN CN201621421811.XU patent/CN206349915U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109936349A (en) * | 2019-03-29 | 2019-06-25 | 吕建华 | A kind of design and application improving electronic power switch devices switch speed |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170721 Termination date: 20181223 |