CN206308268U - Chip architecture in vacuum and antivacuum seamless vacuum coating - Google Patents

Chip architecture in vacuum and antivacuum seamless vacuum coating Download PDF

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Publication number
CN206308268U
CN206308268U CN201621466222.3U CN201621466222U CN206308268U CN 206308268 U CN206308268 U CN 206308268U CN 201621466222 U CN201621466222 U CN 201621466222U CN 206308268 U CN206308268 U CN 206308268U
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CN
China
Prior art keywords
vacuum
seamless
substrate
adhesive tape
chip architecture
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201621466222.3U
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Chinese (zh)
Inventor
严顺智
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Nanchang Zhengixng Photoelectric Technology Co Ltd
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Nanchang Zhengixng Photoelectric Technology Co Ltd
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Priority to CN201621466222.3U priority Critical patent/CN206308268U/en
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Publication of CN206308268U publication Critical patent/CN206308268U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses chip architecture in vacuum and antivacuum seamless vacuum coating;Chip architecture is wherein in the seamless vacuum coating of described vacuum:Rectangle inner groovy is provided with the upper surface of substrate;The bottom of rectangle inner groovy is provided with through hole;Through hole is connected by vacuum tube with one end of vacuum accumulator tank;Chip architecture in described antivacuum seamless vacuum coating, wherein:The side of substrate 1 is disposed with single-side high temperature adhesive tape 2, separating film layer 4 from top to bottom;Vertical film plating machine then than seamless vacuum coating relatively difficult to achieve, it is existing have on carrier, then coated product will be needed to stick again using whole face gluing, realize seamless plated film through techniques such as overbaking or UV.The right plated film mode not only process-intensive, reduces production yield;And such glue is expensive, technique is unstable, once the organic matter that glue occurs volatilizees in a vacuum, causes film quality exception;The utility model has the advantage of:Simple structure, is easy to operation.

Description

Chip architecture in vacuum and antivacuum seamless vacuum coating
Technical field
The utility model is related to chip architecture in a kind of seamless vacuum coating, more particularly, to vacuum and antivacuum seamless vacuum Chip architecture on plated film.
Background technology
Present vacuum coating mode is substantially to be installed product plated film using tool carrier, and fixture can be left after plated film Vestige.
Existing seamless vacuum coating mode mainly has
The horizontal plated film of 1.1 horizontal coating machines, plated film on carrier is lain in by glass, and this mode easily has dust fall, causes life Produce yield low
1.2 vertical film plating machines are existing to have using whole face gluing on carrier, so then than seamless vacuum coating relatively difficult to achieve Coated product will be needed afterwards to stick again, seamless plated film is realized through techniques such as overbaking or UV.The right plated film mode not only technique It is various, reduce production yield;And such glue is expensive, technique is unstable, once the organic matter that glue occurs is waved in a vacuum Hair then causes film quality exception.
The content of the invention
Task to be solved in the utility model is to provide chip architecture in vacuum and antivacuum seamless vacuum coating so that reach It is easy to operation, realizes the purpose of seamless plated film.
In order to solve the above problems, the utility model is achieved through the following technical solutions:
Chip architecture in the seamless vacuum coating of vacuum, including:Substrate, rectangle inner groovy, through hole, vacuum tube, vacuum accumulator tank, Valve;Wherein:Rectangle inner groovy is provided with the upper surface of substrate;The bottom of rectangle inner groovy is provided with through hole;Through hole passes through Vacuum tube is connected with one end of vacuum accumulator tank;Valve is provided with vacuum tube.
Chip architecture in antivacuum seamless vacuum coating, including:It is substrate, single-side high temperature adhesive tape, groove, separating film layer, two-sided High temperature gummed tape, processed product, slide plate;Wherein:The side of substrate is disposed with single-side high temperature adhesive tape, barrier film from top to bottom Layer;The described adhesion of single-side high temperature adhesive tape 2 is on substrate;Described separating film layer is fixed on substrate;Described single-side high temperature Adhesion has double-sided elevated temperature adhesive tape on the upper surface of adhesive tape;It is stained with the non-coated surface of processed product the upper surface of double-sided elevated temperature adhesive tape It is viscous.
Chip architecture in antivacuum seamless vacuum coating, wherein:Set near the side of processed product on described substrate It is fluted;Groove is located between single-side high temperature adhesive tape and separating film layer;The slide plate being slidably connected is provided with groove;Described cunning The cross sectional shape of plate is T-shaped.
The utility model has the advantage of:Simple structure, is easy to operation, and chip architecture is by setting in the seamless vacuum coating of vacuum Put through hole, vacuum tube and realize easy operation, with seamless plated film;Chip architecture passes through two-sided tape in antivacuum seamless vacuum coating Fixation, realize seamless plated film, while reduces cost, be easy to operation,.
Brief description of the drawings
Fig. 1 is the structural representation of the utility model embodiment 1.
Fig. 2 is the front view of the substrate of embodiment 1.
Fig. 3 is the front view of embodiment 2.
Fig. 4 is the side view of embodiment 2.
Reference:Substrate 1, single-side high temperature adhesive tape 2, groove 3, separating film layer 4, double-sided elevated temperature adhesive tape 5, processed product 6th, slide plate 7, rectangle inner groovy 11, through hole 12, vacuum tube 13, vacuum accumulator tank 15, valve 14.
Specific embodiment
Chip architecture in the seamless vacuum coating of embodiment 1, vacuum, including:Substrate 1, rectangle inner groovy 11, through hole 12, vacuum Pipe 13, vacuum accumulator tank 15, valve 14;Wherein:Rectangle inner groovy 11 is provided with the upper surface of substrate 1;Rectangle inner groovy 11 Bottom be provided with through hole 12;Through hole 12 is connected by vacuum tube 13 with one end of vacuum accumulator tank 15;Set on vacuum tube 13 There is valve 14.
Chip architecture in embodiment 2, antivacuum seamless vacuum coating, including:Substrate 1, single-side high temperature adhesive tape 2, groove 3, every From film layer 4, double-sided elevated temperature adhesive tape 5, processed product 6, slide plate 7;Wherein:The side of substrate 1 is disposed with list from top to bottom Face high temperature gummed tape 2, separating film layer 4;The described adhesion of single-side high temperature adhesive tape 2 is on substrate 1;Described separating film layer 4 is fixed on On substrate 1;Adhesion has double-sided elevated temperature adhesive tape 5 on the upper surface of described single-side high temperature adhesive tape 2;The upper end of double-sided elevated temperature adhesive tape 5 Face is sticky with the non-coated surface of processed product 6.
Chip architecture in embodiment 3, antivacuum seamless vacuum coating, wherein:Near for converted products 6 on described substrate 1 Side set fluted 3;Groove 3 is located between single-side high temperature adhesive tape 2 and separating film layer 4;It is provided with groove 3 and is slidably connected Slide plate 7;The cross sectional shape of described slide plate 7 is T-shaped.Remaining is with embodiment 2.
Operation principle:
Two kinds of upper chip architectures that this patent is related to all simply are applied to for vertical film plating machine;In the seamless vacuum coating of vacuum Processed product 6 is placed in rectangle inner groovy 11 described in chip architecture, the non-coated surface of processed product 6 is put towards through hole 12 Put, open described valve 14, adsorbed in rectangle inner groovy 11 processed product 6 by vacuum action, and combine rectangle Inner groovy 11 realizes towards processed products 6 fixation, many easy to operate while seamless plated film is realized;In addition it is described Chip architecture in antivacuum seamless vacuum coating, the fixation of processed product 6 is realized by setting double-sided elevated temperature adhesive tape 5, setting Very enough the playing of separating film layer 4 prevents processed product 6 from being scratched by substrate 1, setting can slide and dismountable slide plate 7 can be with It is easy to operating personnel quickly to position the position of single-side high temperature adhesive tape 2 and separating film layer 4, is easy to quick adhesion single-side high temperature adhesive tape 2 With installation separating film layer 4;Production efficiency is improved, is easy to operation, while seamless plated film can also be realized, reduced and be produced into This.

Claims (3)

1. chip architecture in the seamless vacuum coating of vacuum, including:Substrate, rectangle inner groovy, through hole, vacuum tube, vacuum accumulator tank, valve Door;It is characterized in that:Rectangle inner groovy is provided with the upper surface of substrate;The bottom of rectangle inner groovy is provided with through hole;Through hole It is connected with one end of vacuum accumulator tank by vacuum tube;Valve is provided with vacuum tube.
2. chip architecture in antivacuum seamless vacuum coating, including:Substrate, single-side high temperature adhesive tape, groove, separating film layer, two-sided height Warm adhesive tape, processed product, slide plate;It is characterized in that:The side of substrate be disposed with from top to bottom single-side high temperature adhesive tape, every From film layer;The described adhesion of single-side high temperature adhesive tape 2 is on substrate;Described separating film layer is fixed on substrate;Described one side Adhesion has double-sided elevated temperature adhesive tape on the upper surface of high temperature gummed tape;The upper surface of double-sided elevated temperature adhesive tape and the non-plated film of processed product Face is sticky.
3. chip architecture in antivacuum seamless vacuum coating according to claim 2, it is characterised in that:Leaned on described substrate The side of nearly processed product sets fluted;Groove is located between single-side high temperature adhesive tape and separating film layer;It is provided with groove The slide plate being slidably connected;The cross sectional shape of described slide plate is T-shaped.
CN201621466222.3U 2016-12-29 2016-12-29 Chip architecture in vacuum and antivacuum seamless vacuum coating Expired - Fee Related CN206308268U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621466222.3U CN206308268U (en) 2016-12-29 2016-12-29 Chip architecture in vacuum and antivacuum seamless vacuum coating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621466222.3U CN206308268U (en) 2016-12-29 2016-12-29 Chip architecture in vacuum and antivacuum seamless vacuum coating

Publications (1)

Publication Number Publication Date
CN206308268U true CN206308268U (en) 2017-07-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621466222.3U Expired - Fee Related CN206308268U (en) 2016-12-29 2016-12-29 Chip architecture in vacuum and antivacuum seamless vacuum coating

Country Status (1)

Country Link
CN (1) CN206308268U (en)

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GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170707

Termination date: 20211229

CF01 Termination of patent right due to non-payment of annual fee