CN206302151U - A kind of optical module APD protection circuits - Google Patents

Abstract

The utility model provides a kind of optical module APD protection circuits, including the detection APD quick detection circuits for biasing and the reduction of blood pressure in high-speed shunt circuit triggered by described quick detection circuit；Described quick detection circuit includes PMOS Q2 and peripheral circuit, and described reduction of blood pressure in high-speed shunt circuit includes NMOS tube Q1 peripheral circuits.The utility model employs a NMOS tube and makees shunt circuit, once NMOS open whole APD bias outgoing route equivalent to connect one it is minimum load to ground, voltage can quickly be forgotten about it close to 0 and be kept, APD is effectively protected.

Description

A kind of optical module APD protection circuits

Technical field

The utility model is related to optical module protection circuit field, more particularly to a kind of quick optical module APD protections of reaction Circuit.

Background technology

Optical module is in actual applications because the requirement of some artificial maloperations or special test occurs that big light is incident The situation of receiving terminal, most common case is that without any decay, directly docking is tested optical module, such case docking to light source Receiving end will not typically have an impact for PIN tube cores, but for APD (avalanche photodide) tube core, in the wink of big light docking Between will produce larger photogenerated current due to increasing benefit again, the electric current of generally several mA is easy under tens volts of high pressures effect The damage of APD tube cores is caused, therefore to receiving terminal for the optical module of APD typically has corresponding protection circuit.

The origin cause of formation damaged under the big light of APD may be summarized to be instantaneous excessive energy impact, and this impact includes overvoltage or mistake Stream, APD protection circuits are also to start with from quickly step-down and current limliting, and existing design at present is divided into software control and hardware controls Two schemes.

Current existing software control scheme：The voltage or current anomaly that big light incidence is caused feed back to MCU, MCU inspections Measure and control is taken appropriate measures after exception or the output of DC-DC is closed, Fig. 1 simply illustrates this control process.

There is problems with the program：Feedback signal need to be detected by MCU, judge output control signal, control signal again The time that is also required to that come into force on DC-DC is acted on, all time delays are added up causes its response speed to want slow compared with hardware controls It is many, typically at least ms ranks, this can be described as a critical defect, may cause for requiring that the APD of quick response is protected Design is entirely ineffective, therefore is rarely employed in practical application.

At present, the use of must compare many is hardware protection circuit, such as Fig. 2 is that hardware controls APD relatively conventional at present is protected Shield scheme, frame identification division circuit plays a protective role.R4 is series connection divider resistance, and when big light is incident, the partial pressure of resistance can To reduce practical function in the bias of APD, the reduction of bias can reduce gain so as to while reach the purpose for reducing electric current, incidence Light is bigger, and the amplitude of partial pressure and current limliting is also bigger；Shunt load branch road opens high when big light is incident using the pressure difference at R3 two ends Pressure triode PNP, R0 one end is connected to C grades of PNP, and the connection of the other end has two kinds（1 and 2 connections in corresponding diagram）：One kind is The FB pins of chip are connected to, it is in parallel equivalent to R0 and R1 when PNP is opened, using the feedback regulation function reduction APD of chip itself Bias；Another kind be attached to ground, PNP open when as and connect load using DC-DC fan-out capabilities limitation reduction APD bias And shunted.

Compared to software control, this hardware plan in response speed have significantly improve, the APD under 0dBm incident lights Bias voltage waveform is as shown in Figure 3.

It can be seen that, APD biass can be down to a less stationary value by this kind of scheme within hundred us grades of time, be played Certain protective effect, but actual measurement finds for example directly to use the light source pair of 4dBm or so to a certain extent when incident light increase Protection circuit will fail when connecing, and Fig. 4 is the APD bias voltage waveforms of shielding failure moment.

Fig. 4 can intuitively reflect the Railway Project of existing hardware scheme：

（1）Response time is still not fast enough, and Fig. 4 shows and be possible in 10us when incident light is excessive and cause APD to damage, And the response time of this circuit is at least at hundred us grades.

（2）Protection insufficient strength, this is embodied in two aspects, is on the one hand protecting effect relevant with incident light size, separately On the one hand it is also to possess certain amplitude after APD biases stabilization.

Utility model content

The utility model can not be carried out because the reaction time is long for current optical module APD protection circuits to optical module APD The deficiency being effectively protected, there is provided one kind reacts more efficiently optical module APD protection circuits.

The utility model is to realize that the technical scheme that its purpose is used is：A kind of optical module APD protection circuits, optical module APD is connected between APD bias outputs and ground；Protection circuit is connected between APD bias outputs and ground, is constituted and APD Step-down shunt circuit in parallel, including detection APD biass quick detection circuit and triggered by described quick detection circuit Reduction of blood pressure in high-speed shunt circuit；

Described quick detection circuit includes PMOS Q2, resistance R3, resistance R0；The resistance R3 is connected to APD biass Between output end and APD negative electrodes, the source electrode and grid of described PMOS Q2 are connected with the resistance R3 two ends respectively, described The drain electrode of PMOS Q2 is grounded by resistance R0, and the drain electrode of described PMOS Q2 forms the reduction of blood pressure in high-speed shunt circuit of triggering Trigger signal output end；

Described reduction of blood pressure in high-speed shunt circuit includes NMOS tube Q1 and resistance R；The drain electrode of described NMOS tube Q1 is by electricity Resistance R connects APD bias outputs, source ground, and grid connects the trigger signal output end of described quick detection circuit.

The utility model employs a NMOS tube and makees shunt circuit, once NMOS opens whole APD biass outgoing route Equivalent to connect one it is minimum load to ground, voltage can quickly be forgotten about it close to 0 and be kept, and effective guarantor is carried out to APD Shield.

Suitable R3 is taken, when incident light is sufficiently large, the photogenerated current of APD sensings will be such that PMOS opens first in the pressure difference of R3 Open（Unsaturation is turned on）, choosing suitable R0 can make its two ends have a larger pressure difference to fully open NMOS（Saturation conduction）, Now the internal resistance very little of NMOS is negligible, and R is a less current limiting safeguard resistor, once so NMOS opens whole APD Bias outgoing route equivalent to connect one it is minimum load to ground, voltage can quickly be forgotten about it close to 0 and be kept, while DC- The electric current of DC outputs flows through NMOS by substantially all.As long as this design can guarantee that incident light exceedes certain value, APD in principle Bias and electric current all quickly can be dropped to 0 and kept with essentially identical speed.Measured result shows that this scheme can be less than 1us Time in by APD bias reduce to 0, Fig. 6 give 4dBm light sources dock when APD bias voltage waveforms.

Further, in above-mentioned optical module APD protection circuits：The Standard resistance range of resistance R3 between 1K to 2K, resistance Between 300-500 ohm, resistance R is between 50-100 ohm for the resistance of R0.

Further, in above-mentioned optical module APD protection circuits：Also APD is connected in including resistance R2, described resistance R2 On negative electrode.

Further, in above-mentioned optical module APD protection circuits：APD current limits are between 1-2mA.

The utility model is described in more detail with reference to specific embodiment.

Brief description of the drawings

Fig. 1 is APD software protections schematic diagram in the prior art.

Fig. 2 is existing APD hardware protection circuits schematic diagram.

Fig. 3 in 0dbm, the figure of protection circuit protecting effect shown in Fig. 2.

Fig. 4 is the protection circuit protecting effect figure shown in Fig. 2 in 4dbm.

Fig. 5 is the utility model embodiment 1APD protection circuits schematic diagram ().

Fig. 6 is the utility model embodiment 1APD protection circuits schematic diagram (two).

Fig. 7 is the protection circuit protecting effect figure shown in Fig. 5 or Fig. 6 in 4dbm.

Specific embodiment

Embodiment 1, the present embodiment is a kind of PMOS+NMOS APD protection circuits, PMOS quick detections part detection APD electricity Stream size, when input light is excessive, the electric current for flowing through APD is big, APD electric currents should limit value in 1-2mA, if it exceeds this model Enclose, then a trigger signal is produced by R0, make NMOS saturation conductions, APD is depressured and is shunted, as shown in Figure 5：Quick detection electricity Road includes PMOS Q2, resistance R3, resistance R0；Resistance R3 is connected between APD bias outputs and APD negative electrodes, PMOS Q2 Source electrode and grid be connected with resistance R3 two ends respectively, the drain electrode of PMOS Q2 is grounded by resistance R0, the leakage of PMOS Q2 Pole forms the trigger signal output end of the reduction of blood pressure in high-speed shunt circuit of triggering.Here, APD bias outputs are connected to cloudy with APD Resistance R3 between pole is a sample resistance, when the electric current I for flowing through resistance R3 is multiplied by what its resistance was opened more than PMOS Q2 During threshold voltage, PMOS Q2 conductings.

Reduction of blood pressure in high-speed shunt circuit includes NMOS tube Q1 and resistance R；The drain electrode of NMOS tube Q1 meets APD and biases by resistance R Output end, source ground, grid connects the trigger signal output end of quick detection circuit.

Here, resistance R3 is an APD current sampling resistor, and when electric current is normal, the voltage at resistance R3 two ends is smaller, Will not turn on PMOS Q2, when incident light is excessive, the photogenerated current of APD sensings will first turn on PMOS in the pressure difference of R3 （Unsaturation is turned on）, choosing suitable R0 can make its two ends have a larger pressure difference to fully open NMOS（Saturation conduction）, this When NMOS internal resistance very little it is negligible, and R is a less current limiting safeguard resistor, once to open whole APD inclined for so NMOS Pressure outgoing route equivalent to connect one it is minimum load to ground, voltage can quickly be forgotten about it close to 0 and be kept, while DC-DC The electric current of output flows through NMOS by substantially all.As long as this design can guarantee that incident light exceedes certain value in principle, APD is inclined Pressure and electric current all quickly can be dropped to 0 and kept with essentially identical speed.In the present embodiment, bypass NMOS conducting resistances are determined by R It is fixed generally to take tens ohm to ohm levels up to a hundred, even and if general APD equivalent resistances under the input of big light also at several kilo-ohms Nurse magnitude, therefore, the bypass of NMOS can be effectively protected to APD.Measured result shows that this scheme can be less than 1us Time in by APD bias reduce to 0, Fig. 7 give 4dBm light sources dock when APD bias voltage waveforms.

In the present embodiment, one current-limiting resistance R2 can also be set in the negative electrode of APD, APD is carried out more further to protect Shield.

In the present embodiment, for the protection for carrying out having friendship to APD, the electric current of an amount APD is carried out immediately after being more than 1 to 2mA Step-down shunting, in the present embodiment, the Standard resistance range of resistance R3 is between 1K to 2K, and the resistance of resistance R0 is also fairly small in 300- Just can be between 500 ohm, and current-limiting resistance R is then smaller, takes 50-100 ohm, PMOS Q2 and NMOS tube Q1 is selected Common high-voltage MOS pipe is selected, if the electric current of APD is close to 2mA, the G-S pole tensions of PMOS Q2 are up to 2 to 4V, PMOS Q2 will be turned on, and the D-G voltages of PMOS would fall to close to zero, and so, the voltage at the drain D of PMOS Q2 will reach To 2 to 4V, it is added in the grid G of NMOS tube, turns on NMOS tube Q1, the step-down shunting of glue is carried out to APD.

The present embodiment is and existing using the MOSFET opening times are short and carry out design protection the characteristics of small conducting internal resistance Hardware protection compared to have response faster, the stronger advantage of protective effect, to such as table 1：

TableAPD protects the old and new's hardware plan to contrast

Design	APD biases fall time	APD biases decline degree	Protecting effect
				Prior art	100us	Stabilization is in certain amplitude	The excessive failure of incident light
The present embodiment 1,2	1us	It is reduced to 0	It is unrelated with incident light size

The contrast of table 1 shows that the protective value of new departure has and increases substantially, and at utmost ensure that the peace that APD is used Quan Xing.

Claims (4)

1. a kind of optical module APD protection circuits, optical module APD is connected between APD bias outputs and ground；Protection circuit is connected Between APD bias outputs and ground, the step-down shunt circuit in parallel with APD, including the quick detection that detection APD is biased are constituted Circuit and the reduction of blood pressure in high-speed shunt circuit triggered by described quick detection circuit；It is characterized in that：

Described quick detection circuit includes PMOS Q2, resistance R3, resistance R0；The resistance R3 is connected to APD bias outputs Between end and APD negative electrodes, the source electrode and grid of described PMOS Q2 are connected with the resistance R3 two ends respectively, described PMOS The drain electrode of pipe Q2 is grounded by resistance R0, and the drain electrode of described PMOS Q2 forms the triggering of the reduction of blood pressure in high-speed shunt circuit of triggering Signal output part；

Described reduction of blood pressure in high-speed shunt circuit includes NMOS tube Q1 and resistance R；The drain electrode of described NMOS tube Q1 is connect by resistance R APD bias outputs, source ground, grid connects the trigger signal output end of described quick detection circuit.

2. optical module APD protection circuits according to claim 1, it is characterised in that：The Standard resistance range of resistance R3 in 1K extremely Between 2K, between 300-500 ohm, resistance R is between 50-100 ohm for the resistance of resistance R0.

3. optical module APD protection circuits according to claim 1 and 2, it is characterised in that：It is described also including resistance R2 Resistance R2 is connected on APD negative electrodes.

4. optical module APD protection circuits according to claim 3, it is characterised in that：APD current limits are between 1-2mA.