CN206212014U - A kind of hydrology transmits substation isolated form ethernet circuit - Google Patents

Abstract

The utility model discloses a kind of hydrology transmission substation isolated form ethernet circuit; including Ethernet chip circuit, anti-static protection circuit and isolated form Ethernet interface; Ethernet chip circuit is made up of W5100 Ethernet chips, is made up of D1CDSOT23 SM712 and D12CDSOT23 SM712.The hydrology of the present utility model transmits substation isolated form ethernet circuit; by the Ethernet chip circuit, anti-static protection circuit and the isolated form Ethernet interface that set; due to Ethernet chip circuit can the packet of SPI be converted into the packet of ethernet signal, so as to carry out Treatment Analysis to the data after conversion；And anti-static protection circuit is ethernet signal establishment antistatic protection and isolation network, so as to ensure that signal is interference-free in the environment such as severe electromagnetism, high temperature, high humidity, blast and influences；Isolated form Ethernet interface, earthward exports after can ethernet signal be isolated simultaneously, realizes the buffer action of underground ethernet signal and ground ethernet signal.

Description

A kind of hydrology transmits substation isolated form ethernet circuit

Technical field

The utility model is related to water resource hydrologic monitoring administrative skill field, especially a kind of hydrology transmission substation isolated form Ethernet circuit.

Background technology

In colliery industry, industrial Ethernet technology can be realized for the main production unit place of whole mine being building up to one In the network platform, while setting interchanger in the crucial place of looped network network, the automation equipments such as neighbouring instrument and meter are connect Enter onto interchanger.Looped network is formed on ground and underground by many interchangers, the various types of signal of ground and underground is unified to pass It is defeated to Dispatch and Command Center.

Use the problem of packet loss for a long time in the environment such as severe electromagnetism, high temperature, high humidity, blast due to ethernet technology, So the signal of mine Ethernet such as is necessary to be isolated, shields at the treatment.

Utility model content

The purpose of this utility model is to provide a kind of hydrology transmission substation isolated form ethernet circuit, to solve the above-mentioned back of the body The problem proposed in scape technology.

To achieve the above object, the utility model provides following technical scheme：A kind of hydrology transmits substation isolated form ether Net circuit, including Ethernet chip circuit, anti-static protection circuit and isolated form Ethernet interface, the Ethernet chip circuit It is made up of W5100 Ethernet chips, and one end of W5100 Ethernet chips is provided with the pin being connected with circuit, i.e. GNDD numbers Word circuit ground pin, GNDA analog circuits ground pin and REST-BG pins, the GNDD digital circuits ground pin and GNDA simulations Circuit ground pin is electrically connected with by circuit and a DGND digital circuits ground, and the REST-BG pins pass through circuit and two Also it is installed with number DGND digital circuits ground, and the circuit that is connected with No. two DGND digital circuits of REST-BG pins RW11 resistance and RW12 resistance, are additionally provided with the pin being connected with circuit, i.e. REST and draw on the other end of W5100 Ethernet chips Pin, RD read pin, WR and write pin, INT pins and CS chip select pins, and the REST pins pass through circuit and W5100-RST It is electrically connected with, the INT pins are electrically connected with by circuit with W5100-INT, the RD reads pin, WR and writes pin and piece Pin is selected to be electrically connected with by circuit and an ETH-3.3V, the upper end of W5100 Ethernet chips is additionally provided with and is connected with circuit Pin, i.e. OPMODE0 manual modes, OPMODE1 manual modes and OPMODE2 manual modes, the manual moulds of OPMODE0 Formula, OPMODE1 manual modes and OPMODE2 manual modes are electrically connected with by circuit and No. three DGND digital circuits ground, The lower end of W5100 Ethernet chips is additionally provided with the pin being connected with circuit, i.e. MSO pins, MOS1 pins, SCS pins, SCLK and draws Pin, SEN pins, TESTMODE0 pins, TESTMODE1 pins, TESTMODE2 pins and TESTMODE3 pins, the MSO draw Pin is electrically connected with by circuit with W5100-MSO, and the MOS1 pins are electrically connected with by circuit with W5100-MSO1, described SCS pins are electrically connected with by circuit with W5100-SCS, and the SCLK pins are electrically connected with by circuit with W5100-SCLK, The SEN pins by circuit and No. two ETH-3.3V electric connections, and on the circuit that is connected with No. two ETH-3.3V of SEN pins Also it is electrically connected with RW14 resistance, the TESTMODE0 pins, TESTMODE1 pins, TESTMODE2 pins and TESTMODE3 Pin is electrically connected with by circuit and No. four DGND digital circuits ground, and the anti-static protection circuit is set up for ethernet signal Antistatic protection and isolation network, it is made up of D1CDSOT23-SM712 and D12CDSOT23-SM712, the D1CDSOT23- It is electrically connected with by circuit between SM712 and D12CDSOT23-SM712, and is also electrically connected with the circuit of both connections RW101, RW102, RW103, RW104 and RW3, the isolated form Ethernet interface are the band Network Isolation transformation of HR911105A The RJ45 joints of device, and be electrically connected with circuit.

As further program of the utility model：The anti-static protection circuit uses the two-way TVS of two passages of SM712 The ESD static suppressors of array.

As further program of the utility model：The inside of the W5100 Ethernet chips is also integrated with depositing for 16KB Reservoir, and W5100 Ethernet chips are compatible with IEEE802.3,10base-T and 802.3u100BASE-TX.

Compared with prior art, the utility model beneficial effect：

The hydrology of the present utility model transmits substation isolated form ethernet circuit, by the Ethernet chip circuit of setting, prevents Electrostatic discharge protective circuit and isolated form Ethernet interface, due to Ethernet chip circuit can SPI packet be converted into Ethernet letter Number packet, so as to carrying out Treatment Analysis to the data after conversion；And anti-static protection circuit is that ethernet signal establishment is anti- Electrostatic protection and isolation network, thus ensure signal it is interference-free in the environment such as severe electromagnetism, high temperature, high humidity, blast and Influence；Isolated form Ethernet interface, earthward exports after can ethernet signal be isolated simultaneously, realizes underground Ethernet letter Buffer action number with ground ethernet signal.

Brief description of the drawings

Fig. 1 is Ethernet chip circuit diagram of the present utility model；

Fig. 2 is anti-static protection circuit schematic diagram of the present utility model；

Fig. 3 is isolated form ethernet interface circuit schematic diagram of the present utility model.

In figure：1- Ethernet chip circuits；2-W5100 Ethernet chips；3-GNDD digital circuits ground pin；4-GNDA moulds Intend circuit ground pin；5-REST-BG pins；Number DGND digital circuits ground of 6-；No. bis- DGND digital circuits ground of 7-；8-RW11 electricity Resistance；9-RW12 resistance；10-REST pins；11-RD reads pin；12-WR writes pin；13-INT pins；The choosing of 14-CS pieces is drawn Pin；15-W5100-RST；16-W5100-INT；Number ETH-3.3V of 17-；18-OPMODE0 manual modes；19-OPMODE1 hands Dynamic model formula；20-OPMODE2 manual modes；No. tri- DGND digital circuits ground of 21-；22-MSO pins；23-MOS1 pins；24-SCS Pin；25-SCLK pins；26-SEN pins；27-TESTMODE0；28-TESTMODE1 pins；29-TESTMODE2 pins； 30-TESTMODE3 pins；31-W5100-MSO；32-W5100-MSO1；33-W5100-SC；34-W5100-SCLK；35- bis- ETH-3.3V；36-RW14；No. tetra- DGND digital circuits ground of 37-；38- anti-static protection circuits；39-D1CDSOT23-SM712； 40-D12CDSOT23-SM712；41-RW101；42-RW102；43-RW103；44-RW104；45-RW3；46- isolated form ether Network interface.

Specific embodiment

Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The every other embodiment for being obtained, belongs to the scope of the utility model protection.

Fig. 1-3 are referred to, in the utility model embodiment, a kind of hydrology transmits substation isolated form ethernet circuit, including Ethernet chip circuit 1, anti-static protection circuit 38 and isolated form Ethernet interface 46, Ethernet chip circuit 1 by W5100 with Too web-roll core piece 2 is constituted, and one end of W5100 Ethernet chips 2 is provided with the pin being connected with circuit, i.e. GNDD digital circuits ground Pin 3, GNDA analog circuits ground pin 4 and REST-BG pins 5, GNDD digital circuits ground pin 3 and GNDA analog circuits ground draw Pin 4 is electrically connected with by circuit and a DGND digital circuits ground 6, and REST-BG pins 5 pass through circuit and No. two DGND numerals Circuit ground 7, and REST-BG pins 5 and No. two DGND digital circuits be also installed with RW11 resistance 8 on 7 circuits being connected With RW12 resistance 9, the pin being connected with circuit, i.e. REST pins 10, RD are additionally provided with the other end of W5100 Ethernet chips 2 Read pin 11, WR and write pin 12, INT pins 13 and CS chip select pins 14, REST pins 10 pass through circuit and W5100- RST15 is electrically connected with, and INT pins 13 are electrically connected with by circuit with W5100-INT16, and RD reads pin 11, WR and writes pin The equal circuit of 12 and CS chip select pins 14 and ETH-3.3V17 are electrically connected with, the upper end of W5100 Ethernet chips 2 be additionally provided with The pin of circuit connection, i.e. OPMODE0 manual modes 18, OPMODE1 manual modes 19 and OPMODE2 manual modes 20, OPMODE0 manual modes 18, OPMODE1 manual modes 19 and OPMODE2 manual modes 20 pass through circuit and No. three DGND numbers Word circuit ground 21 be electrically connected with, the lower end of W5100 Ethernet chips 2 be additionally provided with the pin being connected with circuit, i.e. MSO pins 22, MOS1 pins 23, SCS pins 24, SCLK pins 25, SEN pins 26, TESTMODE0 pins 27, TESTMODE1 pins 28, TESTMODE2 pins 29 and TESTMODE3 pins 30, MSO pins 22 are electrically connected with by circuit with W5100-MSO31, MOS1 Pin 23 is electrically connected with by circuit with W5100-MSO132, and SCS pins 24 are electrically connected with by circuit with W5100-SCS33, SCLK pins 25 are electrically connected with by circuit with W5100-SCLK34, and SEN pins 26 pass through circuit and No. two ETH-3.3V35 electricity Property connection, and the circuit that is connected with No. two ETH-3.3V35 of SEN pins 26 on be also electrically connected with RW14 resistance 36, TESTMODE0 pins 27, TESTMODE1 pins 28, TESTMODE2 pins 29 and TESTMODE3 pins 30 by circuit with No. four DGND digital circuits ground 37 are electrically connected with, and the inside of W5100 Ethernet chips 2 is also integrated with the memory of 16KB, and W5100 Ethernet chips 2 are compatible with IEEE802.3,10base-T and 802.3u100BASE-TX, and anti-static protection circuit 38 is Ethernet signal sets up antistatic protection and isolation network, and it is by D1CDSOT23-SM71239 and D12CDSOT23-SM71240 Composition, between D1CDSOT23-SM71239 and D12CDSOT23-SM71240 by circuit be electrically connected with, and both connection electricity RW10141, RW10242, RW10343, RW10444 and RW345 are also electrically connected with road, anti-static protection circuit 38 is used The ESD static suppressors of the two-way TVS arrays of two passages of SM712, isolated form Ethernet interface 46 is the band network of HR911105A The RJ45 joints of isolating transformer, and be electrically connected with circuit.

The hydrology of the present utility model transmits substation isolated form ethernet circuit, by the Ethernet chip circuit 1 of setting, prevents Electrostatic discharge protective circuit 38 and isolated form Ethernet interface 46, due to Ethernet chip circuit 1 can the packet of SPI be converted into ether The packet of net signal, so as to carry out Treatment Analysis to the data after conversion；And anti-static protection circuit 38 is ethernet signal Antistatic protection and isolation network are set up, so as to ensure that signal is not received in the environment such as severe electromagnetism, high temperature, high humidity, blast Interference and influence；Isolated form Ethernet interface 46, earthward exports after can ethernet signal be isolated simultaneously, realizes underground The buffer action of ethernet signal and ground ethernet signal.

It is obvious to a person skilled in the art that the utility model is not limited to the details of above-mentioned one exemplary embodiment, and And in the case of without departing substantially from spirit or essential attributes of the present utility model, can in other specific forms realize that this practicality is new Type.Therefore, no matter from the point of view of which point, embodiment all should be regarded as exemplary, and is nonrestrictive, this practicality is new The scope of type limits by appended claims rather than described above, it is intended that the equivalency fallen in claim is contained All changes in justice and scope are included in the utility model.Any reference in claim should not be considered as limitation Involved claim.

Moreover, it will be appreciated that although the present specification is described in terms of embodiments, not each implementation method is only wrapped Containing an independent technical scheme, this narrating mode of specification is only that for clarity, those skilled in the art should Specification an as entirety, the technical scheme in each embodiment can also be formed into those skilled in the art through appropriately combined May be appreciated other embodiment.

Claims (3)

1. a kind of hydrology transmission substation isolated form ethernet circuit, including Ethernet chip circuit（1）, anti-static protection circuit （38）With isolated form Ethernet interface（46）, it is characterised in that：The Ethernet chip circuit（1）By W5100 Ethernet chips （2）Composition, and W5100 Ethernet chips（2）One end be provided with the pin being connected with circuit, i.e. GNDD digital circuits ground pin （3）, GNDA analog circuits ground pin（4）With REST-BG pins（5）, GNDD digital circuits ground pin（3）Simulated with GNDA Circuit ground pin（4）By circuit and a DGND digital circuits ground（6）It is electrically connected with, the REST-BG pins（5）Pass through Circuit and No. two DGND digital circuits ground（7）, and REST-BG pins（5）With No. two DGND digital circuits ground（7）The circuit of connection On be also installed with RW11 resistance（8）With RW12 resistance（9）, W5100 Ethernet chips（2）The other end on be additionally provided with and electricity The pin of road connection, i.e. REST pins（10）, RD read pin（11）, WR write pin（12）, INT pins（13）Selected with CS pieces Pin（14）, the REST pins（10）By circuit and W5100-RST（15）It is electrically connected with, the INT pins（13）Pass through Circuit and W5100-INT（16）It is electrically connected with, the RD reads pin（11）, WR write pin（12）With CS chip select pins（14） Equal circuit and an ETH-3.3V（17）It is electrically connected with, W5100 Ethernet chips（2）Upper end be additionally provided with drawing of being connected with circuit Pin, i.e. OPMODE0 manual modes（18）, OPMODE1 manual modes（19）With OPMODE2 manual modes（20）, the OPMODE0 Manual mode（18）, OPMODE1 manual modes（19）With OPMODE2 manual modes（20）Pass through circuit and No. three DGND numerals Circuit ground（21）It is electrically connected with, W5100 Ethernet chips（2）Lower end be additionally provided with the pin being connected with circuit, i.e. MSO pins （22）, MOS1 pins（23）, SCS pins（24）, SCLK pins（25）, SEN pins（26）, TESTMODE0 pins（27）、 TESTMODE1 pins（28）, TESTMODE2 pins（29）With TESTMODE3 pins（30）, the MSO pins（22）By electricity Road and W5100-MSO（31）It is electrically connected with, the MOS1 pins（23）By circuit and W5100-MSO1（32）It is electrically connected with, institute State SCS pins（24）By circuit and W5100-SCS（33）It is electrically connected with, the SCLK pins（25）By circuit and W5100- SCLK（34）It is electrically connected with, the SEN pins（26）By circuit and No. two ETH-3.3V（35）It is electrically connected with, and SEN pins （26）With No. two ETH-3.3V（35）RW14 resistance is also electrically connected with the circuit of connection（36）, the TESTMODE0 pins （27）, TESTMODE1 pins（28）, TESTMODE2 pins（29）With TESTMODE3 pins（30）Pass through circuit and No. four DGND digital circuits ground（37）It is electrically connected with, the anti-static protection circuit（38）For ethernet signal set up antistatic protection and Isolation network, it is by D1CDSOT23-SM712（39）And D12CDSOT23-SM712（40）Composition, the D1CDSOT23- SM712（39）And D12CDSOT23-SM712（40）Between be electrically connected with by circuit, it is and also electrical on the circuit of both connections It is connected with RW101（41）、RW102（42）、RW103（43）、RW104（44）And RW3（45）, the isolated form Ethernet interface （46）It is the RJ45 joints with network isolation transformer of HR911105A, and is electrically connected with circuit.

2. a kind of hydrology according to claim 1 transmits substation isolated form ethernet circuit, it is characterised in that：It is described anti-quiet Electric protection circuit（38）Using the ESD static suppressors of the two-way TVS arrays of two passages of SM712.

3. a kind of hydrology according to claim 1 transmits substation isolated form ethernet circuit, it is characterised in that：It is described W5100 Ethernet chips（2）Inside be also integrated with the memory of 16KB, and W5100 Ethernet chips（2）With IEEE802.3, 10base-T and 802.3u100BASE-TX are compatible.