CN206203878U - Mems - Google Patents
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- CN206203878U CN206203878U CN201621077853.6U CN201621077853U CN206203878U CN 206203878 U CN206203878 U CN 206203878U CN 201621077853 U CN201621077853 U CN 201621077853U CN 206203878 U CN206203878 U CN 206203878U
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Abstract
This application discloses MEMS.The MEMS includes：Substrate；The first insulating barrier on the substrate；Structure sheaf on first insulating barrier and the substrate；And the first wiring layer on the structure sheaf; wherein; cavity in first insulating barrier; the Part I of the structure sheaf is located at cavity top so as to form movable structure; wherein; the MEMS also includes sealer, and the sealer is located at least one the movable structure and first insulating barrier on the exposed surface in the cavity.The MEMS reduces the adhesion and abrasion between micro structures using the hydrophobicity and/or anti-wear performance of sealer.
Description
Technical field
The utility model belongs to microelectromechanical systems (MEMS) technical field, more particularly, to surface protection
The MEMS of layer.
Background technology
MEMS (Micro Electromechanical System, i.e. microelectromechanical systems) refers to collection micro sensing
Device, actuator and signal transacting and control circuit, interface circuit, communication and power supply are in the Micro Electro Mechanical System of one.Using
Microsensor, microactrator, micro partses, Micromechanical Optics device, vacuum microelectronic device, electric power electricity that MEMS technology makes
Sub- device etc. is in Aeronautics and Astronautics, automobile, biomedicine, environmental monitoring, military affairs and all spectra that almost people are touched
In suffer from very wide application prospect.At present, the leading products in MEMS markets are pressure sensor, accelerometer, micro- top
Spiral shell instrument and hard drive are first-class.
In the MEMS process technologies based on silicon, MEMS for example includes the cavity for being formed in a silicon substrate, consolidates
The micro structures such as fixed electrode and movable electrode.At least a portion of movable electrode can be moved freely in cavity or in air.By
In a part of surface of silicon substrate and movable electrode is exposed to air, therefore, the exposed surface of silicon substrate is easy in atmosphere
Form one layer of hydrophilic natural oxidizing layer.One layer of hydrone can be covered in hydrophilic autoxidation layer surface.If MEMS
Device is worked under the environment of humidity, then stronger capillary force can be produced between polysilicon layer, causes the generation of adhesion.This
Outward, the intermolecular Van der Waals force of polysilicon layer, stiction, residual stress also lead to adhesion.This kind of structure exists
It is easy to produce the adhesion of structure interlayer during use, such as between the movable comb of capacitive accelerometer, gyroscope
Make it easy to produce adhesion.The coefficient of friction of silicon substrate is higher, and elastic modelling quantity and mechanical hardness are relatively low, there is wear-resistant energy
Hypodynamic shortcoming.Therefore, rub, abrasion and sticking problem have become the principal element for influenceing MEMS Performance And Reliabilities.
In MEMS, it is considered as to improve friction, reduce abrasion, improve the stability of a system that micro structures surface is modified
Effective means.For example, one layer of hydrophobic film can be coated in the exposed surface of silicon substrate and electrode.
A kind of modified method in surface is included in silicon substrate and the exposed surface of electrode coats one layer of hydrophobic self assembly
Monolayer (Self-assembled monolayer, SAM) layer, makes surface once hydrophobicity, so as to reduce adhesion.So
And, but SAM mode deposition surface protective layers have a disadvantage that.The sealer of the method deposition is generally organosilan,
Such as octadecyl trichlorosilane alkane and perfluor certain herbaceous plants with big flowers base trichlorosilane, after high-temperature process, sealer may be due to organic point
Son volatilization and lose anti-adhesiving effect.
The modified method in another surface is included in silicon substrate and the exposed surface of electrode forms DLC (Diamond-
Like Carbon, DLC) film.Diamond-film-like is a kind of metastable state amorphous carbon-film, and diamond lattic structure is contained inside film.Diamond-like
Stone film has excellent anti-wear performance, and low coefficient of friction, with self-lubricating property, is that a kind of preferable surface abrasion is modified
Film.However, the surface covering power of diamond-film-like is poor.Cannot just be deposited in the sidewall surfaces formed by deep etching technique
Diamond-film-like.However, in MEMS, caused by sidewall surfaces adhesion and/or abrasion be MEMS yield rate it is low and
The subject matter of failure.
Therefore, it is desirable to the structure and technique of MEMS are further improved, to form reliable and stable sealer, from
And improve the yield rate and reliability of MEMS.
Utility model content
In view of the above problems, the purpose of this utility model is to provide a kind of micro structures surface deposition table in cavity inside
The MEMS of face protective layer.
According to one side of the present utility model, there is provided a kind of manufacture method of MEMS, including：Knot is formed on substrate
Structure layer；The first insulating barrier is formed over the substrate；Structure sheaf is formed on first insulating barrier and the substrate；Described
The first wiring layer is formed on structure sheaf；Cavity is formed in first insulating barrier, the Part I of the structure sheaf is located at sky
Chamber top is so as to form movable structure；And it is located at the cavity at least one the movable structure and first insulating barrier
On interior exposed surface, sealer is formed.
Preferably, the sealer has hydrophobicity and/or anti-wear performance.
Preferably, the sealer is the oxide-film of single or multiple lift.
Preferably, the oxide-film is made up of at least one oxide selected from titanium oxide, aluminum oxide and tantalum oxide.
Preferably, the thickness of the sealer is 3 nanometers to 10 nanometers.
Preferably, using the method for ald, the sealer is formed.
Preferably, also include：Formation extends to multiple first deep trouths of the cavity from the upper surface of the structure sheaf, its
In, formed cavity the step of include：Isotropic etching is carried out via the multiple first deep trouth, so as to laterally remove described
A part for one insulating barrier, after the sealer is formed, the sealer covers the multiple first deep trouth
Sidewall surfaces.
Preferably, in the step of forming sealer, vaporous precursors are spread via the multiple first deep trouth
Into the cavity, so as to form the sealer.
Preferably, before forming the first insulation layer, also include：The second insulating barrier, Yi Ji are formed over the substrate
The second wiring layer is formed on second insulating barrier, wherein, the sealer is located at second insulating barrier and described the
At least one two wiring layers are on the exposed surface in the cavity.
Preferably, also include：Formed in first insulating barrier and second insulating barrier and reach the logical of the substrate
Hole, wherein, the Part II of the structure sheaf contacts the substrate via the through hole, the Part I of the structure sheaf and the
Two parts are isolated from each other.
Preferably, before structure sheaf is formed, also include：Seed Layer is formed on first insulating barrier.
Preferably, first wiring layer includes：First wiring, described first connects up the Part I with the structure sheaf
Electrical connection；Second wiring, described second connects up via the Part II and the substrate electrical connection of the structure sheaf；And the 3rd
Wiring, the 3rd wiring is electrically connected via the Part III of the structure sheaf with second wiring layer.
Preferably, the sealer is formed using the method for ald.
Preferably, first insulating barrier and second insulating barrier are made up of silica respectively, first wiring
Layer is made up of the composite bed of aluminium, aluminium silicon or titanium/titanium nitride/aluminium silicon, and second wiring layer is made up of DOPOS doped polycrystalline silicon.
According to another aspect of the present utility model, there is provided a kind of MEMS, including：Substrate；On the substrate
First insulating barrier；Structure sheaf on first insulating barrier and the substrate；And on the structure sheaf first
Wiring layer, wherein, the cavity in first insulating barrier, the Part I of the structure sheaf is located at cavity top so as to shape
Into movable structure, wherein, the MEMS also include sealer, the sealer be located at the movable structure and
At least one described first insulating barrier is on the exposed surface in the cavity.
Preferably, the sealer has hydrophobicity and/or anti-wear performance.
Preferably, the sealer is the oxide-film of single or multiple lift.
Preferably, the oxide-film is made up of at least one oxide selected from titanium oxide, aluminum oxide and tantalum oxide.
Preferably, the thickness of the sealer is 3 nanometers to 10 nanometers.
Preferably, the structure sheaf includes that the multiple first for extending to the cavity from the upper surface of the structure sheaf is deep
Groove.
Preferably, the sealer is located in the sidewall surfaces of the multiple first deep trouth.
Preferably, also include：The second insulating barrier between the substrate and first insulating barrier；Positioned at described
The second wiring layer between one insulating barrier and second insulating barrier.
In preferably, the sealer is located at least one second insulating barrier and second wiring layer in institute
State on the exposed surface in cavity.
Preferably, the MEMS includes reaching the substrate through first insulating barrier and second insulating barrier
Through hole, the Part II of the structure sheaf contacts the substrate via the through hole, the Part I of the structure sheaf and the
Two parts are isolated from each other.
Preferably, first wiring layer includes：First wiring, described first connects up the Part I with the structure sheaf
Electrical connection；Second wiring, described second connects up via the Part II and the substrate electrical connection of the structure sheaf；And the 3rd
Wiring, the 3rd wiring is electrically connected via the Part III of the structure sheaf with second wiring layer.
Preferably, it is additionally included in the Seed Layer formed between first insulating barrier and the structure sheaf.
Preferably, the sealer is formed using the method for ald.
Preferably, first insulating barrier and second insulating barrier are made up of silica respectively, first wiring
Layer is made up of the composite bed of aluminium, aluminium silicon or titanium/titanium nitride/aluminium silicon, and second wiring layer is made up of DOPOS doped polycrystalline silicon.
Preferably, the MEMS is selected from accelerometer, gyroscope, a kind of capacitance type sensor of microphone.
Preferably, the MEMS is acceleration transducer, and the movable structure is mass.
According to the MEMS of the utility model embodiment, the sealer is located at the movable structure and described the
At least one one insulating barrier is on the exposed surface in the cavity, such that it is able to avoid the movable structure and described first exhausted
Adhesion and abrasion between edge layer.
In a preferred embodiment, the structure sheaf includes extending to many of the cavity from the upper surface of the structure sheaf
Individual first deep trouth, the sealer is located in the sidewall surfaces of the multiple first deep trouth, such that it is able to avoid movable knot
Adhesion and abrasion between structure and the remainder of structure sheaf.
In a preferred embodiment, sealer is formed using atomic layer deposition method, it is deep such that it is able to cover first
The sidewall surfaces of groove.Generally, the sidewall surfaces for being formed in deep etching technique cannot deposition surface protective layer, and such side wall table
Abrasion/adhesion is subject matter caused by face.The utility model can be deep the multiple first using atomic layer deposition method
Sealer in uniform thickness is formed in the sidewall surfaces of groove.
In a preferred embodiment, the MEMS also includes being located between the substrate and first insulating barrier
Second insulating barrier, and the second wiring layer between first insulating barrier and second insulating barrier, the surface are protected
Sheath is located at least one second insulating barrier and second wiring layer on the exposed surface in the cavity, so that can
To avoid adhesion and abrasion between movable structure and second insulating barrier and second wiring layer.
The utility model uses the sealer formed in cavity or on deep groove side wall, such that it is able to avoid MEMS devices
The micro structures inside of part and adhesion and abrasion between external component.The sealer improve MEMS yield rate and
Reliability, advantageously reduces the cost of MEMS and the service life of extension MEMS.
In a preferred embodiment, in structure sheaf, formation extends to multiple first deep trouths of cavity inside from upper surface.
The multiple first deep trouth serves not only as etched channels, and when sealer is formed, there is provided the entrance of vaporous precursors
Passage.Therefore, the MEMS need not change agent structure, can be with the compatibility and device performance of retainer member manufacturing process.
In a preferred embodiment, the sealer is the oxide-film of single or multiple lift, can be by high-temperature process mistake
Journey, so as to wafer-level packaging process compatible.
Brief description of the drawings
By description referring to the drawings to the utility model embodiment, of the present utility model above-mentioned and other mesh
, feature and advantage will be apparent from, in the accompanying drawings：
Fig. 1 to 10 is shown respectively schematically cutting for each stage of the MEMS manufacture methods according to the utility model embodiment
Face figure.
Specific embodiment
Various embodiments of the present utility model are more fully described hereinafter with reference to accompanying drawing.In various figures, identical
Element is represented using same or similar reference.For the sake of clarity, the various pieces in accompanying drawing are not drawn to paint
System.
The utility model can be presented in a variety of manners, some of them example explained below.
As shown in figure 1, forming insulating barrier 102 on the substrate 101.Preferably, the substrate 101 can be served as a contrast for semiconductor
Bottom.It is highly preferred that Semiconductor substrate 101 is, for example, silicon substrate.It is further preferred that Semiconductor substrate 101 is, for example, crystal orientation being<
100>N-type silicon substrate.
Insulating barrier 102 is made up of insulating materials, for example silica.It is for instance possible to use thermal oxide, low pressure chemical phase
The deposition method such as (LPVCD) or plasma enhanced chemical vapor deposition (PECVD), two are formed in Semiconductor substrate 101
The insulating barrier 102 of silica material.The thickness of insulating barrier 102 is, for example, 1.5 microns to 3 microns.
Preferably, insulating barrier 102 is formed using thermal oxide on the substrate 101.Insulating barrier 102 from the surface of substrate 101 to
Lower extension forms buried regions.In this preferred embodiment, the surface of the substrate 101 that the thickness of insulating barrier 102 is consumed with thermal oxide
The thickness of layer is corresponding.
Then, using the method for low-pressure chemical vapor deposition (LPVCD), the polysilicon of doping is deposited on insulating barrier 102,
And it is patterned using photoetching and etch process, so that wiring layer 103 is formed, as shown in Figure 2.
In deposition step, depositing temperature can be 570 DEG C to 630 DEG C, and the thickness of polysilicon can be 2 microns to 50 micro-
Rice, such as 3 microns to 10 microns.
In patterning step, for example, resist layer is formed on the surface of polysilicon, using photoetching process in resist layer
It is middle to form the pattern comprising opening.Using resist layer as mask, the exposed portion of polysilicon is removed using the etchant of selectivity
Point.Due to the selectivity for etching, the etching can stop on the surface of insulating barrier 102.After the etching, can by ashing or
Dissolve to remove resist layer in solvent.
After patterning, the remainder of polysilicon forms wiring layer 103.The etch process of the patterning step is for example
It is anisotropic etching.The shape of the patterns of openings in the pattern and mask of wiring layer 103 is complementary.
Then, insulating barrier 104 is formed on the exposed surface of insulating barrier 101 and wiring layer 103, as shown in Figure 3.
Insulating barrier 104 is made up of insulating materials, for example silica.It is for instance possible to use low-pressure chemical vapor deposition
(LPVCD) or the method such as plasma enhanced chemical vapor deposition (PECVD), titanium dioxide is formed in Semiconductor substrate 101
The insulating barrier 104 of silicon material.The thickness of insulating barrier 104 is, for example, 1.5 microns to 3 microns.
As will be described, insulating barrier 104 is applied not only to provide interlayer insulating film for the conductor layer for subsequently forming,
And at least a portion of insulating barrier 104 is used as sacrifice layer, will go in a subsequent step divided by formation cavity.
Then, be patterned using above-mentioned photoetching and etch process, thus formed sequentially pass through insulating barrier 104 and absolutely
Edge layer 102 reaches the through hole of substrate 101, as shown in Figure 4.
In the etch process of the step, suitable etchant can be selected.Selected relative to substrate 101 using etchant
Property removal insulating barrier 104 and insulating barrier 102 expose portion characteristic so that be etched in substrate 101 surface stop.Thus,
By the selective etch of etchant, etch depth can be controlled so that through hole penetrates insulating barrier 104 and insulating barrier 102 just.
In alternate embodiments, etch depth is controlled by controlling the time of etching so that through hole penetrates insulating barrier 104 and insulation
Layer 102, and the desired depth of the lower face of substrate 101 can be reached.Therefore, during through hole can extend into substrate 101.
The etch process of the patterning step is, for example, anisotropic etching.Formed in insulating barrier 104 and insulating barrier 102
Through hole pattern it is roughly the same with the shape of the patterns of openings in mask.It should be noted that this is graphically preferred step, use
The wiring layer subsequently formed in offer and the electrical connection between substrate and wiring layer 103.In alternate embodiments, according to MEMS
The design requirement of device, if upper wiring layer need not be provided to the electrical connection of substrate, can save the step.
Then, polycrystalline silicon seed layer 105 is formed on insulating barrier 104, as shown in Figure 5.Seed Layer 105 is not made only in absolutely
On the surface of edge layer 104, and positioned at the side wall of through hole and bottom, that is, substrate 101 is formed in via the exposed part of through hole
On surface.
It is for instance possible to use low-pressure chemical vapor deposition (LPVCD) or plasma enhanced chemical vapor deposition
(PECVD) method such as, deposit polycrystalline silicon is so as to form Seed Layer 105 on insulating barrier 104.The thickness of Seed Layer 105 is, for example,
10 nanometers to 100 nano-micrometres.In order to improve the electric conductivity of Seed Layer 105, Seed Layer 105 can be entered by pre-deposition technique
Row doping.
It should be noted that it is preferred step to form Seed Layer, for improve the structure sheaf for subsequently forming and insulating barrier 104 it
Between adhesiveness.In alternate embodiments, according to the design requirement of MEMS, if raising MEMS need not be provided
Structural strength, then can save the step.
Then, using the method for low-pressure chemical vapor deposition (LPVCD), in the Epitaxial growth polysilicon of Seed Layer 105, from
And structure sheaf 106 is formed, as shown in Figure 6.Structure sheaf 106 is not made only in the top of insulating barrier 104, and filling through hole, warp
Substrate 101 is reached by through hole.
It is for instance possible to use low-pressure chemical vapor deposition (LPVCD) or plasma enhanced chemical vapor deposition
(PECVD) method such as, in the Epitaxial growth polysilicon of Seed Layer 105 so as to form structure sheaf 106.The thickness example of structure sheaf 106
10 microns to 50 microns in this way.
Preferably, after the step of epitaxial growth, chemical-mechanical planarization (CMP) treatment is carried out, it is smooth to obtain
Body structure surface.
Then, metal level is formed on structure sheaf 106, and is patterned using above-mentioned photoetching and etch process,
So as to form wiring layer 107, as shown in Figure 7.In alternate embodiments, in the step of forming wiring layer 107, structure sheaf
106 can etch to form wiring together with metal level.Due to the electric conductivity of structure sheaf 106, therefore a part for structure sheaf 106 can
Wiring and structure sheaf are collectively forming with wiring layer 107.
It is for instance possible to use sputtering or evaporation technology, the deposited metal layer on structure sheaf 106.The thickness of metal level is for example
It it is 1.5 microns to 3 microns, its material can be aluminium (Al), aluminium silicon (Al-Si1%) or titanium/titanium nitride/aluminium silicon (Ti+TiN+
Al-Si composite bed).
Wiring layer 107 can include bonding wires (bonding pad) and lead, the internal junction for providing MEMS
Structure and the electrical connection with external circuit.In a preferred embodiment, wiring layer 107 includes the first to the 3rd wiring.First wiring
Part I with the structure sheaf is electrically connected.Second wiring is electrically connected via the Part II of the structure sheaf with the substrate
Connect.3rd wiring is electrically connected via the Part III of the structure sheaf with the wiring layer.
Then, it is patterned using photoetching and etch process, so as to form multiple deep trouths, such as Fig. 8 in structure sheaf 106
It is shown.
In patterning step, for example, resist layer PR is formed on the surface of structure sheaf 106, using photoetching process against corrosion
The pattern comprising opening is formed in oxidant layer.Using resist layer PR as mask, the exposure of structure sheaf 106 is removed using dry etching
Part.By the moment for controlling etching so that be etched in and stop on the surface of insulating barrier 104, or enter in insulating barrier 104,
But do not penetrate insulating barrier 104.After the etching, resist layer PR can be removed by being dissolved in ashing or solvent.
The etch process of the patterning step is, for example, anisotropic etching.After patterning, the multiple of structure sheaf 106
The pattern of deep trouth is roughly the same with the shape of the patterns of openings in mask.
Then, it is etched as hard mask using structure sheaf 106 so that a part for structure sheaf 106 forms movable structure,
As shown in Figure 9.
The etching step for example with isotropic etching, wherein using gaseous HF as etchant.Structure sheaf 106 is made
It is hard mask, etchant reaches the exposed surface of insulating barrier 104 via the multiple deep trouths in structure sheaf 106.Due to the choosing for etching
Selecting property, the etching can optionally remove insulating barrier 104 in institute relative to structure sheaf 106, wiring layer 103 and insulating barrier 102
The Part I of multiple deep trouth bottom-exposeds is stated, and it is adjacent with the Part I further to laterally remove insulating barrier 104
Part II.
After the etching, part of the insulating barrier 104 near multiple deep trouths of structure sheaf 106 removes to form cavity, so that
A part for structure sheaf 106 forms movable structure.The movable structure can be as pole in the capacitance type sensor of MEMS structure
A part for plate, can be as mass in the acceleration transducer of MEMS structure.
Then, using the method for ald (ALD), sealer 108 is formed, as shown in Figure 10.
Sealer 108 is not made only on the surface of structure sheaf 106, is additionally, since vaporous precursors via described
Multiple deep trouths in structure sheaf 106 diffuse into cavity, thus movable structure upper surface in structure sheaf 106, lower surface and
In deep groove side wall, and sealer 108 is respectively formed on the surface of wiring layer 103.The thickness of sealer 108 is for example
It is 3 nanometers to 10 nanometers.Sealer 108 is the oxidation film of single or multiple lift, and the oxidation film for example includes being selected from
At least one oxide in titanium oxide (TiO2), aluminum oxide (Al2O3) and tantalum oxide (Ta2O5).
Above-mentioned sealer 108 has hydrophobicity and anti-wear performance.Because sealer 108 had both been formed in movable knot
The lower surface of structure, is formed on the surface of wiring layer 103 again, therefore can reach the purpose of dual anti-adhesion, and does not influence device
Part performance.
In the above-described embodiment, describe MEMS includes the insulating barrier 102, wiring layer for sequentially forming on substrate
103rd, insulating barrier 104, Seed Layer 105, structure sheaf 106 and wiring layer 107.Cavity is formed in insulating barrier 104.In the reality for substituting
Apply in example, according to the design requirement of MEMS, MEMS can include less layer, for example, can be saved in MEMS
Remove insulating barrier 102 and wiring layer 103.According to the technological requirement of MEMS, MEMS can save Seed Layer 105.At this
In alternative embodiment, at least a portion surface of cavity, insulating barrier 104 and structure sheaf 106 is still formed in insulating barrier 104
In cavity, and it is coated with sealer 108.
According to embodiment of the present utility model as described above, these embodiments do not have all of details of detailed descriptionthe,
Also it is only described specific embodiment not limit the utility model.Obviously, as described above, many modifications and change can be made
Change.This specification is chosen and specifically describes these embodiments, is to preferably explain that principle of the present utility model and reality should
With so that skilled artisan can repairing using the utility model and on the basis of the utility model well
Change and use.The scope that protection domain of the present utility model should be defined by the utility model claim is defined.
Claims (15)
1. a kind of MEMS, it is characterised in that including：
Substrate；
The first insulating barrier on the substrate；
Structure sheaf on first insulating barrier and the substrate；And
The first wiring layer on the structure sheaf,
Wherein, the cavity in first insulating barrier, the Part I of the structure sheaf is located at cavity top so as to be formed
Movable structure,
Wherein, the MEMS also includes sealer, and the sealer is located at the movable structure and described the
At least one one insulating barrier is on the exposed surface in the cavity.
2. MEMS according to claim 1, it is characterised in that the sealer has hydrophobicity and/or resistance to
Mill performance.
3. MEMS according to claim 2, it is characterised in that the sealer is the oxidation of single or multiple lift
Film.
4. MEMS according to claim 3, it is characterised in that the thickness of the sealer is 3 nanometers to 10
Nanometer.
5. MEMS according to claim 1, it is characterised in that the structure sheaf includes the upper table from the structure sheaf
Face extends to multiple first deep trouths of the cavity.
6. MEMS according to claim 5, it is characterised in that it is deep that the sealer is located at the multiple first
In the sidewall surfaces of groove.
7. MEMS according to claim 5, it is characterised in that also include：
The second insulating barrier between the substrate and first insulating barrier；
The second wiring layer between first insulating barrier and second insulating barrier.
8. MEMS according to claim 7, it is characterised in that the sealer is located at second insulating barrier
On exposed surface with least one second wiring layer in the cavity.
9. MEMS according to claim 7, it is characterised in that the MEMS is included through the described first insulation
Layer and second insulating barrier reach the through hole of the substrate, and the Part II of the structure sheaf is described via through hole contact
Substrate, the Part I and Part II of the structure sheaf are isolated from each other.
10. MEMS according to claim 9, it is characterised in that first wiring layer includes：
First wiring, first wiring is electrically connected with the Part I of the structure sheaf；
Second wiring, described second connects up via the Part II and the substrate electrical connection of the structure sheaf；And
3rd wiring, the 3rd wiring is electrically connected via the Part III of the structure sheaf with second wiring layer.
11. MEMSs according to claim 1, it is characterised in that be additionally included in first insulating barrier and the knot
The Seed Layer formed between structure layer.
12. MEMSs according to claim 1, it is characterised in that the sealer is using ald
Method is formed.
13. MEMSs according to claim 7, it is characterised in that first insulating barrier and second insulating barrier
It is made up of silica respectively, first wiring layer is made up of the composite bed of aluminium, aluminium silicon or titanium/titanium nitride/aluminium silicon, institute
The second wiring layer is stated to be made up of DOPOS doped polycrystalline silicon.
14. MEMSs according to claim 1, it is characterised in that the MEMS is selected from accelerometer, gyro
Instrument, a kind of capacitance type sensor of microphone.
15. MEMSs according to claim 14, it is characterised in that the MEMS is acceleration transducer, institute
Movable structure is stated for mass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621077853.6U CN206203878U (en) | 2016-09-23 | 2016-09-23 | Mems |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621077853.6U CN206203878U (en) | 2016-09-23 | 2016-09-23 | Mems |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206203878U true CN206203878U (en) | 2017-05-31 |
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ID=58760892
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621077853.6U Active CN206203878U (en) | 2016-09-23 | 2016-09-23 | Mems |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106365104A (en) * | 2016-09-23 | 2017-02-01 | 杭州士兰集成电路有限公司 | MEMS device manufacturing method and MEMS device |
| US11161734B2 (en) | 2017-12-29 | 2021-11-02 | Hangzhou Silan Integrated Circuits Co., Ltd. | MEMS assembly and manufacturing method thereof |
-
2016
- 2016-09-23 CN CN201621077853.6U patent/CN206203878U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106365104A (en) * | 2016-09-23 | 2017-02-01 | 杭州士兰集成电路有限公司 | MEMS device manufacturing method and MEMS device |
| CN106365104B (en) * | 2016-09-23 | 2018-11-30 | 杭州士兰集成电路有限公司 | MEMS device manufacturing method and MEMS device |
| US11161734B2 (en) | 2017-12-29 | 2021-11-02 | Hangzhou Silan Integrated Circuits Co., Ltd. | MEMS assembly and manufacturing method thereof |
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