CN206194402U - Usb flat cable - Google Patents

Usb flat cable Download PDF

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Publication number
CN206194402U
CN206194402U CN201621268853.4U CN201621268853U CN206194402U CN 206194402 U CN206194402 U CN 206194402U CN 201621268853 U CN201621268853 U CN 201621268853U CN 206194402 U CN206194402 U CN 206194402U
Authority
CN
China
Prior art keywords
signal line
common mode
speed differential
line
differential signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201621268853.4U
Other languages
Chinese (zh)
Inventor
张�杰
李金广
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xingning Luxshare Ict Precision Industry Co Ltd
Original Assignee
Xingning Luxshare Ict Precision Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xingning Luxshare Ict Precision Industry Co Ltd filed Critical Xingning Luxshare Ict Precision Industry Co Ltd
Priority to CN201621268853.4U priority Critical patent/CN206194402U/en
Application granted granted Critical
Publication of CN206194402U publication Critical patent/CN206194402U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

The utility model relates to a does USB flat cable accord with USB type C transfer protocols, does it include a plurality of power cords, a plurality of piece -root grafting ground wire, 4 pairs of high -speed differential signal lines, 2 low -speed differential signal lines, 2 common mode ancillary data signal lines, 1 common mode auxiliary control signal line and 1 E MAK chip power supply voltage signal line, the power cord is arranged in the left and right sides, each to high -speed differential signal line, each is to low -speed differential signal line, each common mode ancillary data signal, common mode auxiliary control signal line and E the left and right sides of the MAK chip power supply voltage signal line 1 piece -root grafting ground wire of having arranged is respectively avoided taking place to crosstalk.

Description

USB flat cables
Technical field
The utility model is related to a kind of USB flat cables, more particularly to a kind of USB for meeting USB Type-C agreements flat Cable.
Background technology
USB Type-C interfaces are with the positive anti-plug of the support of its uniqueness, and up to 10GB signal transmission rates, and less Volume, the first-selection as mobile phone of new generation and computer.Current USB cable uses circular cable or flat cable, in refer to State's utility model patent announces a kind of No. 205140564 USB circle cable of exposure, meets USB Type-C host-host protocols, Power line, ground wire and control line are located at middle position, and high-speed differential signal line and low speed differential signal are arranged in power line, ground wire And control line periphery, seriously, number of conductors is more in addition, causes the external diameter of cable larger for cross-interference issue.
A kind of USB flat cables that Chinese utility model patent bulletin the 204884664th is disclosed are refer to, USB is also complied with Type-C host-host protocols, the USB flat cables are symmetrical along central axis, and it includes two pairs of power lines, two pairs of high-speed-differentials Holding wire, a pair of low speed differential signal lines, a pair of control line and some ground wires, the high-speed differential signal line, low speed difference Holding wire, control line and ground wire are arranged between two pairs of power lines jointly, and it is high that the low speed differential signal line is located at two couple Between fast differential signal line, one pair of which high-speed differential signal line be located at a pair of power lines and this pair of low speed differential signal line it Between, this pair of control line is positioned at another to high-speed differential signal line and another between power line.
Utility model content
The purpose of this utility model there are provided a kind of with the USB flat cables for avoiding crosstalk.
To realize object defined above, the utility model is adopted the following technical scheme that:A kind of USB flat cables, meet USB Type-C host-host protocols, it includes some power lines, some ground wires, 4 pairs of high-speed differential signal lines, 2 low speed difference Holding wire, 2 common mode auxiliary data signal lines, 1 common mode auxiliary control signal line and 1 E-MAK chip power supply voltage signal Line, the power line is arranged in the left and right sides, every a pair of high-speed differential signals line, every a pair of low speed differential signal line, each Arrange respectively the left and right sides of common mode auxiliary data signal, common mode auxiliary control signal line and E-MAK chip power supply voltage signal lines It is furnished with 1 ground wire.
Used as further improvement of the utility model, the power line is 6, and the left and right sides of USB flat cables is distinguished 3 power lines of arrangement.
Used as further improvement of the utility model, the ground wire amounts to 10.
Used as further improvement of the utility model, the USB flat cables include 30 data lines, in the lateral direction Put in order it is as follows:Power line sequential is sequentially arranged in the 1st to the 3rd position and the 28th to the 30th position, the ground wire Be listed in the 4th, 7,10,12,14,17,19,21,24,27 positions, the high-speed differential signal line sequential is the 5th, 6,8,9, 22nd, 23,25,26 position, the low speed differential signal line sequential is in the 15th, 16 positions, the common mode auxiliary data signal Line sequential is arranged at the 11st position in the 13rd, 18 positions, the common mode auxiliary control signal line, the E-MAK chips Supply voltage holding wire is arranged in the 20th position.
Used as further improvement of the utility model, the conductor of the power line uses single copper cash.
As further improvement of the utility model, the ground wire, high-speed differential signal line, low speed differential signal line, Common mode auxiliary data signal, common mode auxiliary control signal line or E-MAK chip power supply voltage signals line are using mutually stranded more Core copper cash.
Used as further improvement of the utility model, the power line is 36AWG or more than 36AWG specifications, single current-carrying Ability is not less than 1.2A.
The utility model can effectively prevent crosstalk from occurring on USB flat cables, and provide the current capacity of electric current.
Brief description of the drawings
Fig. 1 is the profile of the utility model USB flat cables.
Fig. 2 is the profile of the power line of the utility model USB flat cables.
Fig. 3 is the profile of the differential signal line of the utility model USB flat cables.
Specific embodiment
Refer to shown in Fig. 1 to Fig. 3, the utility model USB flat cables 10, meet USB Type-C global function signals Host-host protocol, it includes and be spaced in the lateral direction 30 data lines.It include 6 power lines, 11,10 ground wires 12, 4 pairs of 13,2, high-speed differential signal line, 15,1, the common mode auxiliary data signal line of low speed differential signal line 14,2 common mode auxiliary controls Holding wire processed 16 and 1 E-MAK chip power supply voltage signals line 17.
The conductor of power line 11 uses single copper cash, ground wire 12, high-speed differential signal line 13, low speed differential signal line 14th, common mode auxiliary data signal 15, common mode auxiliary control signal line 16 and E-MAK chip power supply voltage signals line 17 are adopted respectively With mutually stranded multicore copper cash, the conductor losses of high-frequency signal is reduced.Power line 11 is 36AWG or more than 36AWG specifications, single Root current capacity is not less than 1.2A, and in order to reserve surplus to design, using the power transmission that carries out of 6 lines, current capacity can be with More than 5A electric currents are transmitted well.
Every a pair of high-speed differential signals line 13, every a pair of low speed differential signal line 14, each common mode auxiliary data signal 15th, the left and right sides of common mode auxiliary control signal line 16 and E-MAK chip power supply voltage signals line 17 is placed with 1 ground connection respectively Line 12, can effectively prevent crosstalk from occurring on USB flat cables 10, and processing is also easy.
Refer to shown in following form, 6 sequentials of power line 11 in the 1st to the 3rd position and the 28th to the 30th position, The sequential of ground wire 12 is the 4th, 7,10,12,14,17,19,21,24,27 positions, high-speed differential signal line 13 is arranged in 5th, 6,8,9,22,23,25,26 position, the sequential of low speed differential signal line 14 in the 15th, 16 positions, common mode supplementary number it is believed that Number 15 sequentials are in the 13rd, 18 positions.Common mode auxiliary control signal line 14 is arranged at the 11st position, E-MAK chip power supplies Voltage signal line 15 is arranged in the 20th position.
Each data arrangement is sequentially:
Wherein, TX1, RX1, TX2, RX2D represent high-speed differential signal;D+, D- represent low speed differential signal;CC1 is represented altogether Mould auxiliary control signal;SBU1, SBU2 represent common mode auxiliary data signal;Vbus represents power supply signal, and GND represents ground signalling (Comprising power ground and signal ground);CC2 represents E-MAK chip power supply voltage signals.
Although being example purpose, preferred embodiment of the present utility model, the common skill of this area are had been disclosed for Art personnel by, it is realized that disclosed in not departing from by appending claims scope and spirit of the present utility model situation Under, various improvement, increase and substitution are possible.

Claims (7)

1. a kind of USB flat cables, meet USB Type-C host-host protocols, it include some power lines, some ground wires, 4 pairs of high-speed differential signal lines, 2 low speed differential signal lines, 2 common mode auxiliary data signal lines, 1 common mode auxiliary control signal Line and 1 E-MAK chip power supply voltage signal line, it is characterised in that:The power line is arranged in the left and right sides, and every a pair at a high speed Differential signal line, every a pair of low speed differential signal line, each common mode auxiliary data signal, common mode auxiliary control signal line and E- The left and right sides of MAK chip power supply voltage signal lines is placed with 1 ground wire respectively.
2. USB flat cables according to claim 1, it is characterised in that:The power line is 6, USB flat cables The left and right sides is arranged 3 power lines respectively.
3. USB flat cables according to claim 1, it is characterised in that:The ground wire amounts to 10.
4. USB flat cables according to claim 1, it is characterised in that:The USB flat cables include 30 single datas Line, putting in order in the lateral direction is as follows:Power line sequential is in the 1st to the 3rd position and the 28th to the 30th position, institute State ground wire sequential the 4th, 7,10,12,14,17,19,21,24,27 positions, the high-speed differential signal line sequentially arranges Be listed in the 5th, 6,8,9,22,23,25,26 positions, the low speed differential signal line sequential is described common in the 15th, 16 positions Mould auxiliary data signal line sequential is arranged at the 11st position in the 13rd, 18 positions, the common mode auxiliary control signal line, The E-MAK chip power supplies voltage signal line is arranged in the 20th position.
5. USB flat cables according to claim 1, it is characterised in that:The conductor of the power line uses single copper cash.
6. USB flat cables according to claim 1, it is characterised in that:It is the ground wire, high-speed differential signal line, low Fast differential signal line, common mode auxiliary data signal, common mode auxiliary control signal line or E-MAK chip power supply voltage signals line are used Mutually stranded multicore copper cash.
7. USB flat cables according to claim 1, it is characterised in that:The power line is 36AWG or more than 36AWG Specification, single current capacity is not less than 1.2A.
CN201621268853.4U 2016-11-24 2016-11-24 Usb flat cable Expired - Fee Related CN206194402U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621268853.4U CN206194402U (en) 2016-11-24 2016-11-24 Usb flat cable

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621268853.4U CN206194402U (en) 2016-11-24 2016-11-24 Usb flat cable

Publications (1)

Publication Number Publication Date
CN206194402U true CN206194402U (en) 2017-05-24

Family

ID=58723722

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621268853.4U Expired - Fee Related CN206194402U (en) 2016-11-24 2016-11-24 Usb flat cable

Country Status (1)

Country Link
CN (1) CN206194402U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110402050A (en) * 2018-04-24 2019-11-01 佳能株式会社 Flat cable and electronic device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110402050A (en) * 2018-04-24 2019-11-01 佳能株式会社 Flat cable and electronic device

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GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170524

Termination date: 20191124