CN206193755U - Realize structure of quick demonstration when homemade treater starts - Google Patents
Realize structure of quick demonstration when homemade treater starts Download PDFInfo
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- CN206193755U CN206193755U CN201621189944.9U CN201621189944U CN206193755U CN 206193755 U CN206193755 U CN 206193755U CN 201621189944 U CN201621189944 U CN 201621189944U CN 206193755 U CN206193755 U CN 206193755U
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- 230000002349 favourable effect Effects 0.000 abstract 1
- 238000001514 detection method Methods 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Abstract
The utility model especially relates to a realize structure of quick demonstration when homemade treater starts. This realize structure of quick demonstration when homemade treater starts, by homemade treater, display card, OSDFPGA chip, RGB MUX chip and display are constituteed, homemade treater is connected to RGB MUX chip through the display card, the RGBMUX chip passes through the VGA interface of VGA line connection to the display, the OSDFPGA chip passes through I2C bus connection to homemade treater, the display card passes through the VGA interface of HV signal connection OSDFPGA chip and display respectively, and the OSDFPGA chip passes through the RGB signal and MUX signal connection arrives the RGBMUX chip. This realize structure of quick demonstration when homemade treater starts adopts the automated inspection of a line signal and simple and convenient MUX to switch automated inspection and the demonstration that realizes the VGA signal, realizes mode simple accurate, while simple structure, and low cost is applicable to multiple homemade treater, has solved the difficult problem that start display speed is slow of homemade treater, is favorable to improving the competitiveness of homemade treater.
Description
Technical field
The utility model is related to computer and field of cloud computer technology, when more particularly to one kind realizes that domestic processor starts
The structure of quick display.
Background technology
Under the overall background that country advocates information security, as the paces that IT product production domesticization is substituted increasingly are accelerated, use
The products such as notebook, computer, the server of domestic processor are also increasingly extensive.The performance of current domestic processor is also increasingly carried
Rise, it can be seen that have been realized in replacement of the domestic processor to external processor in some fields.But simultaneously also it must be observed that
There are some other factors also affecting the application and popularization of domestic processor in addition to performance.Such as in start display speed side
Face, compared with X 86 processor, for a long time can just show in the start display speed generally existing of current domestic processor device after electricity
Problem, this leverages the experience of user.
Domestic processor needs to do the initial work of many peripheral hardwares before initializing video card after the power-up, it is most important that
Do initialization, the initialization of PCIE of internal memory.And the initialization of these parts or module needs to take a substantial amount of time, so as to lead
Cause cannot be quickly completed the initialization of video card.Based on this, realized the utility model proposes one kind fast when domestic processor starts
The structure of speed display.The video card initialization for avoiding taking considerable time is intended to, the aobvious of relevant information is completed using simple equipment
Show.
The content of the invention
The utility model is in order to make up the defect of prior art, there is provided a kind of simply efficiently to realize that domestic processor is opened
The structure of quick display when dynamic.
The utility model is achieved by the following technical solution：
A kind of structure for realizing quick display during domestic processor startup, it is characterised in that：By domestic processor CPU, show
Card, OSD/FPGA chips, RGB MUX chips and display are constituted, and the domestic processor CPU is connected to RGB by video card
MUX chips, the RGB MUX chips are connected to the USB interface of display by VGA line；The OSD/FPGA chips pass through I2C
Bus is connected to domestic processor CPU, and the VGA that the video card connects OSD/FPGA chips and display by HV signals respectively connects
Mouthful, OSD/FPGA chips are signally attached to the RGB MUX chips by rgb signal and MUX.
The OSD/FPGA chips are used to realize the aobvious of domestic processor CPU relevant informations before video card initialization completion
Show, OSD/FPGA chips are realized by the detection to HV signals to the judgement that video card initialization is not completed.
The domestic processor CPU is domestic Loongson processor CPU, and domestic Feiteng processor CPU and domestic Shen prestige are processed
Any one in device CPU；The video card uses universal PC IE video cards, is connected with domestic processor CPU by PCIE signal, leads to
Rgb signal is crossed to be connected with RGB MUX chips；The OSD/FPGA chips use OSD chips or general fpga chip.
The OSD chip models are MTV 018, and the RGB MUX chip models are MAX4023.
The beneficial effects of the utility model are：The structure of quick display when this realizes that domestic processor starts, using row field
The MUX switchings of the automatic detection and simplicity of signal, realize automatic detection and the display of VGA signals, and implementation is simple and easy to do,
Simple structure, with low cost, it is adaptable to various domestic processors simultaneously, and the start display speed for solving domestic processor is slow
Problem, is conducive to improving the market competitiveness of domestic processor.
Brief description of the drawings
Accompanying drawing 1 is the structural representation quickly shown when the utility model realizes domestic processor startup.
Specific embodiment
In order that technical problem to be solved in the utility model, technical scheme and beneficial effect become more apparent, with
Under in conjunction with the accompanying drawings and embodiments, the utility model is described in detail.It should be noted that specific reality described herein
Apply example to be only used to explain the utility model, be not used to limit the utility model.
The structure of quick display when this realizes that domestic processor starts, by domestic processor CPU, video card, OSD/FPGA cores
Piece, RGB MUX chips and display are constituted, and the domestic processor CPU is connected to RGB MUX chips, the RGB by video card
MUX chips are connected to the USB interface of display by VGA line；The OSD/FPGA chips are connected to domestic place by I2C buses
Reason device CPU, the video card connects the USB interface of OSD/FPGA chips and display, OSD/FPGA chips by HV signals respectively
The RGB MUX chips are signally attached to by rgb signal and MUX.
The OSD/FPGA chips are used to realize the aobvious of domestic processor CPU relevant informations before video card initialization completion
Show, OSD/FPGA chips are realized by the detection to HV signals to the judgement that video card initialization is not completed.
The domestic processor CPU is domestic Loongson processor CPU, and domestic Feiteng processor CPU and domestic Shen prestige are processed
Any one in device CPU；The video card uses universal PC IE video cards, is connected with domestic processor CPU by PCIE signal, leads to
Rgb signal is crossed to be connected with RGB MUX chips；The OSD/FPGA chips use OSD chips or general fpga chip.
The OSD chip models are MTV 018, and the RGB MUX chip models are MAX4023.
When using, because OSD/FPGA chips are connected by I2C buses with domestic processor CPU, therefore can exist quickly
Complete initialization action after electricity on domestic processor CPU, and by I2C buses receive order that domestic server CPU sends or
Data.
Domestic processor CPU is to the initialization of OSD/FPGA chips earlier than the initialization to complex devices such as internal memory, video cards.
Initialization of the domestic processor CPU to OSD/FPGA chips is completed by I2C buses.Including but not limited to configure OSD/FPGA cores
Piece, can realize the display of relevant information before video card work.
OSD/FPGA chips can automatic detection video card display output signal, OSD/FPGA chips are by detecting video card VGA
The HV of output（Row field）Signal judges whether video card has output.When video card is not exported, by video card to RGB MUX chips
Rgb signal is outputted to output of the OSD/FPGA chips to RGB MUX chips.RGB MUX chips outputting VGA signals to display
Device.
Domestic processor CPU can be shown by OSD/FPGA chips and include but is not limited to the initialization such as initialization progress bar
Related information.
Claims (3)
- It is 1. a kind of to realize the quick structure for showing during domestic processor startup, it is characterised in that：By domestic processor CPU, video card, OSD/FPGA chips, RGB MUX chips and display are constituted, and the domestic processor CPU is connected to RGB MUX cores by video card Piece, the RGB MUX chips are connected to the USB interface of display by VGA line；The OSD/FPGA chips pass through I2C buses Domestic processor CPU is connected to, the video card connects the USB interface of OSD/FPGA chips and display by HV signals respectively, OSD/FPGA chips are signally attached to the RGB MUX chips by rgb signal and MUX.
- It is 2. according to claim 1 to realize the quick structure for showing during domestic processor startup, it is characterised in that：The state It is domestic Loongson processor CPU to produce processor CPU, any one in domestic Feiteng processor CPU and domestic Shen prestige processor CPU Kind；The video card uses universal PC IE video cards, is connected with domestic processor CPU by PCIE signal, by rgb signal and RGB MUX chips are connected；The OSD/FPGA chips use OSD chips or general fpga chip.
- It is 3. according to claim 2 to realize the quick structure for showing during domestic processor startup, it is characterised in that：It is described OSD chip models are MTV 018, and the RGB MUX chip models are MAX4023.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621189944.9U CN206193755U (en) | 2016-11-01 | 2016-11-01 | Realize structure of quick demonstration when homemade treater starts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621189944.9U CN206193755U (en) | 2016-11-01 | 2016-11-01 | Realize structure of quick demonstration when homemade treater starts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206193755U true CN206193755U (en) | 2017-05-24 |
Family
ID=58735013
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621189944.9U Active CN206193755U (en) | 2016-11-01 | 2016-11-01 | Realize structure of quick demonstration when homemade treater starts |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206193755U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109032987A (en) * | 2018-07-05 | 2018-12-18 | 山东超越数控电子股份有限公司 | A kind of computer system and method accelerating domestic processor based on FPGA |
| CN110012253A (en) * | 2019-03-31 | 2019-07-12 | 山东超越数控电子股份有限公司 | A kind of server start process video display optimization method |
-
2016
- 2016-11-01 CN CN201621189944.9U patent/CN206193755U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109032987A (en) * | 2018-07-05 | 2018-12-18 | 山东超越数控电子股份有限公司 | A kind of computer system and method accelerating domestic processor based on FPGA |
| CN110012253A (en) * | 2019-03-31 | 2019-07-12 | 山东超越数控电子股份有限公司 | A kind of server start process video display optimization method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20211102 Address after: 250100 building S02, No. 1036, Langchao Road, high tech Zone, Jinan City, Shandong Province Patentee after: Shandong Inspur Scientific Research Institute Co.,Ltd. Address before: 250100 First Floor of R&D Building 2877 Kehang Road, Sun Village Town, Jinan High-tech Zone, Shandong Province Patentee before: JINAN INSPUR HIGH-TECH TECHNOLOGY DEVELOPMENT Co.,Ltd. |
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| TR01 | Transfer of patent right |