CN206178524U - A high linearity current mirroring circuit for DAC output - Google Patents
A high linearity current mirroring circuit for DAC output Download PDFInfo
- Publication number
- CN206178524U CN206178524U CN201621028917.3U CN201621028917U CN206178524U CN 206178524 U CN206178524 U CN 206178524U CN 201621028917 U CN201621028917 U CN 201621028917U CN 206178524 U CN206178524 U CN 206178524U
- Authority
- CN
- China
- Prior art keywords
- grid
- current
- dac
- source
- drain electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Amplifiers (AREA)
Abstract
The utility model provides a high linearity current mirroring circuit for DAC output, include: a MOS manages M7, and its grid links to each other back and digital control electric current source array with the drain electrode output links to each other, and the output current of this digital control electric current source array is along with DAC's digital input value increases and the increase, the 2nd MOS manages M8, and its grid is connected with M7's grid, drain electrode and M7's source connection, source electrode ground connection, the 3rd MOS manages M9, and its grid is connected with M7's grid, and the drain electrode links to each other with DAC's output, fourth MOS manages M10, its drain electrode and M9's source connection, source electrode ground connection, the 5th MOS manages M11, and its grid is connected with M10's grid, source electrode ground connection, operational amplifier OP1, its positive input terminal and M9's source connection, negative pole input and the 6th MOS manage M12's source connection, and the output is connected with M12's grid, M12's source electrode still is connected with M11's drain electrode, M12's drain electrode is connected to the external load circuit.
Description
Technical field
This utility model is related to a kind of integrated circuit, more particularly to a kind of current mirroring circuit.
Background technology
In hybrid digital-analog integrated circuit, current-output type digital to analog converter (DAC) is often used as analog circuit biased electrical
The control unit of stream, a kind of typical case's application be the bias current (IBIAS) of laser driver (LASER DIODE DRIVER) and
The control of modulation electric current (IMOD).
The simplified circuit of the IBIAS and IMOD control of laser driver LDD is as shown in Figure 1:Optical power control logic is determined
The output current size of two DAC, then output is amplified after certain multiple to laser diode by current mirroring circuit 1,2.Electricity
The input of current mirror circuit and output current will have the good mirror image linearity, and one is that requirement current mirror has high output impedance, suppression
Impact of the channel-length modulation processed to current mirror precision;Two is that the input voltage of current mirror can not be too high, it is impossible to super
Cross the normal output voltage scope of DAC.Herein current mirroring circuit 1,2 has following several frequently seen implementation:
Scheme one:As shown in Figure 2 this is a kind of automatic biasing type low voltage cascade current mirror circuit, the output terminals A point of DAC
Voltage be equal to VGS1+IOUT_DAC* R1, VGS1It is the gate source voltage of metal-oxide-semiconductor M1 pipes.M1, M2 are current mirror metal-oxide-semiconductors, in order to ensure
The linearity of current mirror, M1, M2 must operate at saturation region.M3, M4 are cascade pipes, and M3, M4 will have suitable grid
Voltage, makes M1, M2 be biased in saturation region.The breadth length ratio of M2, M4 is respectively M times of M1, M2, under ideal conditionss, the drain electrode of M4
Electric current IOUTIt is M times of DAC output currents.
The shortcoming of scheme 1:
(1) as DAC exports the gradually increase of stream, the pressure drop of resistance R1 constantly increases, and DAC output end voltages are well over
The normal range of operation of DAC, affects the linearity of DAC output currents, limits the current range of current mirror normal work;
(2) during current mirror normal work, NMOS tube M1 and M4 must simultaneously be operated in saturation region, it is desirable to VDS1>VGS1-VTH1
And VDS3>VGS3-VTH3, I is obtained by simple derivationOUTThe excursion of permission is:(VGS3-VTH1)/R1<IOUT<VTH3/ R1,
It can thus be seen that only in very limited DAC output current scopes, electric current telescope M1-M4 is all operated in saturation region.
Scheme two:As shown in figure 3, compared with scheme one, eliminating resistance R1, the output end voltage of DAC is equal to VGS1。M3
There is provided by the bias current of M5, M6 of diode-connected with the grid step voltage of M4, the bias current of M5, M6 is fixed.Suitably
Adjustment M5 and M6 size, M1-M4 can be made to be operated in saturation region in certain DAC current output area.
The shortcoming of scheme 2:
Compared with scheme one, self-bias resistor R1 is eliminated, the output voltage range of DAC increased IOUT* R1, DAC's is defeated
Go out voltage range to increase.However, the condition that current mirror metal-oxide-semiconductor M1 and M2 are operated in saturation region is VB-VGS3>VA-VTH1, with
DAC output currents increase, VGS3And VACan increase therewith, because the bias current of M5, M6 is fixed, bias voltage VBIt is also fixed
, M1 and M2 is easy for that linear zone can be entered.
Current mirror outputs generally connect external circuit, and the pressure drop that external circuit is produced often forces M4 to enter linear zone,
Such as LDD speed-sensitive switches in Fig. 2 are generally realized by NMOS tube, it is assumed that the high level of speed-sensitive switch signal is equal to VGSH, switching tube
Gate source voltage when VGSSW, then the drain voltage of M4 is equal to VGSH-VGSW, with output current I of current mirrorOUTIncrease,
VGSWCan therewith increase, work as VGSH-VGSW<VG4-VTH4, M4 will enter linear zone, make current mirror output impedance will drastically under
Drop, the linearity of current mirror is reduced.
Utility model content
Technical problem underlying to be solved in the utility model is to provide a kind of current mirroring circuit, in the very big electric currents of DAC
In the range of exporting change, M1-M4 can be operated in saturation region.
Secondary technical problem to be solved in the utility model is to provide a kind of current mirroring circuit, even if current mirror outputs
Metal-oxide-semiconductor enter linear zone, current mirror output impedance also will not drastically decline, so that the output current of current mirroring circuit is very
When big, also there is the good mirror image linearity.
In order to solve above-mentioned technical problem, this utility model provides a kind of high linearity electricity for DAC outfans
Current mirror circuit, including:
First metal-oxide-semiconductor M7, its grid is connected after being connected with drain electrode with the outfan of Numerical Controlled Current Source array, the numerical control electric current
The output current of source array increases as the digital input value of DAC increases;
Second metal-oxide-semiconductor M8, its grid is connected with the grid of M7, and drain electrode is connected with the source electrode of M7, source ground;
3rd metal-oxide-semiconductor M9, its grid is connected with the grid of M7, and drain electrode is connected with the outfan of DAC;
4th metal-oxide-semiconductor M10, its drain electrode is connected with the source electrode of M9, source ground;
5th metal-oxide-semiconductor M11, its grid is connected with the grid of M10, source ground;
Operational amplifier OP1, its electrode input end is connected with the source electrode of M9, the source of negative input and the 6th metal-oxide-semiconductor M12
Pole connects, and outfan is connected with the grid of M12;The source electrode of the M12 is also connected with the drain electrode of M11;The drain electrode connection of the M12
To external load circuit.
In a preferred embodiment:The Numerical Controlled Current Source array includes constant current source Iconst and binary current source
Array.
In a preferred embodiment:The output current of the Numerical Controlled Current Source array increases with the digital input value of DAC
And increase;The output current of constant current source Iconst keeps constant.
In a preferred embodiment:The external load circuit is high-speed difference switch circuit.
Compared to prior art, the technical solution of the utility model possesses following beneficial effect:
This utility model provides a kind of high linearity current mirroring circuit for DAC outfans, the metal-oxide-semiconductor of cascade
The gate bias voltage of M7 and M8 adjusts the V of current mirror metal-oxide-semiconductor M9-M12 with DAC output current dynamic changesDSValue, it is ensured that electricity
Current mirror circuit is all operated in saturation region in very big DAC output current excursions.
DAC output end voltages are only equal to the V of metal-oxide-semiconductor M9GS, it is not easy to the output services voltage more than DAC.
Using the drain of " empty short " effect clamp current mirror metal-oxide-semiconductor M10 and M11 of operational amplifier OP1, current mirror is made
The V of metal-oxide-semiconductor M10 and M11DSValue is approximate essentially equal, greatly improves the accuracy of mirror image.
Operational amplifier OP1 increases the output impedance of current mirroring circuit, suppresses channel-length modulation to current mirror
The impact of accuracy.Even if the cascade high speed switch tube of current mirror outputs enters linear zone, as long as amplifier amplifier OP1
Saturation region is operated in, the V of current mirror metal-oxide-semiconductor M10 and M11 still can be madeDSValue approximately equal, it is ensured that the accuracy of current mirror.
Description of the drawings
Fig. 1 is the simplified electrical circuit diagram of the IBIAS and IMOD control circuits of laser driver LDD;
Fig. 2 is a kind of circuit diagram of current mirroring circuit in prior art;
Fig. 3 is another kind of circuit diagram of current mirroring circuit in prior art;
Fig. 4 is for the high linearity current mirroring circuit of DAC outfans in this utility model preferred embodiment.
Specific embodiment
This utility model is further described with reference to specific embodiment:
With reference to Fig. 4, a kind of high linearity current mirroring circuit for DAC outfans, including:
First metal-oxide-semiconductor M7, its grid is connected after being connected with drain electrode with the outfan of current source, in the present embodiment, the electricity
Stream source array includes constant current source Iconst and binary current source array.The output current of binary current source array
Increase as the digital input value of DAC increases;The output current of constant current source Iconst keeps constant.So that the electricity
The output current in stream source increases as the digital input value of DAC increases;
Second metal-oxide-semiconductor M8, its grid is connected with the grid of M7, and drain electrode is connected with the source electrode of M7, source ground;
3rd metal-oxide-semiconductor M9, its grid is connected with the grid of M7, and drain electrode is connected with the outfan of DAC;
4th metal-oxide-semiconductor M10, its drain electrode is connected with the source electrode of M9, source ground;
5th metal-oxide-semiconductor M11, its grid is connected with the grid of M10, source ground;
Operational amplifier OP1, its electrode input end is connected with the source electrode of M9, the source of negative input and the 6th metal-oxide-semiconductor M12
Pole connects, and outfan is connected with the grid of M12;The source electrode of the M12 is also connected with the drain electrode of M11;The drain electrode connection of the M12
To external load circuit, in the present embodiment, the external load circuit is high-speed difference switch circuit, according to actual needs, also may be used
To connect other load circuits.
The current mirroring circuit of this programme eliminates the self-bias resistor R1 in scheme 1, and the output voltage of DAC is equal to VGS1, with
Scheme two is identical.Also bias voltage is provided for the grid of M9 using metal-oxide-semiconductor M7, M8 of diode-connected, but it is different from scheme two
, the electric current of M7 and M8 is equal to constant current source Iconst and binary current source array sum, such as Fig. 4 left-hand broken lines inframe
It is shown.Total output current of binary current source array is controlled by DAC input digital values, it is assumed that DAC is N bit resolutions,
When DAC digital input value very littles, Numerical Controlled Current Source array Close All, with digital value increase, current source array output by
Cumulative big, the electric current for flowing through M7 and M8 is raised, and in other words, the output current of the bias current and DAC that flow through M7 and M8 is into
Direct ratio, therefore the output current increase of DAC raises can the current potential of A points, and because M9 plays a part of source follower, B points electricity
Position is also elevated therewith, increases the VDS values of M10.V of the drain voltage of M9 also with M10 pipesGSIt is worth and increases, due to M9 pipe
The bias voltage of grid is directly proportional to DAC output currents, therefore in very big DAC output current excursions, M10 and M9 is
Saturation region can be biased in, and without departing from the output voltage range of DAC.Two inputs difference of operational amplifier OP1
B points and C points in map interlinking 4, the grid level of the output termination M12 of OP1, due to " empty short " characteristic, B points and C of operational amplifier OP1
Point is clamped at approximately equalised current potential.The open loop low-frequency gain for assuming operational amplifier OP1 is AV, current mirror outputs it is defeated
Go out impedance and just increase AVTimes, reach Av*gm4*rout4 2The order of magnitude, gm4And rout4It is mutual conductance and the output impedance of M12, when
The output current increase of current mirror, the V of high speed switch tubeGSIncrease, causes M12 to enter linear zone, but as long as operational amplifier OP1
Still saturation region is operated in, the gain of operational amplifier OP1 is just very big, and current mirror still possesses very high output impedance, " empty
It is short " effect yet suffers from, and makes B points and C points current potential still approximately equal, the drain current of M10 and M11 still have good mirror image
Relation.
This utility model is not limited to aforesaid specific embodiment.Above-described embodiment should not be considered as limiting this practicality
New scope.Those skilled in the art can modify and become while aforementioned detailed description is read and understood
Change.Specific protection domain should be defined by claims.
Claims (4)
1. a kind of high linearity current mirroring circuit for DAC outfans, it is characterised in that include:
First metal-oxide-semiconductor M7, its grid is connected after being connected with drain electrode with the outfan of digital control current source array, and this is digital control
The output current of current source array increases as the digital input value of DAC increases;
Second metal-oxide-semiconductor M8, its grid is connected with the grid of M7, and drain electrode is connected with the source electrode of M7, source ground;
3rd metal-oxide-semiconductor M9, its grid is connected with the grid of M7, and drain electrode is connected with the outfan of DAC;
4th metal-oxide-semiconductor M10, its drain electrode is connected with the source electrode of M9, source ground;
5th metal-oxide-semiconductor M11, its grid is connected with the grid of M10, source ground;
Operational amplifier OP1, its electrode input end is connected with the source electrode of M9, and the source electrode of negative input and the 6th metal-oxide-semiconductor M12 connects
Connect, outfan is connected with the grid of M12;The source electrode of the M12 is also connected with the drain electrode of M11;The drain electrode of the M12 is connected to outer
Section load circuit.
2. a kind of high linearity current mirroring circuit for DAC outfans according to claim 1, it is characterised in that:Institute
Current source is stated including constant current source Iconst and binary current source array.
3. a kind of high linearity current mirroring circuit for DAC outfans according to claim 2, it is characterised in that:Institute
State the output current of binary current source array increases as the digital input value of DAC increases;Constant current source Iconst's
Output current keeps constant.
4. a kind of high linearity current mirroring circuit for DAC outfans according to claim 1, it is characterised in that:Institute
External load circuit is stated for high-speed difference switch circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201621028917.3U CN206178524U (en) | 2016-08-31 | 2016-08-31 | A high linearity current mirroring circuit for DAC output |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201621028917.3U CN206178524U (en) | 2016-08-31 | 2016-08-31 | A high linearity current mirroring circuit for DAC output |
Publications (1)
Publication Number | Publication Date |
---|---|
CN206178524U true CN206178524U (en) | 2017-05-17 |
Family
ID=58675466
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201621028917.3U Active CN206178524U (en) | 2016-08-31 | 2016-08-31 | A high linearity current mirroring circuit for DAC output |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN206178524U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106383546A (en) * | 2016-08-31 | 2017-02-08 | 厦门优迅高速芯片有限公司 | High linearity current mirror circuit used for DAC output terminal |
-
2016
- 2016-08-31 CN CN201621028917.3U patent/CN206178524U/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106383546A (en) * | 2016-08-31 | 2017-02-08 | 厦门优迅高速芯片有限公司 | High linearity current mirror circuit used for DAC output terminal |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR20000071415A (en) | Feedback-Controlled Low Voltage Current Sink/Source | |
CN109343644A (en) | A kind of automatic adjustment current-limiting protection circuit | |
CN108646847A (en) | A kind of temperature protection circuit and band-gap reference voltage circuit of bandgap voltage reference | |
CN116700418A (en) | Accurate adjustable circuit of clamp voltage | |
US11005428B2 (en) | Differential input circuit, amplification circuit, and display apparatus | |
CN206178524U (en) | A high linearity current mirroring circuit for DAC output | |
JP3408788B2 (en) | I / V conversion circuit and DA converter | |
CN107678486A (en) | A kind of reference circuit and chip | |
CN106383546A (en) | High linearity current mirror circuit used for DAC output terminal | |
CN101825910B (en) | Current source device capable of regulating current intensity | |
CN103558899B (en) | Current mirroring circuit | |
CN114584082B (en) | Bandwidth adjusting circuit and bandwidth adjusting method of operational amplifier | |
CN208985027U (en) | A kind of temperature protection circuit and band-gap reference voltage circuit of bandgap voltage reference | |
US6556070B2 (en) | Current source that has a high output impedance and that can be used with low operating voltages | |
CN114825878A (en) | Voltage comparator and current limit control circuit thereof | |
US6798279B2 (en) | Integrated circuit arrangement with a cascoded current source and an adjusting circuit for adjusting the operating point of the cascoded current source | |
CN109194292B (en) | Power amplifier circuit and chip with overcurrent protection function | |
CN111399580A (en) | Linear voltage stabilizing circuit | |
CN113485519B (en) | Linear voltage-stabilizing power supply circuit | |
CN115016583B (en) | Low-voltage band-gap reference circuit | |
CN115167599B (en) | Low-dropout linear voltage regulator | |
CN116225148A (en) | Current mirror circuit, chip and electronic equipment | |
CN217445246U (en) | Voltage comparator and current limit control circuit thereof | |
CN211015193U (en) | Band-gap voltage source structure with high power supply rejection ratio | |
CN114629449B (en) | Operational amplifier |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |