CN206099921U - Adjustable duty cycle pulse generating circuit - Google Patents
Adjustable duty cycle pulse generating circuit Download PDFInfo
- Publication number
- CN206099921U CN206099921U CN201620958838.6U CN201620958838U CN206099921U CN 206099921 U CN206099921 U CN 206099921U CN 201620958838 U CN201620958838 U CN 201620958838U CN 206099921 U CN206099921 U CN 206099921U
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- resistance
- chips
- resistor
- electric capacity
- diode
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Abstract
The utility model discloses an adjustable duty cycle pulse generating circuit, a serial communication port, including NE555 chip, first resistance R1, second resistance R2, third resistance R3, first electric capacity C1, second electric capacity C2, first diode D1, second diode D2, power end, output, hold, the first end earthing terminal of NE555 chip, the five terminal of NE555 chip passes through second electric capacity C2 earthing terminal, the second end and the 6th end of NE555 chip link together to hold through first electric capacity C1 with being connected to, the second end of NE555 chip and the third end that the 6th end still was connected to third resistance R3. The utility model discloses a change adjustable resistance's resistance for because the pulse generating circuit of NE555 chip can produce the pulse signal of variable duty cycle.
Description
Technical field
This utility model is related to pulse generating circuit field, specifically, is to be related to the adjustable pulse generation electricity of dutycycle
Road.
Background technology
In modem electronic circuitry, pulse generator is one of circuit for being frequently necessary to；Pulse generating circuit can be extensive
It is applied in signal source circuit.But, existing pulse generating circuit dutycycle is non-adjustable so that can not meet functional circuit
Need；Or, even if dutycycle is adjustable, but, circuit devcie is more, is not easy to safeguard, and dutycycle once changes, it is necessary to change
Become the configuration of whole circuit so that in-convenience in use.
Utility model content
To overcome the problems referred to above of the prior art, this utility model provides a kind of design ingenious, simple structure is adjustable and accounts for
Sky compares pulse generating circuit.
To achieve these goals, the technical solution adopted in the utility model is as follows：
Adjustable duty cycle pulse generating circuit, including NE555 chips, first resistor R1, second resistance R2,3rd resistor
R3, the first electric capacity C1, the second electric capacity C2, the first diode D1, the second diode D2, power end, outfan, ground terminal；It is described
The first end earth terminal of NE555 chips；5th end of the NE555 chips passes through the second electric capacity C2 earth terminals；The NE555 cores
Second end of piece is together with six end connecting, and is connected to ground terminal by the first electric capacity C1；The second of the NE555 chips
End and the 6th end are also connected to the 3rd end of 3rd resistor R3；7th end of the NE555 chips is connected by first resistor R1
To power end；7th end of the NE555 chips is also connected with the anode of the first diode D1, the negative electrode of the first diode D1
It is connected to the first end of 3rd resistor R3；7th end of the NE555 chips is also connected to described by second resistance R2
The negative electrode of the second diode D2, the anode of the second diode D2 are connected to the second end of 3rd resistor R3.The NE555 cores
4th end of piece and the 8th end are all connected to power end；The three-terminal link of the NE555 chips is adjustable to exportable dutycycle
Pulse signal outfan.
Specifically, 3rd resistor R3 is resistance adjustable resistance；The 3rd resistor R3 maximum resistance is 10 megohms,
Minimum resistance is 1 kilohm.
Preferably, the resistance of first resistor R1 is 1 kilohm, the resistance of second resistance R2 is 550 ohm；First
The capacitance of electric capacity C1 is 0.01uF, and the capacitance of the second electric capacity C2 is 0.01uF；The supply voltage of the power end is positive 9
Volt.
Compared with prior art, this utility model has the advantages that：
This utility model adopts NE555 chips for acp chip, by additional variable resistance, realizes that dutycycle is adjustable
Pulse generating circuit；By changing variable-resistance resistance, you can easily change dutycycle.The circuit devcie is few, after being easy to
Phase safeguards.
Description of the drawings
Fig. 1 is connection diagram of the present utility model.
Specific embodiment
The utility model is described in further detail with reference to the accompanying drawings and examples, and embodiment of the present utility model includes
But it is not limited to the following example.
Embodiment
As shown in figure 1, adjustable duty cycle pulse generating circuit, including NE555 chips, first resistor R1, second resistance R2,
3rd resistor R3, the first electric capacity C1, the second electric capacity C2, the first diode D1, the second diode D2, power end, outfan,
End；
The first end earth terminal of the NE555 chips；5th end of the NE555 chips is grounded by the second electric capacity C2
End；Second end of the NE555 chips is together with six end connecting, and is connected to ground terminal by the first electric capacity C1；It is described
Second end and the 6th end of NE555 chips are also connected to the 3rd end of 3rd resistor R3；
7th end of the NE555 chips is connected to power end by first resistor R1；7th end of the NE555 chips
The anode of the first diode D1 is also connected with, the negative electrode of the first diode D1 is connected to the first end of 3rd resistor R3；
7th end of the NE555 chips is also connected to the negative electrode of the second diode D2 by second resistance R2, and the described 2nd 2
The anode of pole pipe D2 is connected to the second end of 3rd resistor R3.4th end and the 8th end of the NE555 chips is all connected to electricity
Source.Outfan of the three-terminal link of the NE555 chips to the adjustable pulse signal of exportable dutycycle.Described 3rd is electric
Resistance R3 is resistance adjustable resistance；The 3rd resistor R3 maximum resistance is 10 megohms, and minimum resistance is 1 kilohm.Described
The resistance of one resistance R1 is 1 kilohm, and the resistance of second resistance R2 is 550 ohm；The capacitance of the first electric capacity C1 be 0.01uF, institute
The capacitance for stating the second electric capacity C2 is 0.01uF；The supply voltage of the power end is positive 9 volts.The outfan output duty cycle can
The pulse signal of tune.
Above-described embodiment only preferred embodiment of the present utility model, the not restriction to this utility model protection domain,
In every case design principle of the present utility model, and the change for carrying out non-creativeness work on this basis and making are adopted, all should
Belong within protection domain of the present utility model.
Claims (3)
1. adjustable duty cycle pulse generating circuit, it is characterised in that including NE555 chips, first resistor R1, second resistance R2,
3rd resistor R3, the first electric capacity C1, the second electric capacity C2, the first diode D1, the second diode D2, power end, outfan,
End；
The first end earth terminal of the NE555 chips；5th end of the NE555 chips passes through the second electric capacity C2 earth terminals；Institute
The second end of NE555 chips is stated together with six end connecting, and ground terminal is connected to by the first electric capacity C1；The NE555
Second end and the 6th end of chip are also connected to the 3rd end of 3rd resistor R3；
7th end of the NE555 chips is connected to power end by first resistor R1；7th end of the NE555 chips also connects
The anode of the first diode D1 is connect, the negative electrode of the first diode D1 is connected to the first end of 3rd resistor R3；It is described
7th end of NE555 chips is also connected to the negative electrode of the second diode D2, second diode by second resistance R2
The anode of D2 is connected to the second end of 3rd resistor R3；4th end and the 8th end of the NE555 chips is all connected to power end；
Outfan of the three-terminal link of the NE555 chips to the adjustable pulse signal of exportable dutycycle.
2. adjustable duty cycle pulse generating circuit according to claim 1, it is characterised in that 3rd resistor R3 is resistance
Value adjustable resistance；The 3rd resistor R3 maximum resistance is 10 megohms, and minimum resistance is 1 kilohm.
3. adjustable duty cycle pulse generating circuit according to claim 2, it is characterised in that the resistance of first resistor R1
It is worth for 1 kilohm, the resistance of second resistance R2 is 550 ohm；The capacitance of the first electric capacity C1 is 0.01uF, the second electric capacity C2
Capacitance be 0.01uF；The supply voltage of the power end is positive 9 volts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620958838.6U CN206099921U (en) | 2016-08-29 | 2016-08-29 | Adjustable duty cycle pulse generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620958838.6U CN206099921U (en) | 2016-08-29 | 2016-08-29 | Adjustable duty cycle pulse generating circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206099921U true CN206099921U (en) | 2017-04-12 |
Family
ID=58473987
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620958838.6U Expired - Fee Related CN206099921U (en) | 2016-08-29 | 2016-08-29 | Adjustable duty cycle pulse generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206099921U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114115203A (en) * | 2022-01-27 | 2022-03-01 | 天津德科智控股份有限公司 | Analog torque sensor based on NE555 design for EPS |
-
2016
- 2016-08-29 CN CN201620958838.6U patent/CN206099921U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114115203A (en) * | 2022-01-27 | 2022-03-01 | 天津德科智控股份有限公司 | Analog torque sensor based on NE555 design for EPS |
| CN114115203B (en) * | 2022-01-27 | 2022-05-10 | 天津德科智控股份有限公司 | Analog torque sensor based on NE555 design for EPS |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170412 Termination date: 20170829 |
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| CF01 | Termination of patent right due to non-payment of annual fee |