CN205944093U - Array substrate and display device - Google Patents
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- CN205944093U CN205944093U CN201620910245.2U CN201620910245U CN205944093U CN 205944093 U CN205944093 U CN 205944093U CN 201620910245 U CN201620910245 U CN 201620910245U CN 205944093 U CN205944093 U CN 205944093U
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Abstract
The utility model provides an array substrate and display device belongs to and shows technical field. The utility model discloses an array substrate, including the basement, set up a plurality of pixel in the basement, every pixel all includes: thin film transistor and inorganic emitting diode, wherein, thin film transistor's drain electrode pass through the first electrode line with inorganic emitting diode's first ploe is connected, inorganic emitting diode's second ploe and second electrode line connection. The utility model discloses in utilize that inorganic emitting diode ILED has that the size is little, hi -lite, high contrast, frivolous, low -power consumption, high colour gamut, efficient, longe -lived, advantage such as the response is fast, mode through the rendition is used inorganic emitting diode ILED to the array substrate in, can make this array substrate have resolution ratio height, display effect effect such as good.
Description
Technical field
This utility model belongs to display technology field and in particular to a kind of array base palte and display device.
Background technology
With the development of flat panel display, the performance requirement more and more higher of display floater.High-resolution, flexible & be transparent,
High brightness, high-contrast, frivolous, low-power consumption, high colour gamut etc. become the developing direction of display floater.
The panel display apparatus commonly used at present include liquid crystal indicator (Liquid Crystal Display:Referred to as
) and OLED (Organic Light-Emitting Diode LCD:Organic Light Emitting Diode) display device.But, utility model
People finds that LCD display panel is difficult to make the display floater of flexible, high colour gamut, and power consumption is higher;OLED display panel is difficult to
Make limited by high-resolution, the display floater of high permeability and luminescent lifetime.Therefore it provides a high performance display floater
It is urgently the technical issues that need to address.
Utility model content
This utility model is intended at least solve one of technical problem present in prior art, provide a kind of high-resolution,
High permeability, frivolous, low-power consumption, the array base palte of high colour gamut and display device.
Solve this utility model technical problem and be employed technical scheme comprise that a kind of array base palte, including substrate, be arranged on
Described suprabasil multiple pixel cells;Each described pixel cell all includes:Thin film transistor (TFT) and inorganic light-emitting diode;Its
In, the drain electrode of described thin film transistor (TFT) is connected with the first pole of described inorganic light-emitting diode by first electrode line, described nothing
Second pole of machine light emitting diode is connected with second electrode line.
Preferably, described array base palte also includes planarization layer;Described thin film transistor (TFT), described planarization layer, described
Inorganic light-emitting diode is successively set on above described substrate;Drain in described planarization layer and described thin film transistor (TFT) corresponding
Position is provided with connection via, and described thin film transistor (TFT) is drained and described nothing by described first electrode line by described connection via
First pole of machine light emitting diode connects.
Preferably, described array base palte also includes planarization layer;Described inorganic light-emitting diode, described planarization layer,
Described thin film transistor (TFT) is successively set on above described substrate;In described planarization layer and described inorganic light-emitting diode first pole
Corresponding position is provided with connection via, described first electrode line pass through described connection via by described thin film transistor (TFT) drain electrode with
First pole of described inorganic light-emitting diode connects.
Preferably, in each described pixel cell, described inorganic light-emitting diode and described thin film transistor (TFT) are in base
Projection on bottom is least partially overlapped.
Preferably, described array base palte also includes multiple driving chip;Described driving chip, for for described array base
Grid line on plate and/or data wire provide signal.
Preferably, described array base palte also includes the multiple lenticule units being arranged on its exiting surface side;Described micro-
Mirror unit is corresponding with the position of described inorganic light-emitting diode.
It may further be preferable that the projection on the substrate of described lenticule unit covers described inorganic light-emitting diode
Projection on the substrate.
Preferably, multiple described pixel cells are arranged in arrays;Wherein, positioned at described inorganic light-emitting two pole of same a line
The second electrode line that second pole of pipe is connected connects same signal input line.
Preferably, the material of described substrate includes glass, plastics, quartz, any one in silicon chip.
Preferably, to include polycrystalline SiTFT, amorphous silicon film transistor, monocrystal silicon thin for described thin film transistor (TFT)
Any one in film transistor, oxide thin film transistor, thin film transistor (TFT) OTFT.
Solve this utility model technical problem and be employed technical scheme comprise that a kind of display device, it includes above-mentioned array
Substrate.
This utility model has the advantages that:
Have that size is little using inorganic light-emitting diode ILED in this utility model, high brightness, high-contrast, frivolous,
The advantages of low-power consumption, high colour gamut, efficiency high, life-span length, response are fast, should by inorganic light-emitting diode ILED by way of transfer
It is good and other effects with this array base palte to array base palte, can be made to have high resolution, display effect.
Brief description
Fig. 1 be embodiment 1 of the present utility model the first implementation of array base palte in a pixel cell signal
Figure;
Fig. 2 is the schematic diagram of the optimal way in the first implementation of array base palte of embodiment 1 of the present utility model;
Fig. 3 and 4 is the signal of the optimal way in the first implementation of array base palte of embodiment 1 of the present utility model
Figure;
Fig. 5 and Fig. 6 is the schematic diagram of the pixel cell arrangement of the array base palte of embodiment 1 of the present utility model;
Fig. 7 is the structural representation of the array base palte of embodiment 1 of the present utility model;
Fig. 8 is the preparation method flow chart of the array base palte of the first implementation of embodiment 1 of the present utility model;
Fig. 9 be embodiment 1 of the present utility model array base palte second implementation in a pixel cell signal
Figure;
Figure 10 is the preparation method flow chart of the array base palte of second implementation of embodiment 1 of the present utility model.
Wherein reference is:10th, substrate;1st, thin film transistor (TFT);2nd, planarization layer;3rd, first electrode line;4th, the second electricity
Polar curve;5th, lenticule unit;6th, driving chip;ILED, inorganic light-emitting diode.
Specific embodiment
For making those skilled in the art more fully understand the technical solution of the utility model, below in conjunction with the accompanying drawings and specifically real
Mode of applying is described in further detail to this utility model.
Here it should be noted that:1st, the inorganic light-emitting diode (Inorganic in this utility model embodiment
Light-Emitting Diodes, abbreviation ILED), driving chip (drive IC), sensor assembly, the chi of camera module etc.
Very little be micron-sized, specifically should be less than 1mm.2nd, in this utility model embodiment a certain layer above a certain layer, be for
For preparation order, and do not mean that macroscopically upper and lower.
Embodiment 1:
In conjunction with shown in Fig. 1-7,9, the present embodiment provides a kind of array base palte, including substrate 10, arranges many on the substrate 10
Bar grid line and a plurality of data lines, limit multiple pixel cells at the crossover location of grid line data line;Each pixel cell
All include:Thin film transistor (TFT) 1 and inorganic light-emitting diode ILED;Wherein, first electrode line 3 is passed through in the drain electrode of thin film transistor (TFT) 1
It is connected with first pole of inorganic light-emitting diode ILED, second pole of inorganic light-emitting diode ILED is connected with second electrode line 4;
The source electrode of thin film transistor (TFT) 1 is connected with data wire, and grid is connected with grid line.
Specifically, when grid line input scanning signal, the thin film transistor (TFT) 1 being connected with this grid line is strobed, now data
The data voltage being loaded on line then passes through thin film transistor (TFT) 1 and first electrode line 3 exports to corresponding inorganic light-emitting diode
First pole of ILED, the second pole input reference voltage for this inorganic light-emitting diode ILED by second electrode line 4 accordingly
(reference voltage is unequal with the magnitude of voltage of data voltage), to drive inorganic light-emitting diode ILED to be lighted.
For above-mentioned array base palte, in the present embodiment, additionally provide a kind of preparation method of array base palte.The method bag
Include:The step forming thin film transistor (TFT) 1 on the substrate 10, and the step that inorganic thin-film transistors 1 are formed by transfer printing process;
Wherein, wherein, the first of first electrode line 3 and described inorganic light-emitting diode ILED is passed through in the drain electrode of described thin film transistor (TFT) 1
Pole connects, and second pole of described inorganic light-emitting diode ILED is connected with described second electrode line 4.
Have that size is little due to inorganic light-emitting diode ILED, high brightness, high-contrast, frivolous, low-power consumption, high colour gamut,
The advantages of efficiency high, life-span length, response are fast, therefore in the present embodiment by by way of transfer by inorganic light-emitting diode
ILED applies to array base palte, this array base palte can be made to have high resolution, display effect good and other effects.
Below in conjunction with specific implementation, the array base palte in the present embodiment is illustrated.
As the first implementation of the present embodiment, as shown in figure 1, array base palte includes substrate 10, it is arranged on substrate
(grid line and thin film transistor (TFT) 1 grid are with layer setting, data wire and thin film transistor (TFT) 1 source electrode and leakage for the thin film transistor (TFT) 1 of 10 tops
Extremely arrange with layer), the planarization layer 2 above setting thin film transistor (TFT) 1 place layer (is drained with thin film transistor (TFT) 1 in planarization layer 2
Corresponding position is provided with connection via), it is arranged on the inorganic light-emitting diode ILED of planarization layer 2 top, be arranged on inorganic
First electrode line 3 above the layer of light emitting diode ILED place and second electrode line 4;Wherein, first electrode line 3 passes through to connect
The drain electrode of thin film transistor (TFT) 1 is connected by hole with first pole of inorganic light-emitting diode ILED, second electrode line 4 and inorganic light-emitting two
Second pole of pole pipe ILED connects.
Further, as shown in Fig. 2 the miniature drive arranging with layer with inorganic light-emitting diode ILED on this array base palte
Dynamic chip 6 (being integrated on array base palte by the way of transfer), this driving chip 6 is used for as the grid line on described array base palte
And/or data wire provides signal.
Specifically, when driving chip 6 is source electrode driver, now position corresponding with data wire in planarization layer 2
It is also required to setting and connect via, also the 3rd electrode wires arranging with layer with first electrode line 3 and second electrode line 4, the 3rd
Data wire is connected by the connection via that electrode wires are passed through above data wire with driving chip 6 (pin).
When driving chip 6 is gate drivers, setting is now needed to run through planarization layer 2 and gate insulator (grid
Insulating barrier is located between the grid of thin film transistor (TFT) 1 and active layer) connection via, with first electrode line 3 and second electrode line 4
With also the 4th electrode wires of layer setting, the 4th electrode wires will by running through the connection via of planarization layer 2 and gate insulator
Grid line is connected with driving chip 6 (pin).
When driving chip 6 is source electrode driver and the integrated chip of gate drivers, now need in planarization layer 2
Position corresponding with data wire setting connects via, also has the 3rd electricity with first electrode line 3 and second electrode line 4 with what layer was arranged
Polar curve, data wire is connected by the connection via that the 3rd electrode wires are passed through above data wire with driving chip 6 (pin).Meanwhile,
Need setting run through planarization layer 2 and gate insulator (gate insulator be located at the grid of thin film transistor (TFT) 1 and active layer it
Between) connection via, also have the 4th electrode wires, the 4th electrode wires with first electrode line 3 and second electrode line 4 with what layer was arranged
By running through the contact that planarization layer 2 is with gate insulator and crossing, grid line is connected with driving chip 6 (pin).
Here is it should be noted that in implementations below, all only driven with the driving chip 6 in array base palte for source electrode
It is described as a example dynamic device.But, this is not constituted to restriction of the present utility model.
Certainly, can also be by micro- transfer technique integrated sensor module, photographic head on the planarization layer 2 of array base palte
Module etc., forms high integration, multifunctional panel.The added value of display floater therefore can be increased, module is also frivolous.
Further, as shown in figs. 2 and 7, this array base palte also includes the multiple lenticule lists being arranged on its exiting surface side
Unit 5;Lenticule unit 5 is corresponding with the position of inorganic light-emitting diode ILED.That is, in each inorganic light-emitting diode ILED
On a lenticule unit 5 is completely covered.Why arranging lenticule unit 5 is to improve inorganic light-emitting diode ILED
Light extraction efficiency.
Further, as shown in Figures 3 and 4, in each described pixel cell, inorganic light-emitting diode ILED is brilliant with thin film
Body pipe 1 projection on the substrate 10 is least partially overlapped.Wherein, when each pixel cell is as shown in Figure 3, it is inorganic light-emitting two pole
Second pole the connected second electrode line 4 of pipe ILED provides signal input line (not showing in Fig. 3) and this second electrode line 4 of signal
With layer setting;When each pixel cell is as shown in Figure 4, the second pole by inorganic light-emitting diode ILED is connected second electrode line
The signal input lines 7 of 4 offer signals with thin film transistor (TFT) 1 (source/drain or grid) with layer it is therefore desirable in planarization layer 2
Middle setting via, so that second electrode line 4 is connected with signal input line 7.
Why it is arranged such and be because inorganic light-emitting diode ILED and thin film transistor (TFT) 1 projection on the substrate 10
Area is equivalent to the size of this pixel cell, if the area of the projection on the substrate 10 of both is more little more is easily achieved high score
Resolution.Accordingly, it is preferred that the little projected area falling completely within the substrate 10 of both projected area on the substrate 10 is big
Region in.
Preferably, as it can be seen in figures 5 and 6, the multiple described pixel cell in the present embodiment array base palte is arranged in arrays;Its
In, connect same letter positioned at the second electrode line 4 that second pole of the described inorganic light-emitting diode ILED of same a line is connected
Number input line 7.This kind of set-up mode wiring is simple, and drives easily.
Accordingly for this kind of array base palte, the present embodiment additionally provides the preparation method of this kind of array base palte, as Fig. 8 institute
Show, the method specifically includes:
Step one, on the substrate 10, is formed by figure technique and to include each Rotating fields of thin film transistor (TFT) 1, grid line, data wire
Figure.
Wherein, the substrate 10 in the present embodiment can be hard substrate 10 or flexible substrates 10, namely substrate
10 material includes glass, plastics, quartz, any one in silicon chip.If the material of substrate 10 adopts organic plasticss, specifically
Material includes one or more of PET, PC, PMMA, PI.Thin film transistor (TFT) 1 can be with polycrystalline SiTFT 1, non-crystalline silicon
In thin film transistor (TFT) 1, monocrystalline silicon thin film transistor 1, oxide thin film transistor 1, thin film transistor (TFT) 1 OTFT 1
Any one.When oxide thin film transistor 1 selected by thin film transistor (TFT) 1, the material of active layer can choose phthalocyanines
Compound, oligo-thiophenes, fullerene etc..
It is that as a example bottom gate thin film transistor 1, this step is specially by the thin film transistor (TFT) 1 formed in this step:Grid
Pole/grid line → gate insulator → active layer → source/drain/data wire.
Step 2, in the substrate 10 completing step one, coating formed planarization layer 2.
Wherein, the material of planarization layer 2 can include polymethyl methacrylate (PMMA), polyimides (PI), poly- second
Enol (PVA), polyvinylphenol (PVP) etc..
Step 3, in the substrate 10 completing step 2, using transfer printing process, inorganic light-emitting diode ILED is transferred to
Above planarization layer 2.At the same time it can also driving chip 6 is transferred to above planarization layer 2 by transfer printing process.
Step 4, in the substrate 10 completing step 3, by etching technics, in described planarization layer 2 and described thin film
Drain corresponding position of transistor 1 forms and connects via.
Step 5, in the substrate 10 completing step 4, by patterning processes, formed and include first electrode line 3 and second
The figure of electrode wires 4;Wherein, thin film transistor (TFT) 1 is drained and inorganic light-emitting diode by first electrode by described connection via
First pole of ILED connects, and second electrode line 4 is connected with second pole of inorganic light-emitting diode ILED.
So far complete the preparation of array base palte.
Wherein, the order of step 3 and step 4 can also overturn, and here is not described in detail.
Certainly, step 6 can also be included on the basis of above-mentioned steps, in the shape of the exiting surface side of described array base palte
The step becoming multiple lenticule units 5;Described lenticule unit 5 is corresponding with the position of described inorganic light-emitting diode ILED,
To improve the light extraction efficiency of inorganic light-emitting diode ILED.
Array base-plate structure as second implementation of the present embodiment, in this array base palte and the first implementation
Roughly the same, difference is, for substrate 10, thin film transistor (TFT) 1 is located on inorganic light-emitting diode ILED.
Specifically, as shown in figure 9, this array base palte includes substrate 10, setting inorganic light-emitting diode on the substrate 10
ILED, the second electrode line 4 being connected with inorganic light-emitting diode ILED second pole, it is arranged on inorganic light-emitting diode ILED and be located
The planarization layer 2 of layer top, and be provided with the first extremely corresponding position of planarization layer 2 and inorganic light-emitting diode ILED
Connect via, (grid line is arranged with layer with thin film transistor (TFT) 1 grid, data to be arranged on the thin film transistor (TFT) 1 of planarization layer 2 top
Line and thin film transistor (TFT) 1 source electrode and drain electrode are with layer setting), by connecting via, thin film transistor (TFT) 1 is drained and inorganic light-emitting two
The first electrode line 3 that first pole of pole pipe ILED connects.
Further, passivation layer can also be set above thin film transistor (TFT) 1 place layer, over the passivation layer can be by turning
Print technique setting and the first implementation identical micro drives chip 6, sensor assembly, camera module etc., form high
Integrated level, multifunctional panel.The added value of display floater therefore can be increased, module is also frivolous.
Further, can also multiple lenticule units 5 in side over the passivation layer;Lenticule unit 5 and inorganic light-emitting two pole
The position of pipe ILED is corresponding.That is, covering one is micro- on the planarization layer 2 above each inorganic light-emitting diode ILED
Mirror unit 5, and each lenticule unit 5 projection on the substrate 10 is completely covered inorganic light-emitting diode ILED on the substrate 10
Projection.
Why the light extraction efficiency that lenticule unit 5 is to improve inorganic light-emitting diode ILED is set.
Identical with the first implementation, in each described pixel cell, inorganic light-emitting diode ILED is brilliant with thin film
Body pipe 1 projection on the substrate 10 is least partially overlapped, to realize the design of high-resolution array base palte.
Corresponding for this kind of array base palte, the present embodiment additionally provides the preparation method of this kind of array base palte, such as Figure 10
Shown, the method specifically includes.
Step one, on the substrate 10, on the substrate 10, by transfer printing process, inorganic light-emitting diode ILED is transferred to
Above described substrate 10.At the same time it can also driving chip 6 is transferred to above substrate 10 by transfer printing process.
Wherein, the substrate 10 in the present embodiment can be hard substrate 10 or flexible substrates 10, namely substrate
10 material includes glass, plastics, quartz, any one in silicon chip.If the material of substrate 10 adopts organic plasticss, specifically
Material includes one or more of PET, PC, PMMA, PI.
Step 2, in the substrate 10 completing step one, by patterning processes, form described second electrode line 4, described the
Two electrode wires 4 are connected with second pole of described inorganic light-emitting diode ILED.
Step 3, in the substrate 10 completing step 2, coating formed planarization layer 2.
Wherein, the material of planarization layer 2 can include polymethyl methacrylate (PMMA), polyimides (PI), poly- second
Enol (PVA), polyvinylphenol (PVP) etc..
Step 4, in the substrate 10 completing step 3, by figure technique formed include each Rotating fields of thin film transistor (TFT) 1,
Grid line, the figure of data wire.
Thin film transistor (TFT) 1 can with polycrystalline SiTFT 1, amorphous silicon film transistor 1, monocrystalline silicon thin film transistor 1,
Any one in oxide thin film transistor 1, thin film transistor (TFT) 1 OTFT 1.When oxygen selected by thin film transistor (TFT) 1
During compound thin film transistor (TFT) 1, the material of active layer can choose phthalocyanine-like compound, oligo-thiophenes, fullerene etc..
It is that as a example bottom gate thin film transistor 1, this step is specially by the thin film transistor (TFT) 1 formed in this step:Grid
Pole/grid line → gate insulator → active layer → source/drain/data wire.
Step 5, in the substrate 10 completing step 3, by etching technics, in described planarization layer 2 and inorganic light-emitting
The extremely corresponding position of diode ILED first forms and connects via.
Step 5, pass through patterning processes, formed first electrode line 3;Wherein, described first electrode is by described connection via
Described thin film transistor (TFT) 1 is drained and is connected with first pole of described inorganic light-emitting diode ILED.
So far complete the preparation of array base palte.
Certainly, can also include step 7 and eight on the basis of above-mentioned steps, step 7, complete the substrate of step 6
On 10, coating forms passivation layer.The step of step 8, the over the passivation layer multiple lenticule units 5 of square one-tenth;Described lenticule list
Unit 5 is corresponding with the position of described inorganic light-emitting diode ILED, the light extraction efficiency to improve inorganic light-emitting diode ILED.
Embodiment 2:
The present embodiment provides a kind of display device, and it includes the array base palte in embodiment 1.Therefore, this display device tool
Have the advantages that high-resolution, flexible & be transparent, high brightness, high-contrast, frivolous, low-power consumption, high colour gamut.
Wherein, display device can be liquid crystal indicator or el display device, such as liquid crystal panel, electronics
Paper, oled panel, mobile phone, panel computer, television set, display, notebook computer, DPF, navigator etc. are any to be had
The product of display function or part.
It is understood that embodiment of above be merely to illustrate that principle of the present utility model and adopt exemplary
Embodiment, but this utility model is not limited thereto.For those skilled in the art, without departing from this
In the case of the spirit of utility model and essence, various modifications and improvement can be made, these modifications and improvement are also considered as this reality
With new protection domain.
Claims (11)
1. a kind of array base palte, it is characterised in that including substrate, is arranged on described suprabasil multiple pixel cells;Each institute
State pixel cell all to include:Thin film transistor (TFT) and inorganic light-emitting diode;Wherein, the drain electrode of described thin film transistor (TFT) passes through first
Electrode wires are connected with the first pole of described inorganic light-emitting diode, the second pole of described inorganic light-emitting diode and second electrode line
Connect.
2. array base palte according to claim 1 is it is characterised in that described array base palte also includes planarization layer;Described
Thin film transistor (TFT), described planarization layer, described inorganic light-emitting diode are successively set on above described substrate;In described planarization
Layer is provided with connection via with the corresponding position of described thin film transistor (TFT) drain electrode, and described first electrode line is by described connection via
The drain electrode of described thin film transistor (TFT) is connected with the first pole of described inorganic light-emitting diode.
3. array base palte according to claim 1 is it is characterised in that described array base palte also includes planarization layer;Described
Inorganic light-emitting diode, described planarization layer, described thin film transistor (TFT) are successively set on above described substrate;In described planarization
Layer position extremely corresponding with described inorganic light-emitting diode first is provided with connection via, and described first electrode line passes through described company
Take over hole to be connected the drain electrode of described thin film transistor (TFT) with the first pole of described inorganic light-emitting diode.
4. array base palte according to claim 1 is it is characterised in that in each described pixel cell, described inorganic
Optical diode is least partially overlapped in suprabasil projection with described thin film transistor (TFT).
5. array base palte according to claim 1 is it is characterised in that described array base palte also includes multiple driving chip;
Described driving chip, for being the grid line on described array base palte and/or data wire offer signal.
6. array base palte according to claim 1 is it is characterised in that described array base palte also includes being arranged on its exiting surface
Multiple lenticule units of side;Described lenticule unit is corresponding with the position of described inorganic light-emitting diode.
7. array base palte according to claim 6 is it is characterised in that the projection on the substrate of described lenticule unit
Cover the projection on the substrate of described inorganic light-emitting diode.
8. array base palte according to claim 1 is it is characterised in that multiple described pixel cell is arranged in arrays;Wherein,
It is located at the second electrode line connection same signal input line that the second pole of the described inorganic light-emitting diode with a line is connected.
9. array base palte according to claim 1 is it is characterised in that the material of described substrate includes glass, plastics, stone
Any one in English, silicon chip.
10. array base palte according to claim 1 is it is characterised in that described thin film transistor (TFT) includes polysilicon membrane crystalline substance
Body pipe, amorphous silicon film transistor, monocrystalline silicon thin film transistor, oxide thin film transistor, thin film transistor (TFT) polycrystalline organic thin film
Any one in body pipe.
A kind of 11. display devices are it is characterised in that include the array base palte any one of claim 1-10.
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CN106206611A (en) * | 2016-08-19 | 2016-12-07 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
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