CN205829835U - Image processing system for displacement transducer - Google Patents

Abstract

The utility model discloses a kind of image processing system for displacement transducer, wherein, this system includes that linear array sensitive chip, FPGA process chip and memorizer, it is characterised in that linear array sensitive chip processes chip with FPGA and is connected；FPGA processes chip and includes: receiver module, image processing module and storage control module, wherein, receiver module is connected to linear array sensitive chip；Image processing module is connected to receiver module and storage control module；Storage control module is connected to memorizer, and wherein, memorizer includes that FPGA processes internal memory and/or the external memorizer of FPGA process chip of chip.The utility model proposes and realized scan picture by FPGA completely, it is to avoid use the equipment of large volume, it is simple to install and use, reducing the complexity of system, cost, energy consumption and hsrdware requirements, it is ensured that real-time.

Description

Image processing system for displacement transducer

Technical field

This utility model relates to image acquisition and processing technology field, and especially, relates to a kind of for displacement sensing The image processing system of device.

Background technology

Optical pickocff is based on the instrument that optical principle measures, and this kind of sensor has many advantages, for instance, it is possible to Realize noncontact and non-destroyed measurement, measurement are little affected by interference, are capable of high-speed transfer and can remote measurement, remote control etc..

Optical pickocff includes a lot of type, and wherein, non-contact laser triangular displacement sensor is that one utilizes laser For light source, by CMOS (Complementary Metal Oxide Semiconductor, complementary metal oxide semiconductors (CMOS)) or Person CCD (Charge-coupled Device, charge coupled cell) sensor is as the fine measuring instrument of receptor.This The changes such as the position of testee, displacement can the most accurately be measured by sensor, and can be applied to The measurement of the geometric senses such as the detection displacement of object, thickness, vibration, distance, diameter.

In the work process of non-contact laser triangular displacement sensor, for receiving the direct shadow of processing method of image Ring the characteristics such as the precision of displacement transducer, stability.

At present, most of image processing systems and method targeted be all face battle array CMOS or ccd sensor, mainly adopt Image processing method be all to carry out, for two dimensional image, the method that processes, these image processing methods primarily focus on more Complicated graphical analysis, its image data amount processed is relatively big, and algorithm flow is the most more complicated.Therefore, these image processing methods Method is not particularly suited for the process of linear array images, it is impossible to meet the optical pickocffs such as non-contact laser triangular displacement sensor for The high request of certainty of measurement.

Moreover, it is required for entering by means of the host computers such as PC end or other processors due to most of image processing systems Row image procossing, so equipment volume can be caused huge, and can not meet the requirement of high rate bioreactor.

Such as, it is " CN204131605U " at entitled " a kind of industrial intelligent camera based on FPGA ", Authorization Notice No. Utility model patent in, disclose a kind of industrial camera system based on FPGA.Technical scheme disclosed in this patent is to pass through Field programmable gate array (Field Programmable GateArray, referred to as FPGA) complete signals collecting control and Image procossing, is sent an image to host computer by FPGA afterwards and proceeds to process.Technical scheme institute pin disclosed in this patent To be face battle array industrial camera, its image processing method can not process line-scan digital camera acquired image well, such as, This image processing method is undesirable to line array sensor image light dot center extraction effect, i.e. contours extract and central point meter Calculate precision the highest.It addition, technical scheme disclosed in this patent when image procossing required by system bulk relatively big, not only It is not convenient to use, and the poor real of image procossing.

For the problem in correlation technique, effective solution is the most not yet proposed.

Utility model content

For the problem in correlation technique, the utility model proposes a kind of image processing system for displacement transducer, On the premise of not using bulky equipment, displacement detecting can be completed in FPGA this locality, process real-time high, and this practicality The scheme of novel proposition is specifically designed for linear array sensing chip acquired image and determines shift value, it is possible to meet displacement transducer pair High request in precision.

To achieve these goals, this utility model provides a kind of image processing system for displacement transducer.

Linear array sensitive chip, FPGA process is included according to the image processing system for displacement transducer of the present utility model Chip and memorizer.Wherein, linear array sensitive chip is connected with FPGA process chip；FPGA processes chip and includes: receive mould Block, image processing module and storage control module, wherein, receiver module is connected to linear array sensitive chip；Image processing module It is connected to receiver module and storage control module；Storage control module is connected to memorizer, and wherein, memorizer includes described FPGA Process internal memory and/or the external memorizer of FPGA process chip of chip.

Wherein, image processing module includes that low-pass filtering submodule and displacement determine submodule, wherein, and low-pass filtering submodule Block is connected to receiver module, and displacement determines that submodule is connected to low-pass filtering submodule.

May further include additionally, above-mentioned FPGA processes chip:

Linear array chip control module, is connected to linear array sensitive chip, or is further attached to receiver module.

Additionally, farther include according to image processing system of the present utility model:

Transport module, is connected to image processing module, or is further attached to memorizer.

Alternatively, transport module is provided with the output interface for connecting external equipment, this output interface include with down to One of few: USB interface, Ethernet interface, RS232 interface, RS485 interface, Industrial Ethernet Control automatic technology interface.

Alternatively, above-mentioned FPGA processes chip and may further include display screen.

It is directly connected to additionally, linear array sensitive chip can process chip with FPGA.

Alternatively, above-mentioned linear array sensitive chip can be linear array CMOS chip or line array CCD chip.

Alternatively, linear array sensitive chip and FPGA process and can pass through universal input/output interface connection between chip.

Alternatively, memorizer can be DDR3 memorizer.

This utility model is capable of following beneficial effect:

(1) the utility model proposes and FPGA is processed chip be connected with linear array sensing chip, and local for line at FPGA The picture signal of battle array sensing chip collection carries out process and obtains shift value (that is, completing displacement sensing), it is possible to make full use of The parallel high-speed disposal ability of fpga chip, is realized scan picture by FPGA completely, it is to avoid use large volume system (as The host computers such as PC end) or other are for carrying out the equipment (such as digital signal processor (DSP) etc.) of image procossing, are not only convenient for peace Dress and use, allow cost and the energy consumption that system is more succinct, reduce system, and eliminate signal at FPGA and host computer or Transmission between the equipment such as DSP, has been effectively ensured the real-time processed (such as, if should by the system that the utility model proposes In commercial production, the process of this high real-time contributes to allowing the fault occurred in commercial production be investigated in time)；

(2) this utility model for picture signal use low-pass filtering denoising scheme, it is possible to due to laser light scattering strong Degree causes more by force figure sector-meeting produced by linear sensing chip (such as CMOS chip) to form saturation distortion characteristic (that is, single-point laser Being deteriorated by Gaussian waveform in cmos imaging is umbilicate bimodal waveform, and the medium filtering of routine, gaussian filtering, average The saturated wave distortion of cmos sensor was lost efficacy by filtering image processing method) in the case of, effectively eliminate high-frequency noise and The saturated wave distortion of cmos sensor, thus significantly reduce noise so that original image contour smoothing, in order to correctly determine and Extract profile center position, contribute to obtaining more accurate relative displacement, be more suitable for linear array sensitive chip is adopted The picture signal of collection processes；

(3) this utility model uses linear array chip control module to be controlled linear array sensitive chip, it is possible to linear array sense The various operations of optical chip are controlled, and can also contribute to being optimized the exposure of linear array sensitive chip simultaneously, to improve Displacement sensing precision；

(4) this utility model is by using transport module, it is possible to by original image signal and/or obtain through image procossing Relative displacement is transferred to other equipment, and other equipment contributing to conveying FPGA process chip connection also are able to obtain displacement inspection The relative displacement surveyed and the picture signal collected, contribute to the detection object to whole displacement transducer and displacement sensing The duty of device own is monitored and malfunction elimination so that manage convenient, saves manpower and time cost；

(5) display screen on chip is processed by means of FPGA, it is possible to directly display what image procossing obtained in FPGA this locality Or temporary shift value so that operator can intuitively, easily know the real time data of displacement sensing；

(6) by using DDR3 memorizer to coordinate FPGA to process chip, to store shift value that image procossing obtains or to enter One step storage picture signal, it is possible to shorten the time of data access, improve the work efficiency of displacement transducer, additionally aid para-position Move sensed events to be monitored in real time, carry out malfunction elimination in time；

(7) this utility model is directly connected to linear array sensitive chip by FPGA processes chip, it is possible to make linear array photosensitive Chip directly processes chip transmission FPGA to FPGA and is caned the signal directly processed, thus save step that signal changes and The equipment such as image pick-up card, contribute to reducing equipment volume further, improving treatment effeciency.

Accompanying drawing explanation

In order to be illustrated more clearly that this utility model embodiment or technical scheme of the prior art, below will be to embodiment The accompanying drawing used required in is briefly described, it should be apparent that, the accompanying drawing in describing below is the most of the present utility model Some embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to according to this A little accompanying drawings obtain other accompanying drawing.

Fig. 1 is the brief configuration frame of the image processing system for displacement transducer according to this utility model embodiment Figure；

Fig. 2 is the structural frames of the image processing system for displacement transducer according to one embodiment of this utility model Figure；

Fig. 3 is the structural frames of the image processing system for displacement transducer according to another embodiment of this utility model Figure.

Detailed description of the invention

Hereinafter in connection with accompanying drawing, one exemplary embodiment of the present utility model is described.Rise for clarity and conciseness See, the most do not describe all features of actual embodiment.It should be understood, however, that developing any this reality Must make during embodiment much specific to the decision of embodiment, in order to realize the objectives of developer, example As, meet those restrictive conditions relevant to system and business, and these restrictive conditions may along with embodiment not Change together.Additionally, it also should be appreciated that, although development is likely to be extremely complex and time-consuming, but to having benefited from For those skilled in the art of present disclosure, this development is only routine task.

Here, also need to explanation a bit, in order to avoid having obscured this utility model because of unnecessary details, attached Figure illustrate only and according to the closely-related apparatus structure of scheme of the present utility model and/or process step, and eliminate Other details little with this utility model relation.

According to embodiment of the present utility model, it is provided that a kind of image processing system for displacement transducer.

As it is shown in figure 1, mainly include according to the image processing system for displacement transducer of this utility model embodiment Linear array sensitive chip 1 and the FPGA being directly connected to therewith process chip 2 (can also be referred to as FPGA processing system etc.).Linear array Outside laser signal can be converted into picture signal and be transferred to FPGA process chip by sensitive chip 1.FPGA processes chip and is used for Determine relative displacement, i.e. the function realizing displacement sensing (has only to realize displacement sensing in FPGA this locality, it is not necessary to borrow Help host computer or other image processing equipments).Compared to the DSP+FPGA hardware structure generally used in conventional art or ARM + FPGA hardware framework, the hardware structure of this utility model embodiment is more succinct, easily facilitates deployment, cost and energy consumption relatively low.

In one embodiment, linear array sensitive chip 1 can be linear array CMOS chip.In one embodiment, linear array sense Optical chip 1 can be line array CCD chip.Alternatively, linear array sensitive chip 1 and FPGA processes and can be directly connected between chip 2 (embodiment as shown in Figure 1), or can also be indirectly connected with via other equipment between the two.If linear array sensitive chip 1 Process chip 2 with FPGA to be directly connected to, then picture signal can directly be processed by battle array sensitive chip with FPGA process chip Form or type export and process chip to FPGA, contribute to reducing equipment volume reduce cost.Alternatively, the photosensitive core of linear array Sheet 1 and FPGA is processed and is connected by universal input/output interface (general purpose I/O Interface) between chip 2, or, the photosensitive core of linear array Sheet 1 and FPGA is processed and can also be connected by other interfaces between chip 2.

As in figure 2 it is shown, according to the image processing system for displacement transducer of this utility model embodiment except linear array Sensitive chip 1 and FPGA processes outside chip 2, it is also possible to include memorizer 3 (in the embodiment shown in Figure 2, this memorizer 3 The external memorizer of chip 2 is processed) for FPGA.Wherein, in the embodiment shown in Figure 2, FPGA process chip 2 includes receiving mould Block 21 (could be for circuit or the chip of image signal transmission), image processing module (could be for the electricity of image procossing Road or chip) 22 and storage control module (for example, it may be storage control) 23, receiver module 21 is connected to linear array sense Optical chip 1, image processing module 22 is connected to receiver module 21, and storage control module 23 is connected to memorizer 3 and image procossing Module 22 (or, other connection can be used between image processing module 22 and storage control module 23 and memorizer 3 to close System, as long as can allow storage control module 23 be controlled data storage and the reading of memorizer 3).Wherein, at image Reason module 22, for being filtered the picture signal from linear array sensitive chip 1, determines figure based on filtered picture signal As the center position of profile, and determine that relative displacement is (for example, it is possible to will determine according to the center position of image outline To center position compare with reference position, will both difference as relative displacement).Storage control module 23 is used for Memorizer 3 is controlled, to realize storage and the reading of picture signal and/or relative displacement.

In one embodiment, above-mentioned memorizer 3 can be DDR3 memorizer.In one embodiment, DDR3 memorizer The hardware language complete call in chip 2 can be processed by FPGA.By using DDR3 memorizer to process chip phase with FPGA Coordinate, it is possible to shorten the time of data access in displacement transducer work process, improve the work efficiency of displacement transducer, also have Help the situation of displacement sensing outcome is monitored in real time, carry out malfunction elimination in time.

In the embodiment shown in fig. 2, FPGA process chip 2 is connected with external memorizer.In another embodiment, FPGA process chip processes the shift value obtained and/or picture signal can directly display without storage or be transferred to other Equipment, now, image processing system can not include memorizer, correspondingly can not also include storage control module.

In another embodiment, the internal memory that image processing system can also utilize FPGA process chip to carry is deposited Storage shift value and/or picture signal, and do not use external memorizer.In the case of the space of internal memory is occupied full, lose Abandon the data being stored in internal memory the earliest.This makes it possible to store in internal memory certain data volume shift value and/ Or picture signal, cost can also be reduced to a certain extent simultaneously.

In another embodiment, the image processing system for displacement transducer can also both use FPGA to process chip Internal memory, is also adopted by FPGA simultaneously and processes the external memorizer of chip.

Fig. 3 is the block diagram of the image processing system for displacement transducer according to another embodiment of this utility model.As Shown in Fig. 3, in an embodiment of the present utility model, image processing module 22 includes that low-pass filtering submodule 221 (can be Low-pass filter circuit) and displacement determine submodule 222 (can be that shift value determines circuit or chip), low-pass filtering submodule 221 are connected to receiver module 21, for the picture signal received from linear array sensitive chip 1 by receiver module 21 is carried out low pass filtered Ripple；Displacement determines that submodule 222 is connected to low-pass filtering submodule 221, for determining image outline based on filtered signal Center position, and thereby determine that relative displacement.

Wherein, in the conventional technology, when the sent light of light source (such as, laser) scattering strength is stronger, linear sensing core Produced by sheet (such as CMOS chip) figure sector-meeting formed saturation distortion characteristic, i.e. single-point laser in cmos imaging by high bass wave Shape deteriorates as umbilicate bimodal waveform.But, the medium filtering that used under normal circumstances, gaussian filtering, mean filter Deng image processing method, the saturated wave distortion of cmos sensor was lost efficacy, it is impossible to enough successfully manage, so can cause follow-up Image procossing and displacement determine that result exists the biggest error.And above-described embodiment of the present utility model is by using low-pass filtering Submodule 221, it is possible in the case of picture forms saturation distortion characteristic, effectively eliminate high-frequency noise in the way of low-pass filtering Wave distortion saturated with cmos sensor, thus significantly reduce the noise in picture signal, contribute to obtaining more accurate phase To shift value, effectively improve the precision of displacement transducer.

Owing to image processing module 22 is connected with storage control module 23, so storage control module 23 can be true by displacement The relative displacement that stator modules 222 obtains after processing recalls to be stored in memorizer 3 (and/or internal memory).No Only such, storage control module 23 can also be by the picture signal from receiver module 21 (before can being wave filter or after filtering Picture signal) determine from displacement and submodule 222 to be transferred out to be stored in memorizer 3 (and/or internal memory).

In one embodiment, displacement determines that submodule 222 is for determining the central point of image outline in the following manner Position: determine the peak point (that is, the maximum of picture signal waveform) of the picture signal after low-pass filtering, determine this peak point bag Include the position of size and the peak point determining peak value；Position according to this peak point selects the multiple of picture signal Put and determine according to the point of peak point and selection the center position of image outline.In the present embodiment it can be understood as displacement Determine that submodule is primarily based on the waveform selection of image peak point and multiple point, and determine image reform according to these points Position, afterwards using the position of this center of gravity as the center position of image outline.In place in the institute according to peak point When putting multiple of selection, selection one or more points can be put using the position of this peak point as center in both sides around (quantity of the point selected from both sides should be identical, such as, all select 2 points from every side)；Afterwards, based on peak point and The point selected, it is possible to use determining that the method (such as, center of gravity calculation formula) of center of gravity determines center of gravity, the center of gravity determined can be made Central point for image outline.

In another embodiment, displacement determines that submodule 222 is for determining the central point of image outline in the following manner Position: determine lower limit according to the peak value of the picture signal after low-pass filtering, specifically, can be pre-configured with lower limit and peak Proportionate relationship between value, when value, determines lower limit according to this proportionate relationship and peak value size, and such as, lower limit is permissible (assuming that peak value is Y, lower limit is 0.7 times of peak value, then lower limit to take the values such as 0.9 times of peak value, 0.7 times or 0.5 times Value is 0.7Y).After determining lower limit, it becomes possible to determine between picture signal lower limit value and higher limit (peak value) All data (by parts of images signal behavior between peak value and lower limit in picture signal out).It follows that based on These picture signals (data) selected, it becomes possible to utilize and determine that the method (such as, center of gravity calculation formula) of center of gravity determines weight The heart, the position of centre of gravity determined can be as the center position of image outline.In a specific embodiment, lower limit and peak value Between proportionate relationship (such as, lower limit takes 0.5 times of peak value, 0.7 times, 0.9 times etc.) can be according to the surface of reflective object Characteristic (for example, it is possible to including the parameter such as reflectance and/or roughness) is adjusted, thus allows the center position of image outline Determine that result is more accurate.

In another embodiment, displacement determines that submodule 222 is for determining the central point of image outline in the following manner Position: carry out curve fitting the waveform of the picture signal after low-pass filtering, obtain curve waveform, thus may determine that curve Peak point position, and then determine that curve determines the center position of image outline.In one embodiment, figure can be intercepted A part of waveform of image signal is used for curve matching, and the part for curve matching should comprise the peak point in picture signal. In one embodiment, after matching obtains curve, can directly by the maximum of points position of this curve (peak point Position) as the center position of image outline.

In other embodiments, the method for above-mentioned three kinds of center position determining image outline can also be applied in combination, Use different methods determine center position difference time, multiple Different Results can be averaged wait operate, finally Determine the center position of image outline.

Determine by means of center of gravity or the mode of curve matching is to determine the central point of image outline, it is possible to allow central point really Determine mode and be effectively applicable to the picture signal that linear array chip gathers so that result meets high-precision requirement, and processes Journey is simply effective, and complexity is relatively low, it is possible to increase the efficiency of process.

In other embodiments, displacement determines that submodule 222 can use additive method to determine the center of image outline Point position.

Additionally, see Fig. 3, in an embodiment of the present utility model, FPGA processes chip 2 and can further include: (such as, linear array chip control module 25 (can be controller or control circuit), be connected to linear array sensitive chip 1 and light source Can be laser instrument, not shown in figure), for determining the table of reflective object according to the picture signal from linear array sensitive chip 1 Face characteristic (for example, it may be determined that reflectance and/or roughness), and according to surface characteristic adjust light source luminous power and/or The time of exposure of linear array sensitive chip 1.So, linear array chip control module 25 can optimize quality of image signals further, from And improve the degree of accuracy of follow-up relative displacement detection further.In one embodiment, linear array chip control module 25 can be with Receiver module 21 connects, and obtains original image signal (picture signal of non-filtered) from receiver module 21；Or, linear array chip Control module 25 directly can obtain picture signal from linear array sensitive chip 1；Or, linear array chip control module 25 can be with figure As processing module 22 connects, and the picture signal after image processing module 22 obtains after filtering.

In one embodiment, linear array chip control module 25 can also perform other various controls to linear array sensitive chip Operation, for example, it is possible to include at least one of: provide register configuration parameter (for example, it is possible to wrap for linear array sensitive chip 1 Include FPGA and process the register address etc. of chip), the clock frequency of linear array sensitive chip 1 is controlled, core photosensitive to linear array Being actuated for of sheet 1 controls, and sends the picture signal of linear array sensitive chip 1 and is controlled.

Additionally, in another embodiment of the present utility model, as it is shown on figure 3, above-mentioned image processing system can also enter one Step includes transport module 26, is connected to image processing module 22.

In one embodiment, transport module 26 can be connected to memorizer 3, for output by storage control module 23 from depositing The picture signal read in reservoir 3 and/or shift value.In another embodiment, transport module 26 can be connected simultaneously to storage Control module 23 and memorizer 3.In FPGA processes the embodiment that chip comprises internal memory, transport module can be with built-in Memorizer connects, to export picture signal and/or the relative displacement of storage in internal memory.

Transport module 26 processes the output interface of chip as FPGA, and such as, it can be used in the external equipment to FPGA Output received from linear array sensitive chip 1 by receiver module 21 picture signal (can be after filtering or without filtering letter Number, two kinds of picture signals all can also be exported according to controlling) and/or determined (or from external storage by image processing module 22 In device 3, internal memory read) relative displacement.So, contribute to conveying FPGA and process other equipment of chip connection also The real-time results that can obtain displacement detecting and the picture signal collected, contribute to the detection object to whole displacement transducer And the duty of displacement transducer own is monitored and malfunction elimination so that manage convenient, save manpower and time Between cost.

Alternatively, transport module 26 can be provided with the output interface for connecting external equipment, and this output interface includes At least one of: USB interface (for example, it may be USB3.0 interface, it is also possible to be USB2.0 interface), Ethernet interface (example As, can be gigabit ethernet interface), RS232 interface, RS485 interface, Industrial Ethernet Control automatic technology (Ethercat) interface.

Additionally, in one embodiment, above-mentioned FPGA processes chip 2 and may further include display screen (not shown), aobvious Display screen is used for showing relative displacement, can be connected with image processing module 22, to directly display by image processing module 22 The relative displacement that reason obtains.In another embodiment, display screen can be connected to memorizer 3 (and/or internal memory), from And show the relative displacement that storage control module 23 reads from memorizer 3 (and/or internal memory).In another embodiment In, display screen can be connected simultaneously to image processing module 22, memorizer 3 and internal memory, thus can either show figure As processing module 22 processes the relative displacement obtained, it is also possible to display is stored in the phase in memorizer 3 and internal memory To shift value.So, it becomes possible to directly display that image procossing obtains or temporary shift value in FPGA this locality so that operator Member can intuitively, easily know the data of displacement sensing.

Additionally, in the above-mentioned multiple embodiments of this utility model, the image that receiver module 21 receives from linear array sensitive chip 1 Signal is Transistor-Transistor Logic level signal or CMOS level signal, thus eliminates the letters such as step and the image pick-up card of signal conversion Number conversion equipment, contributes to reducing equipment volume further, improving treatment effeciency.

In sum, the image processing system described in above multiple embodiment is by image acquisition, transmission and image Reason is fully integrated in one piece of fpga chip so that system overall volume reduces, lower power consumption, makes full use of fpga chip also Row high speed processing ability, is realized real time image processing by FPGA completely, effectively overcomes the most conventional two dimensional image and processes Method is not suitable for the problem of linear array sensing chip, and performance is highly stable.The scheme that the utility model proposes is applicable to respectively Plant displacement transducer, volume, precision, system speed, stability etc. required to meet corresponding demand in higher scene, Such as, non-contact laser triangular displacement sensor it is highly suitable for.

The foregoing is only preferred embodiment of the present utility model, not in order to limit this utility model, all at this Within the spirit of utility model and principle, any modification, equivalent substitution and improvement etc. made, should be included in this utility model Protection domain within.

Claims (10)

1., for an image processing system for displacement transducer, process chip and storage including linear array sensitive chip, FPGA Device, it is characterised in that described linear array sensitive chip processes chip with described FPGA and is connected；

Described FPGA processes chip and includes: receiver module, image processing module and storage control module, wherein, and described reception Module is connected to described linear array sensitive chip；Described image processing module is connected to described receiver module and described storage controls mould Block；Described storage control module is connected to described memorizer, and wherein, described memorizer includes that described FPGA processes the built-in of chip Memorizer and/or described FPGA process the external memorizer of chip.

Image processing system the most according to claim 1, it is characterised in that described image processing module includes low-pass filtering Submodule and displacement determine submodule, and wherein, described low-pass filtering submodule is connected to described receiver module, and described displacement determines Submodule is connected to described low-pass filtering submodule.

Image processing system the most according to claim 1, it is characterised in that described FPGA processes chip and farther includes:

Linear array chip control module, is connected to described linear array sensitive chip, or is further attached to described receiver module.

Image processing system the most according to any one of claim 1 to 3, it is characterised in that farther include:

Transport module, is connected to described image processing module, or is further attached to described memorizer.

Image processing system the most according to claim 4, it is characterised in that described transport module is provided with outside connecting The output interface of portion's equipment, this output interface includes at least one of: USB interface, Ethernet interface, RS232 interface, RS485 interface, Industrial Ethernet Control automatic technology interface.

Image processing system the most according to any one of claim 1 to 3, it is characterised in that described FPGA processes chip Farther include display screen.

Image processing system the most according to any one of claim 1 to 3, it is characterised in that described linear array sensitive chip Process chip with described FPGA to be directly connected to.

Image processing system the most according to any one of claim 1 to 3, it is characterised in that described linear array sensitive chip For linear array CMOS chip or line array CCD chip.

Image processing system the most according to any one of claim 1 to 3, it is characterised in that described linear array sensitive chip With described FPGA is processed and is connected by universal input/output interface between chip.

Image processing system the most according to any one of claim 1 to 3, it is characterised in that described external memorizer is DDR3 memorizer.