CN205810819U - The metal-oxide-semiconductor of suppression active channel district induced leakage current generation and active-addressed circuit - Google Patents
The metal-oxide-semiconductor of suppression active channel district induced leakage current generation and active-addressed circuit Download PDFInfo
- Publication number
- CN205810819U CN205810819U CN201620304944.2U CN201620304944U CN205810819U CN 205810819 U CN205810819 U CN 205810819U CN 201620304944 U CN201620304944 U CN 201620304944U CN 205810819 U CN205810819 U CN 205810819U
- Authority
- CN
- China
- Prior art keywords
- metal
- oxide
- source electrode
- drain electrode
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 230000001629 suppression Effects 0.000 title claims description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 238000007789 sealing Methods 0.000 claims abstract description 13
- 230000008021 deposition Effects 0.000 claims abstract description 11
- 238000009413 insulation Methods 0.000 claims abstract description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 7
- 229920005591 polysilicon Polymers 0.000 claims abstract description 7
- 238000002955 isolation Methods 0.000 claims abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 229910052681 coesite Inorganic materials 0.000 claims description 4
- 229910052906 cristobalite Inorganic materials 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 229910052682 stishovite Inorganic materials 0.000 claims description 4
- 229910052905 tridymite Inorganic materials 0.000 claims description 4
- 230000003628 erosive effect Effects 0.000 claims description 2
- 229910004140 HfO Inorganic materials 0.000 claims 1
- 229910004205 SiNX Inorganic materials 0.000 claims 1
- GEIAQOFPUVMAGM-UHFFFAOYSA-N ZrO Inorganic materials [Zr]=O GEIAQOFPUVMAGM-UHFFFAOYSA-N 0.000 claims 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims 1
- 229910052593 corundum Inorganic materials 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 150000004767 nitrides Chemical class 0.000 claims 1
- 239000010453 quartz Substances 0.000 claims 1
- 229910001845 yogo sapphire Inorganic materials 0.000 claims 1
- 230000004044 response Effects 0.000 abstract description 4
- 238000005253 cladding Methods 0.000 description 14
- 238000005286 illumination Methods 0.000 description 13
- 230000000694 effects Effects 0.000 description 8
- 239000011159 matrix material Substances 0.000 description 8
- 238000013461 design Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000012546 transfer Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 230000005764 inhibitory process Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000011435 rock Substances 0.000 description 2
- 206010000234 Abortion spontaneous Diseases 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 208000015994 miscarriage Diseases 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 208000000995 spontaneous abortion Diseases 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Landscapes
- Thin Film Transistor (AREA)
Abstract
This utility model discloses a kind of metal-oxide-semiconductor suppressing active channel district induced leakage current to produce and active-addressed circuit, this MOS includes substrate, the middle part deposition of substrate top surface has gate insulation layer, gate insulation layer there are polysilicon or metal form grid, the source electrode formed at substrate two ends by ion implanting and drain electrode, at grid, source electrode has sealing coat with drain electrode disposed thereon, sealing coat above source electrode and drain electrode is etched with the contact hole for drawing source electrode and drain electrode, on the contact hole of source electrode and drain electrode, deposition has metal, metal etch in drain electrode has the isolation breach for isolating source electrode and drain electrode, metal on source electrode directly extended over active channel district.The metal-oxide-semiconductor that the utility model proposes effectively has blocked light, it is suppressed that the generation of induced leakage current, had both improved the pass step response of transistor, and had also improved the service behaviour of active-addressed drive circuit.
Description
Technical field
This utility model relates to field of optoelectronic devices, suppresses the photic electric leakage in active channel district more particularly, to one
The metal-oxide-semiconductor of miscarriage life and active-addressed circuit.
Background technology
Addressable drive circuit has been applied to all many-sides the most.On addressing mechanism, it is generally divided into two kinds, the most active square
Battle array and passive matrix.Compared to passive matrix, active matrix has more preferable controllability, can reduce crosstalk, can realize extensive
And high-resolution display.And also capacity usage ratio is high, it can be the high-quality display advantage that realizes more gray scale.Active
Matrix shows many decades is had been developed at present, and existing many application, such as active matrix liquid crystal show, active matrix has
Machine diode displaying, and the active matrix light-emitting diode the most developed shows.
Active driving circuit has many kinds, and wherein conventional 2T1C drive circuit is as it is shown in figure 1, include addressing transistor
T1, drives transistor T2 and a storage electric capacity.Vselect signal is used for controlling to gate T1 transistor, when T1 transistor is opened,
Vdata signal is transferred to the grid of T2 transistor, controls gating T2 pipe.When T2 pipe is opened, LED anode is i.e. connected with VDD,
It is thus possible to normally work, i.e. luminous.When selecting signal through later, T1 transistor is closed, but also needs to LED and continue luminescence, this
Time storage electric capacity be just used for keeping the current potential of A point, to ensure within a whole frame period, enough electric currents can be had to flow through LED.
But in the presence of have ambient light, especially when this circuit is applied to inherently having the high luminous intensity LED display of comparison,
Light will excite extra electron hole pair in metal-oxide-semiconductor active channel district, when causing metal-oxide-semiconductor to be closed, still exists a certain amount of
Reverse leakage current.When this leakage current is bigger, the ability of storage electric capacity holding current potential will be had a strong impact on, thus reduce corresponding
The fluorescent lifetime of LED and luminous mass.In like manner, the OFF leakage current of T2 pipe also will bring the unfavorable effect outside expection.These
All the LED, LCD and the OLED that reduce circuit based on this kind of active matrix driving are shown, or the application quality of optical communication equipment and effect
Really.
Summary of the invention
This utility model is anti-when causing metal-oxide-semiconductor OFF state of the photoelectric current overcoming the illumination described in above-mentioned prior art to excite
The phenomenon increased to leakage current, first provides a kind of metal-oxide-semiconductor suppressing active channel district induced leakage current to produce.
This utility model also proposes the active-addressed of the metal-oxide-semiconductor of a kind of application suppression active channel district induced leakage current generation
Circuit.
For solving above-mentioned technical problem, the technical solution of the utility model is as follows:
A kind of metal-oxide-semiconductor suppressing active channel district induced leakage current to produce, including substrate, the middle part deposition of substrate top surface
There is gate insulation layer, gate insulation layer has polysilicon or metal form grid, the source formed at substrate two ends by ion implanting
Pole and drain electrode, have the sealing coat above sealing coat, source electrode and drain electrode to be etched with for drawing at grid, source electrode with drain electrode disposed thereon
Going out the contact hole of source electrode and drain electrode, in the contact hole on source electrode and drain electrode, deposition has metal, and in drain electrode, in contact hole, metal is carved
Erosion has the isolation breach for isolating source electrode and drain electrode, and the metal on source electrode directly extended over active channel district.
Preferably, described substrate is silicon substrate.
Preferably, described two sealing coats are SiO2Sealing coat.
A kind of active-addressed circuit of the metal-oxide-semiconductor applying described suppression active channel district induced leakage current to produce, described in have
MOS in the addressing circuit of source is the metal-oxide-semiconductor that suppression active channel district induced leakage current produces.
Compared with prior art, technical solutions of the utility model provide the benefit that: the metal-oxide-semiconductor that the utility model proposes has
Imitate has blocked light, it is suppressed that the generation of photoelectric current, had both improved the pass step response of transistor, and had also improved active-addressed driving
The service behaviour on galvanic electricity road.
Accompanying drawing explanation
Fig. 1 is 2T1C active driving circuit schematic diagram.
Fig. 2 is to the comparison diagram of transfer characteristic curve under transistor different condition.
Fig. 3 is the schematic cross-section of conventional MOS pipe.
Fig. 4 is the tomograph of metal-oxide-semiconductor described in the utility model.
Fig. 5 is the planar structure schematic diagram of metal-oxide-semiconductor described in the utility model.
Fig. 6 is that the emulation basic parameter emulating this utility model metal-oxide-semiconductor arranges schematic diagram.
Fig. 7 is transfer characteristic curve figure based on PMOS of the present utility model.
Fig. 8 is the PCB domain of the active-addressed circuit automatically eliminating induced leakage current.
Fig. 9 is storage capacitor charge and discharge comparison diagram in embodiment active driving circuit.
Figure 10 is the PCB domain that the metal-oxide-semiconductor of four groups of difference X length and finger gate number is carried out.
Figure 11 is the contrast schematic diagram of transfer characteristic curve based on Figure 10.
In figure: 1-grid, 2-source electrode, 3-drain, 4-aluminum, 5-polysilicon, 6-SiO2,7-metal cladding, 8-substrate.
Detailed description of the invention
Accompanying drawing being merely cited for property explanation, it is impossible to be interpreted as the restriction to this patent;In order to the present embodiment is more preferably described, attached
Scheme some parts to have omission, zoom in or out, do not represent the size of actual product;
To those skilled in the art, in accompanying drawing, some known features and explanation thereof may be omitted is to be appreciated that
's.With embodiment, the technical solution of the utility model is described further below in conjunction with the accompanying drawings.
The photoelectric current excited for the illumination mentioned in prior art causes reverse leakage current during metal-oxide-semiconductor OFF state to increase
Phenomenon, the utility model proposes and extend out certain length metal from metal-oxide-semiconductor source electrode, covers on metal-oxide-semiconductor active channel district, from
And play the effect avoiding light direct projection raceway groove.
Light has effectively been blocked in this kind of design, it is suppressed that the generation of photoelectric current, has both improved the pass step response of transistor,
Also improve the service behaviour of active-addressed drive circuit.And metal cladding is the longest, inhibition is the best, but but can reduce
The channel width-over-length ratio of device, thus characteristic when reducing device ON state.So should make between cover layer and channel width-over-length ratio
Suitably accept or reject, thus reach optimized design.
Finding through substantial amounts of experiment and research, light is presented a note to affects MOS transistor performance:
Light note inspires extra electron hole pair in MOS transistor active channel district, so that transistor is being closed
During state, there is also bigger reverse leakage current.We demonstrate this idea by software emulation.
We test under no light condition respectively, and blue light, HONGGUANG, and when green glow irradiates, channel length is the PMOS of 2um
The I of transistords.Illumination power is 1w, and arranges VdsFor-1V, grid voltage is progressively increased to 5V by-5V, and threshold voltage is-
0.5V, is i.e. closed mode when it is more than-0.5V.
Fig. 2 is then to the contrast of transfer characteristic curve under transistor different condition, it can thus be seen that metal-oxide-semiconductor is at illumination condition
The difference of lower performance.Can be clearly seen from figure, have under optical condition the leakage current of OFF state than during no light condition big several quantity
Level, it is seen that illumination is the biggest on the impact of metal-oxide-semiconductor performance.Thus demonstrating our idea, illumination condition really can
Leakage current during MOS transistor closed mode there is tremendous influence.
Based on above-mentioned discovery, this utility model devises one can block illumination, suppression active channel district induced leakage current
The Novel MOS tube structure produced.
Conventional MOS pipe is to utilize doping process to generate source electrode and drain electrode at silicon substrate two ends, and by deposition metal and
These the two poles of the earth are drawn by suitable etching.Afterwards, on active channel district, deposit gate oxide, then by polysilicon deposition shape on it
Become grid.Sectional view is as shown in Figure 3.
And the new structure that this utility model is proposed and traditional main distinction are that the metal part of source electrode is extended one
Measured length, covers on active channel district, thus avoid active channel district be directly exposed under illumination to produce unnecessary
Photoelectric current.A kind of metal-oxide-semiconductor suppressing active channel district induced leakage current to produce that the utility model proposes, specifically includes substrate,
The middle part deposition of substrate top surface has gate insulation layer, has polysilicon or metal to form grid, noted by ion on gate insulation layer
Enter the source electrode and drain electrode formed at substrate two ends, have above sealing coat, source electrode and drain electrode with drain electrode disposed thereon at grid, source electrode
Sealing coat be etched with the contact hole for drawing source electrode and drain electrode, source electrode and drain electrode on contact hole in deposition have metal,
In drain electrode, in contact hole, metal etch has the isolation breach for isolating source electrode and drain electrode, and the metal on source electrode directly extends over
Cross active channel district.Specific practice is as follows:
A kind of metal-oxide-semiconductor preparation method suppressing active channel district induced leakage current to produce, its preparation process is: pass through ion
It is infused in substrate two ends and forms source electrode and drain electrode, prepare gate oxide at the middle part of substrate top surface, gate oxide deposits
Polysilicon or metal form grid, at grid, source electrode and drain electrode disposed thereon sealing coat, and etch above source electrode and drain electrode
Contact hole, to draw source electrode and drain electrode, the contact hole above source electrode and drain electrode deposits metal, and the metal in etching drain electrode is used
In keeping apart source electrode and drain electrode, and the metal on source electrode directly extended over active channel district, played the effect shut out the light.
Such structure both will not add other excess stock and cause cannot other performance changes intended, also can reach
Good shaded effect, and simple and easy to do, it is simple to realize.Specifically three-dimensional, plane structure chart are as shown in Figure 4,5, wherein arrow table
Show that direction of illumination, X represent the length of metal cladding.
For proving the effectiveness of this this metal-oxide-semiconductor structure, the present embodiment software emulates, the basic parameter of emulation such as figure
Shown in 6.Employing transistor is silicon substrate, the PMOS of phosphorus doping, and by semiconductor technology to its deposition SiO2 layer and metal portion
Point.During emulation, VGSIt is gradually increased to 5V, V from-5VDSBeing set to-1V, and use 1w power, wavelength is that the illumination of 625nm is to this
PMOS transistor carries out illumination.The transfer characteristic curve of this PMOS is as shown in Figure 7.
Wherein, MCF (Metal Cover Factor) is the length ratio with channel length of metal cladding, it may be assumed that
This parameter as a benchmark index having more relative reference, vivider represent cover layer length with
The relation of active channel length.It can be seen from figure 7 that under no light condition, leakage current is 2.5 × 10-13A, has illumination but
In time without metal cladding (MCF=0%), leakage current is about 1 × 10-8A, adds several order of magnitude.And when there being certain length
After metal cladding, the photoelectric current excited under illumination has significantly minimizing, and MCF index is the highest, and photoelectric current inhibition is more
Good.Illustrate that this utility model can effectively eliminate the impact of photoelectric current really, improve transistor performance.
The present embodiment have also been devised a kind of active-addressed circuit that can automatically eliminate induced leakage current.
The present embodiment is to have described tradition 2T1C circuit based on background parts, and T1 is addressing transistor in the circuit,
T2 is for driving transistor, and C is storage electric capacity.Vselect, for selecting signal, controls T1 transistor switch, and Vdata is data letters
Number, carry the signal controlling LED light on and off.In this example, devise one based on the new MOS proposed can automatically disappear
Active-addressed circuit except induced leakage current.Its domain is as shown in Figure 8:
What Fig. 8 was the most succinct shows 2T1C circuit layout.For transistor T2,1. place's elongated area is finger gate, its
2. the place part of lower section is metal cladding.In like manner it is appreciated that the structure of T1 transistor.And in this kind of circuit structure, storage electricity
Hold and be made up of two parts.Part I is to clip SiO between source metal and polysilicon2Passivation layer is constituted.Part II is many
Gate insulator (usually SiO is clipped between crystal silicon and active monocrystalline silicon layer2Or high-g value) constitute.LED pixel connects with defeated
Go out part.
This kind of circuit structure can successfully eliminate photoelectric current impact, and features simple structure easily realizes.We will be by meter below
Calculate and contrast, show that this novel circuit keeps the reinforced effects of current potential ability to electric capacity.
We discuss respectively in terms of two.Write represents T1 transistor and be strobed period, and data signal passes through T1
Arrive the period of T2 grid, at this point for being live part for electric capacity.Retention period represent selection signal passed through,
T1 transistor is closed but is still needed to LED luminescence, and the current potential now kept mainly by electric capacity drives T2 transistor.If there is electric leakage
Stream, then electric capacity will appear as gradually discharging.
Make VDRepresent Vdata.When pixel is selected, write voltage and holding voltage meet:
Wherein, τon=RonCholding τoff=RoffCholding
RonAnd RoffThe channel resistance when on and off respectively for T1 transistor.And normal operation circuit requires:
Wherein, VsignalIt is the voltage of A point.TwritingAnd TholdingIt is time write phase and holding time phase respectively.This
It is meant that write time phase is the shortest, keeping time phase the longest, the effect of this drive circuit is the best.
We record metal cladding and the transistor ON state current Ids difference without metal cladding by experiment
It is: 2.75 × 10-5A and 3.11 × 10-5A, off-state current Ids be then: 3.43 × 10-13A and 6.94 × 10-9A, experiment is used
Total capacitance be 15.6pf.Finally, the storage capacitor charge and discharge before and after this design is applied to contrast as shown in Fig. 9.
As seen from Figure 9, the design of metal cladding is the most little on the impact in charging interval, may cause several us
Delay.But when metal-oxide-semiconductor closed mode, after adding metal cladding, the current potential retention time of storage electric capacity substantially can be made more
Long, i.e. more than 40ms.If without metal cladding, this current potential can only keep several ms, can not reach far away to maintain LED in whole week
The requirement of normal work in phase.Thus illustrating, this design really can store electric capacity in intensifier circuit and keep the ability of current potential, thus
Improve the work quality etc. of circuit.
The utility model proposes Novel MOS tube structure and the circuit structure that can eliminate photoelectric current impact.Owing to metal covers
Cap rock is the longest, and inhibition is the best, but the distance therefore between device drain and grid is the biggest.Especially when the area of domain
Limited, this structure will affect original layout, even will directly affect the breadth length ratio of device and cause under other performances
Fall.So suitably choice should be made between cover layer and channel width-over-length ratio, thus reach optimized design.
Definition source electrode is cover layer length (X section) to the distance of drain electrode fracture, verifies that difference is covered by analyzing emulation
The impact of cap rock length.
This utility model is contrasted by the metal-oxide-semiconductor of the design different X length of many groups and finger gate number, reaches optimum
Changing result, with such as Figure 10, table more than 1 group data instance, finally recording finger gate number is 9, during a length of 5um of metal cladding,
Device performance is best.
Table 1
The contrast of its transfer characteristic curve is as shown in figure 11.
Thus finding out that finger gate number is 9, during a length of 5um of metal cladding, the service behaviour of this structure is best.
Use the transistor of structure shown in this programme, can effectively avoid active channel district to be directly exposed under light,
Eliminate unnecessary photoelectric current.And source addressing circuit structure based on this also can effectively eliminate induced leakage current phenomenon.
Now, MOS transistor will have and preferably close step response, store electric capacity and keep the effect of current potential also can be more preferable in drive circuit, electricity
Road performance is more stable, and LED also will present more preferable work quality.
Obviously, above-described embodiment of the present utility model is only for clearly demonstrating this utility model example, and
It it is not the restriction to embodiment of the present utility model.For those of ordinary skill in the field, in described above
On the basis of can also make other changes in different forms.Here without also all of embodiment being given
Exhaustive.All any amendment, equivalent and improvement etc. made within spirit of the present utility model and principle, should be included in
Within this utility model scope of the claims.
Claims (4)
1. suppressing the metal-oxide-semiconductor that active channel district induced leakage current produces, including substrate, the middle part deposition of substrate top surface has
Gate insulation layer, has polysilicon or metal to form grid, the source electrode formed by ion implanting at substrate two ends on gate insulation layer
And drain electrode, it is characterised in that there is the sealing coat above sealing coat, source electrode and drain electrode to carve at grid, source electrode with drain electrode disposed thereon
Erosion has the contact hole for drawing source electrode and drain electrode, and in the contact hole on source electrode and drain electrode, deposition has metal, and drain electrode contacts
In hole, metal etch has the isolation breach for isolating source electrode and drain electrode, and the metal on source electrode directly extended over active channel
District.
The metal-oxide-semiconductor that suppression active channel district the most according to claim 1 induced leakage current produces, it is characterised in that described
Substrate is silica-base material substrate, hyaline-quartz substrate or nitride.
The metal-oxide-semiconductor that suppression active channel district the most according to claim 2 induced leakage current produces, it is characterised in that described
Gate oxide between substrate and grid is SiO2, HfO, Al2O3 or ZrO oxide, sealing coat is SiO2Or SiNx sealing coat.
4. the metal-oxide-semiconductor applying suppression active channel district induced leakage current described in any one of claims 1 to 3 to produce is active
Addressing circuit, it is characterised in that the metal-oxide-semiconductor in described active-addressed circuit is that suppression active channel district induced leakage current produces
Metal-oxide-semiconductor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201620304944.2U CN205810819U (en) | 2016-04-12 | 2016-04-12 | The metal-oxide-semiconductor of suppression active channel district induced leakage current generation and active-addressed circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201620304944.2U CN205810819U (en) | 2016-04-12 | 2016-04-12 | The metal-oxide-semiconductor of suppression active channel district induced leakage current generation and active-addressed circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
CN205810819U true CN205810819U (en) | 2016-12-14 |
Family
ID=58144119
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201620304944.2U Expired - Fee Related CN205810819U (en) | 2016-04-12 | 2016-04-12 | The metal-oxide-semiconductor of suppression active channel district induced leakage current generation and active-addressed circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN205810819U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105742364A (en) * | 2016-04-12 | 2016-07-06 | 中山大学 | MOS transistor capable of restraining photoinduced leakage current in active channel region, and application of MOS transistor |
-
2016
- 2016-04-12 CN CN201620304944.2U patent/CN205810819U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105742364A (en) * | 2016-04-12 | 2016-07-06 | 中山大学 | MOS transistor capable of restraining photoinduced leakage current in active channel region, and application of MOS transistor |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104157238B (en) | Image element circuit, the driving method of image element circuit and display device | |
CN103872080B (en) | Organic LED display device | |
CN105321957B (en) | Thin film transistor base plate including its display panel and its manufacturing method | |
US9934723B2 (en) | Thin film transistor substrate, display panel including the same, and method of manufacturing the same | |
CN103779385B (en) | Display device | |
CN102956193B (en) | Display device and electronic installation | |
CN102117824B (en) | Organic light emitting display apparatus and method of manufacturing the same | |
CN105895655B (en) | Organic light emitting diode display and its manufacture method with high aperture ratio | |
KR102699490B1 (en) | Organic light emitting diode display device | |
CN108281462A (en) | Organic light-emitting display device | |
CN105895826B (en) | A kind of selfluminous element, preparation method and display device | |
CN109103224A (en) | TFT substrate and display panel | |
CN107871757A (en) | Organic Light Emitting Diode(OLED)Array base palte and preparation method thereof, display device | |
KR20160096787A (en) | Organic light emitting diode display | |
KR20120114685A (en) | Oganic electro-luminesence display device and manufactucring metod of the same | |
TW201401250A (en) | Organic light emitting diode display | |
CN1934708A (en) | Electroluminescent display devices | |
KR20160128547A (en) | Organic light emitting display device | |
CN103268885B (en) | AMOLED display panel and AMOLED display device | |
KR20130092725A (en) | Organic light emitting display device and method for manufacturing thereof | |
CN103035848A (en) | Organic light emitting display device and method for fabricating the same | |
CN101002241A (en) | Display, array substrate and display manufacturing method | |
CN205810819U (en) | The metal-oxide-semiconductor of suppression active channel district induced leakage current generation and active-addressed circuit | |
JP2008513931A (en) | Organic EL display device and manufacturing method thereof | |
CN104464607B (en) | The image element circuit and its driving method of OLED |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20161214 Termination date: 20190412 |
|
CF01 | Termination of patent right due to non-payment of annual fee |