CN205810794U - Semiconductor element - Google Patents
Semiconductor element Download PDFInfo
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- CN205810794U CN205810794U CN201620780195.0U CN201620780195U CN205810794U CN 205810794 U CN205810794 U CN 205810794U CN 201620780195 U CN201620780195 U CN 201620780195U CN 205810794 U CN205810794 U CN 205810794U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
This utility model relates to semiconductor element.According to embodiment, semiconductor element includes that support member, support member have device and receive side that structure and interconnection structure formed wherein and the side that multiple lead-in wire extends from which.There is control terminal and the first current carrying terminals and the second current carrying terminals and the semiconductor device that is made up of III N semi-conducting material is installed to device and receives structure.The control terminal of the first electric interconnection is coupled to the first lead-in wire by the first electric interconnection.Second electric interconnection is coupling between the first current carrying terminals of semiconductor device and the second lead-in wire.Second current carrying terminals of the first semiconductor device is coupled to device and receives structure or be coupled to interconnection structure.
Description
The application by Chun-Li Liu et al. on July 24th, 2015 submit to, entitled " SEMICONDUCTOR
COMPONENT AND METHOD OF MANUFACTURE " temporary patent application No.62/196, the formal application of 629, logical
Cross to quote and entire contents is merged so far, and thus require the priority about common theme.
Technical field
This utility model usually relates to electronics, particularly relates to its semiconductor structure and forms the side of semiconductor device
Method.
Background technology
In the past, semiconductor maker has used the combination of silicon semiconductor material and III-N semi-conducting material to manufacture altogether
Source altogether gate device, such as with open type III-N depletion type HEMT of silicon device cascade.This of material is used to combine help
Normally opened III-N depletion device is used to realize the normally off state.Cascade semiconductor device is by Rakesh K.Lai
Et al. and described in U.S. Patent Application Publication No. 2013/0088280 A1 disclosed in 11 days April in 2013.
After being manufactured cascade device by different semiconductor substrate materials, semiconductor element manufacturer typically will
Silicon device and depletion device protection in individually encapsulation, and will individually the device in encapsulation via leadframe leads
It is joined together to form cascade device.The quantity making shortcoming in this way be to increase encapsulation then increases common source altogether
The cost of gate semiconductor element, and make altogether because of the ghost effect of the such increase of such as parasitic capacitance and stray inductance
The performance degradation of source gate device altogether.
Therefore, there is a kind of cascade semiconductor device and a kind of side for manufacturing cascade semiconductor device
Method will be favourable.Structures and methods implement cost efficient will advantageously.
Utility model content
In first aspect of the present utility model, it is provided that a kind of semiconductor element (10), there is at least the first terminal and second
Terminal, it is characterised in that including: support member (12), has the first side and the second side and multiple lead-in wire (26,28,30),
First side of support member (12) has the first device reception structure (18), the second device receives structure (20) and first and links mutually
Structure (21), and the second side of support member (12) has contact (24)；First semiconductor device (40,40B), is installed to first
Device receive structure (18), the first semiconductor device (40) have control terminal (54,55) and the first current carrying terminals (50) and
Second current carrying terminals (52), and be configured to by III-N semi-conducting material；First electric interconnection (80,82), is coupling in the first half
Between the control terminal (54,55) of conductor device (40) and the first lead-in wire (30) of multiple lead-in wires (26,28,30)；Second is electric
Interconnection (76), is coupling between first current carrying terminals (50) of the first semiconductor device (40) and the first interconnection structure (21)；With
And the 3rd electric interconnection (78), the second current carrying terminals (52) being coupling in the first semiconductor device (40) receives knot with the second device
Between structure (20).
An independent embodiment according to semiconductor element described above, it is characterised in that the first semiconductor device (40)
It it is gallium nitride semiconductor device.
An independent embodiment according to semiconductor element described above, it is characterised in that also include the second semiconductor device
Part (60), is installed to the second device and receives structure (20), and the second semiconductor device (60) has control terminal (74) and first
Current carrying terminals (72) and the second current carrying terminals (75), and be configured to by silicon semiconductor material.
An independent embodiment according to semiconductor element described above, it is characterised in that also include: the 4th the most mutually
Even (84), by the control terminal (74) of the second semiconductor device (60) and the 3rd lead-in wire (26) in multiple lead-in wires (26,28,30)
It is coupled；And the 5th electric interconnection (88), be coupling in first current carrying terminals (72) of the second semiconductor device (60) with
Between the first lead-in wire (30) in multiple lead-in wires (26,28,30), wherein the first current carrying terminals of the second semiconductor device (60)
(72) control terminal (54,55) of the first semiconductor device (40) it is coupled to by the first electric interconnection (80).
An independent embodiment according to semiconductor element described above, it is characterised in that also include the 7th electric interconnection
(86) the first current carrying terminals (72), being coupling in the second semiconductor device (60) draws with second in multiple lead-in wires (26,28,30)
Between line (28).
An independent embodiment according to semiconductor element described above, it is characterised in that the first semiconductor device
(40B) the first current carrying terminals (50B) and second current carrying terminals (52B) of the first semiconductor device (40B) are at the first quasiconductor
On the active area of device (40B).
In another aspect of the present utility model, it is provided that a kind of semiconductor element, it is characterised in that including: the first device connects
Receiving structure (18,20,138), the first device receives structure (18,20) and is embedded in molding compounds；First bond pad (22,
140), it is embedded in molding compounds；Multiple leadframe leads (26,28,30), extend from molding compounds；The first half lead
Body device (40,40B, 60), is joined to the first device and receives structure, and the first semiconductor device (40,40B, 60) has control electricity
Pole, the first current-carrying electrodes and the second current-carrying electrodes；First electric interconnection (88,106), couples the first leadframe leads (30)
The first current-carrying electrodes to the first semiconductor device (40,40B, 60)；And second electric interconnection (84), by the second lead frame
Lead-in wire (26) is coupled to the control electrode of the first semiconductor device (40,40B, 60).
An independent embodiment according to semiconductor element described above, it is characterised in that also include: the 3rd the most mutually
Even (76), the second current-carrying electrodes is coupled to the first device and receives structure (138)；And the 4th electric interconnection (86), by the 3rd
Leadframe leads (28) is coupled to the first current-carrying electrodes of the first semiconductor device (40,40B, 60).
An independent embodiment according to semiconductor element described above, it is characterised in that also include: the 5th the most mutually
Even (84A), the first bond pad (140) is coupled to the control electrode of the first semiconductor device；And the 6th electric interconnection
(172), the first bond pad (140) is coupled to the 3rd leadframe leads (28)；And the 7th electric interconnection (182), will
First leadframe leads (30) is coupled to the first device and receives structure (138).
An independent embodiment according to semiconductor element described above, it is characterised in that also include: the second device connects
Receiving structure (18), the second device receives structure (18,20) and is embedded in molding compounds；Second semiconductor device (60), engages
Receiving structure (18) to the second device, the second semiconductor device (40,40B, 60) has control electrode, the first current-carrying electrodes and the
Two current-carrying electrodes；3rd electric interconnection (76,102), is coupled to second current-carrying electrodes (50) of the second semiconductor device (60)
First bond pad (22)；4th electric interconnection (78,104), is coupled to the first current-carrying electrodes (52) the first device and receives knot
Structure (20)；And the 5th electric interconnection (80), the control electrode (54,55) of the second semiconductor device (60) is coupled to the first half
Second current-carrying electrodes (72) of conductor device (40).
Accompanying drawing explanation
This utility model, by being best understood from from combining in the reading being described below in detail that appended drawings is carried out, is wherein similar to
Reference character specify similar element, and wherein:
Fig. 1 is the perspective view of the semiconductor element of the cascode configuration in FIG according to embodiment of the present utility model；
Fig. 2 is the viewgraph of cross-section of the semiconductor element of the Fig. 1 obtained along the section line 2-2 of Fig. 1；
Fig. 3 is the bottom view of the semiconductor element of Fig. 1 and 2；
Fig. 4 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Fig. 5 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Fig. 6 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Fig. 7 is the viewgraph of cross-section of the semiconductor element of the Fig. 6 obtained along the section line 7-7 of Fig. 6；
Fig. 8 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Fig. 9 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Figure 10 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Figure 11 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Figure 12 is the viewgraph of cross-section of the semiconductor element of the Figure 11 obtained along the section line 12-12 of Figure 11；
Figure 13 is the perspective view of the semiconductor element of the cascode configuration in FIG according to another kind of embodiment of the present utility model；
Simple and clear in order to illustrate, the element in figure not necessarily to scale, and the same reference word in different figure
Symbol represents identical element.It addition, simple in order to describe, omit well-known step and the description of element and details.As
Used herein above, the current-carrying electrodes meaning is the carrying current element that passes through the device of device, the source electrode of such as MOS transistor or
Drain electrode or the emitter stage of bipolar transistor or colelctor electrode or the negative electrode of diode or anode, and control the electrode meaning and be
Control the electric current flowing element by the device of device, the grid of such as MOS transistor or the base stage of bipolar transistor.Though
So device is here construed to certain n-channel or p-channel device, or certain N-shaped or p-type doped region, but in this area
Those of ordinary skill is it will be appreciated that according to embodiment of the present utility model, complementary device is also possible.That in this area
Skilled artisan will appreciate that, word as used herein exists ... period ... when and work as ... time do not imply that
The definite term that action occurs immediately when initiation action, but can the reaction initiated by initial actuating and initial actuating it
Between but to there is certain little reasonably postpone, such as propagation delay.Word approximation, about or substantially use the meaning be
The value of element has expectation and the value stated or position parameter closely.But, as is well known in the art,
It is constantly present prevention value or position Light Difference as stated definitely.The most acceptable to all, until
The difference of about 10 (10%) (and about doping content of semiconductor, until 20 (20%) percent) is considered as
Reasonable difference with ideal goal as described definitely.
Detailed description of the invention
Fig. 1 is the perspective view of the semiconductor element 10 according to embodiment of the present utility model, and Fig. 2 is along Fig. 1
Section line 2-2 and the viewgraph of cross-section of semiconductor element 10 that obtains.Fig. 1 and 2 describes together.Shown in Fig. 1 and 2 is molding
(molded) device support structure 12, the device support structure 12 of molding has top surface 14 and basal surface 16.Propping up of molding
Support structure 12 includes being positioned at the device receiving area 18 of top surface 14, device receiving area 20 and bond pad 22 and being positioned at the end
The contact 24 on surface 16.Device receiving area 18 and 20 can be referred to as device and receive structure.Device receiving area 18 is configured to use
In receiving the such multiple-unit semiconductor device of the most such as III-nitride device, but device receiving area 20 is configured to use
In receiving silicon semiconductor device.According to embodiment, device receiving area 18, device receiving area 20 and bond pad 22 and surface
14 is substantially coplanar.Leadframe leads 26,28 and 30 is stretched out from the side of the device support structure 12 of molding or edge.Molding
Supporting construction 12 can have in the mould of die cavity and by molding compounds (mold by bus is placed on
Compound) it is injected in die cavity and is formed.Bus can include the pad as device receiving area or plate 18 and 20, bag
Include by conductor 25 and the interconnection structure 21 contacting 24 bond pads 22 being integrally formed, and the most such as lead frame draws
The such multiple leadframe leads of line 26,28 and 30.After molding compounds is injected into intracavity, bus can be cut
The supporting construction 12 of the multiple moldings of single one-tenth.Suitable material for bus includes copper, aluminum etc..As mentioned, molding
Support structure 12 is exemplified and is described as discrete component；But, it can be from the lead frame being sealed in molding compounds
A part for singulation in bar.
Semiconductor chip 40 uses tube core (die) attachment material 42 to be joined to the surface 18A of device receiving area 18, wherein
Tube core attachment material 42 is electrically and thermally conductive tube core attachment material.More particularly, the surface 44 of semiconductor chip 40 is by electricity
Insulation tube core attachment material 42 is joined to the surface 18A of device receiving area 18.According to embodiment, semiconductor chip 40 is to have
The composite semiconductor chip of relative first type surface 44 and 46, wherein semiconductor chip 40 includes field-effect semiconductor device, has
In the part on surface 46 or by surface 46 a part formed drain contact 50, on the another part on surface 46 or
The source contact 52 that person is formed by the another part on surface 46, and in other parts on surface 46 or by its of surface 46
The gate contact 54 and 55 that he is partly formed.It should be noted that, semiconductor device is not limited to be field-effect transistor.Such as, half
Conductor device can be insulated gate bipolar transistor, bipolar transistor, junction field effect transistor, diode etc..According to
The embodiment that the such discrete-semiconductor device of the most such as field-effect transistor is formed by semiconductor chip 40, semiconductor chip
40 can be referred to as semiconductor device.It addition, tube core attachment material 42 is not limited to be conductive material, but it can be electric insulation material
Material or Heat Conduction Material.As example, semiconductor chip 40 is III nitride semiconductor chip, that is, group III-nitride
The backing material of semiconductor chip 40 comprises aluminium nitride.III-nitride semiconductor material can be referred to as III-N quasiconductor material
Material, semi-conducting material based on group III-nitride, semi-conducting material based on III-N etc..
Semiconductor chip 60 uses tube core attachment material 42 to be joined to the surface 20A of device receiving area 20.According to enforcement
Example, semiconductor chip 60 is the silicon with relative first type surface 64 and 66, and wherein semiconductor chip 60 includes that perpendicualr field is imitated
Answer semiconductor device, have formed on surface 64 or by surface 64 drain contact 75, in the part on surface 66 or
Person is by the source contact 72 that formed of a part on surface 66, and on the another part on surface 66 or by another of surface 66
The gate contact 74 that part is formed.Drain contact 75 is joined to the surface of device receiving area 20 by tube core attachment material 42
20A.It should be noted that, semiconductor device 60 is not limited to be vertical field-effect transistor or field-effect transistor.Such as, partly lead
Body device can be insulated gate bipolar transistor, bipolar transistor, junction field effect transistor, diode etc..As showing
Example, semiconductor chip 60 is silicon semiconductor chip, that is, the backing material of silicon semiconductor chip 40 comprises silicon.Silicon semiconductor material
Material can be referred to as semi-conducting material based on silicon, silicon semiconductor material etc..According to such point of the most such as field-effect transistor
The embodiment that vertical semiconductor device is formed by semiconductor chip 60, semiconductor chip 60 can be referred to as semiconductor device.
The drain contact 50 of semiconductor device 40 is electrically connected to bond pad 22 by closing line 76, semiconductor device 40
Source contact 52 is electrically connected to device receiving area 20 by closing line 78, and the gate contact 54 of semiconductor device 40 is by engaging
Line 80 is electrically connected to source contact 72, and the gate contact 55 of semiconductor device 40 is electrically connected to lead frame by closing line 82
Frame lead-in wire 30.The gate contact 74 of semiconductor device 60 is electrically connected to leadframe leads 26, source contact by closing line 84
72 pass through closing line 86 is connected to surface leads support lead 28 and is connected to leadframe leads 30 by closing line 88, and
And drain contact 75 is electrically connected to the surface 20A of device receiving area 20 by conduction tube core attachment material 42.It should be noted that, grid
Pole contact 54 is conducted electricity to gate contact 55 by metal system (not shown).Closing line can be referred to as wire bond.It should be noted that, root
According to this embodiment, semiconductor device 40 and 60 is electrically connected to device receiving area 18 He by conduction tube core attachment material 42 respectively
20。
As those skilled in the art recognizes, device receiving area 18 and 20, semiconductor chip 40 and 60,
And the part of the supporting construction 12 of closing line 76,78,80,82,84,86 and 88 and molding can be sealed in the most such as
In molding compounds such protection material 90.It should be noted that, leadframe leads 26 is used as grid lead support lead or grid
Pole goes between, and leadframe leads 28 is used as Kelvin's leadframe leads or Kelvin's lead-in wire, and leadframe leads 30 is used as source
Pole leadframe leads or source lead, and contact 24 as drain contact.
So, semiconductor element 10 includes III-N cascode switch, and wherein the substrate electricity of III-N semi-conducting material floats
Dynamic, and contact pad not formation on the active area of semiconductor device 40.
Fig. 3 is the bottom view of the semiconductor element 10 according to this utility model embodiment.Fig. 3 further illustrate contact 24 with
And leadframe leads 26,28 and 30.
Fig. 4 is the perspective view of the semiconductor element 100 according to this utility model another kind embodiment.Semiconductor element 100
Similar with semiconductor element 10, except closing line 76 by conductive clamp 102 replacement, closing line 78 is by conductive clamp 104
Replace, and closing line 88 is by conductive clamp 106 replacement.It should be noted that, describe semiconductor core by reference to Fig. 1 and 2
Sheet 40 and 60 is respectively installed to device receiving area 18 and 20.So, semiconductor element 100 includes III-N cascode switch,
Wherein the substrate of III-N semi-conducting material is electrically floating, and contact pad is not formed on the active area of semiconductor device 40.
As those skilled in the art recognizes, device receiving area 18 and 20, semiconductor chip 40 and 60,
And closing line 80,82,84,86 and 88, clip 102,104 and 106, and the part of the supporting construction 12 of molding can be close
It is enclosed in the most such as molding compounds 90 such protection material.
Fig. 5 is the perspective view of the semiconductor element 120 according to this utility model another kind embodiment.Semiconductor element 120
Similar with semiconductor element 10, except semiconductor element 120 includes closing line 122, closing line 122 is by semiconductor chip 60
The surface 18A of semiconductor materials and devices receiving area 18 links together.It should be noted that, by reference to Fig. 1 and 2 describe by
Semiconductor chip 40 and 60 is respectively installed to device receiving area 18 and 20.Closing line 122 is by the source electrode electricity of semiconductor device 60
Pole 72, thus source electrode is electrically connected to the quasiconductor material of semiconductor device 40 by tube core receiving area 18 and tube core attachment material 42
The body (body) of material.So, semiconductor element 120 includes III-N cascode switch, the wherein lining of III-N semi-conducting material
End ground connection, and contact pad not formation on the active area of semiconductor device 40.
As those skilled in the art recognizes, device receiving area 18 and 20, semiconductor chip 40 and 60,
And the part of the supporting construction 12 of closing line 76,78,80,82,84,86 and 88 and molding is typically sealed at such as example
In protection material as such in molding compounds.
Fig. 6 is the perspective view of the semiconductor element 130 according to another kind of embodiment of the present utility model.Fig. 7 is along Fig. 6
Section line 7-7 and the viewgraph of cross-section of semiconductor element 130 that obtains.Fig. 6 describes together with 7.Shown in Fig. 6 and 7 it is
The device support structure 132 of molding, the device support structure 132 of molding has top surface 134 and basal surface 136.Propping up of molding
Support structure 132 includes being positioned at the device receiving area 138 of top surface 134, bond pad 140 and being positioned at connecing of basal surface 136
Touch 143.According to embodiment, bond pad 138 and 140 is coplanar with surface 134.Leadframe leads 26,28 and 30 is from molding
Side or the edge of device support structure 132 stretch out.Device receiving area 138 also referred to as device receives structure.The support of molding
Structure 132 can carry out shape by being placed on bus to have in the mould of die cavity and be injected in die cavity by molding compounds
Become.Bus can include pad or the plate 138 with contact area 140, and the most such as leadframe leads 26,28 and 30
Such multiple leadframe leads, wherein pad or plate 138 are used as device receiving area.Molding compounds is being injected into chamber
After Nei, bus can be singulated into into the supporting construction 132 of multiple molding.Suitable material for bus includes copper, aluminum
Deng.As mentioned, the supporting construction 132 of molding is exemplified and is described as discrete component；But, it can be from being sealed in
A part for singulation in leadframe strip in molding compounds.
Semiconductor chip 40 uses tube core attachment material 42I to be joined to the surface 138A, Qi Zhongguan of device receiving area 138
Core attachment material 42I is that electric insulation tube core is attached material.According to embodiment, semiconductor chip 40 is to have relative first type surface 44
With the composite semiconductor chip of 46, wherein semiconductor chip 40 includes field-effect semiconductor device, has on surface 46
Point drain contact 50 that is upper or that formed by the part on surface 46, another on the another part on surface 46 or by surface 46
The source contact 52 that a part is formed, and the grid formed in other parts on surface 46 or by other parts on surface 46
Pole contact 54 and 55.So, the surface 44 of semiconductor chip 40 is joined to device receiving area by tube core attachment material 42I
The surface 138A of 138.It should be noted that, semiconductor device 40 is not limited to be field-effect transistor.Such as, semiconductor device 40 can
To be insulated gate bipolar transistor, bipolar transistor, junction field effect transistor, diode etc..As discussed above,
The embodiment formed by semiconductor chip 40 according to the such discrete-semiconductor device of the most such as field-effect transistor, quasiconductor
Chip 40 can be referred to as semiconductor device.
The drain contact 50 of semiconductor device 40 is electrically connected to the surface of device receiving area 138 by closing line 76
138A, the source contact 52 of semiconductor device 40 is electrically connected to leadframe leads 28 by closing line 86 and is passed through closing line
88 are electrically connected to leadframe leads 30, and the gate contact 54 of semiconductor device 40 is electrically connected to lead frame by closing line 84
Lead-in wire 26, gate contact 55 is electrically connected to bond pad 140 by closing line 82, and bond pad 140 is by closing line 85
It is electrically connected to leadframe leads 26.According to the embodiment of Fig. 6, leadframe leads 26 is grid lead support lead or grid
Lead-in wire, leadframe leads 28 is Kelvin's leadframe leads or Kelvin's lead-in wire, and leadframe leads 30 is source electrode
Leadframe leads or source lead.Closing line can be referred to as wire bond.It should be noted that, according to this embodiment, semiconductor device 40
Drain contact 50 be electrically connected to the surface 138A of device receiving area 138.So, semiconductor element 130 includes III-N common source
Altogether grid switch, wherein the substrate of III-N semi-conducting material is electrically floating, and contact pad not active at semiconductor device 40
Formed in district.
As those skilled in the art recognizes, device receiving area 138, semiconductor chip 40, Yi Jijie
The part of the supporting construction 132 of zygonema 76,82,84,86 and 88 and molding is typically sealed at the most such as molding compound
In thing 90 such protection material.
Fig. 8 is the perspective view of the semiconductor element 139 according to another kind of embodiment of the present utility model.Semiconductor element
139 is similar with semiconductor element 130, except the tube core of Fig. 8 is attached material, that is, tube core attachment material 42 is conduction and leads
The material of heat；And semiconductor element 139 includes bond pad 141 and closing line 142, and wherein device is received by closing line 142
Region 138 and leadframe leads 30 link together and bond pad 141 is connected to drain contact 50 by closing line 76,
Unlike semiconductor element 130, in semiconductor element 130, drain contact 50 is connected by closing line 76 with device receiving area 138
Together.Bond pad 141 is separated by with device receiving area 138.It should be noted that, grid lead support lead 26 is via closing line
84 are electrically connected to gate electrode 54 and are electrically connected to bond pad 140 by closing line 85.It is further noted that joined
Examine Fig. 6 and 7 to describe semiconductor chip 40 is installed to device receiving area 138.Closing line 142 is by the lining of semiconductor chip 40
The end, is electrically connected to the source electrode 52 of semiconductor device 40 by leadframe leads 30, thus the source electrode of semiconductor device 40 is electric
It is connected to the body of the semi-conducting material of semiconductor device 40.So, semiconductor element 140 includes discrete III-N field effect transistor
Pipe, the wherein Substrate ground of III-N semi-conducting material, and bond pad not shape on the active area of semiconductor device 40
Become.
As those skilled in the art recognizes, device receiving area 138, semiconductor chip 40, Yi Jijie
The part of the supporting construction 132 of zygonema 76,82,84,85,86 and 88 and molding is typically sealed at the most such as molding
In compound 90 such protection material.
Fig. 9 is the perspective view of the semiconductor element 150 according to another kind of embodiment of the present utility model.Semiconductor element
150 is similar with the semiconductor element 100 described with reference to Fig. 4, except semiconductor device is identified by reference character 40A, that is, will
Letter A is attached to reference character 40, because drain contact 50 is by the one of the active area of the III-N at semiconductor device 40A
The drain contact 50A extended in part replaces, and source contact 52 active by the III-N at semiconductor device 40A
Source contact 52A extended on the another part in district replaces.It should be noted that, describe semiconductor chip by reference to Fig. 1 and 2
It is installed to device receiving area.So, semiconductor element 150 includes III-N cascode switch, wherein III-N quasiconductor material
The substrate of material is electrically floating, and contact pad is formed on the active area of semiconductor device 40A.
As those skilled in the art recognizes, device receiving area 18 and 20, semiconductor chip 40A and
60, and closing line 80,82,84,86 and 88, clip 102,104 and 106, and the part typical case of the supporting construction 12 of molding
Be sealed in the most such as molding compounds 90 such protection material.
Figure 10 is the perspective view of the semiconductor element 160 according to another kind of embodiment of the present utility model.Semiconductor element
160 is similar, except drain contact 50 by semiconductor device 40B's with the semiconductor element 120 described with reference to Fig. 5
The drain contact 50B extended in a part for the active area of III-N replaces, and source contact 52 is by semiconductor device 40B
III-N active area another part on source contact 52B that extends replace, and gate contact 54 and 55 is by half
The gate contact 54B extended on another part of the active area of the III-N of conductor device 40B replaces, and closing line 80 is by connecing
Zygonema 80B replaces, and closing line 82 does not exists.Reference character B is attached to reference character 40
Distinguish and there is the semiconductor chip of bond pad on the active area and the most not there is the semiconductor chip of bond pad.
It should be noted that, describe by reference to Fig. 1 and 2, semiconductor chip is installed to device receiving area.So, semiconductor element
160 include III-N cascode switch, wherein the substrate electrical ground of III-N semi-conducting material, and contact pad is at quasiconductor
Formed on the active area of device 40B.
As those skilled in the art recognizes, device receiving area 18 and 20, semiconductor chip 40B and
60, and closing line 76,78,80B, 84,86,88 and 122, and the part of the supporting construction 12 of molding is typically sealed at
The most such as in molding compounds such protection material.
Figure 11 is the perspective view of the semiconductor element 170 according to another kind of embodiment of the present utility model.Figure 12 be along
The section line 12-12 of Figure 11 and the viewgraph of cross-section of semiconductor element 170 that obtains.Figure 11 describes together with 12.Figure 11 and 12
Shown in be the device support structure 132 of molding, the device support structure 132 of molding includes device receiving area 138 and connects
Close pad 140, and leadframe leads 26,28 and 30.The device support structure of molding is described by reference to Fig. 6 and 7
132。
Semiconductor chip 40B uses tube core attachment material 42I to be joined to the surface 138A of device receiving area 138, wherein
Tube core attachment material 42I is that electric insulation tube core is attached material.So, surface 44 is by electrically and thermally conductive tube core attachment material
42I is joined to the surface 138A of device receiving area 138.According to embodiment, semiconductor chip 40B is to have relative first type surface
The composite semiconductor chip of 44 and 46, wherein semiconductor chip 40B includes field-effect semiconductor device, has at semiconductor device
In a part for the active area of 40B formed drain contact 50B, on another part of the active area of semiconductor device 40B shape
Source contact 52B become, and the gate contact 54B formed on another part of the active area of semiconductor device 40B.?
Semiconductor device 40B is described with reference to Figure 10.
The drain contact 50B of semiconductor device 40B is electrically connected to device receiving area 138, quasiconductor by closing line 76
Source contact 52B of device 40B is electrically connected to leadframe leads 28 by closing line 86 and is electrically connected by closing line 88
To leadframe leads 30, the gate contact 54B of semiconductor device 40B is electrically connected to leadframe leads by closing line 84
26.Bond pad 140 is electrically connected to leadframe leads 26 by closing line 172 and is electrically connected to grid by closing line 83
Contact 54B.According to the embodiment of Figure 11 and 12, leadframe leads 26 is grid lead support lead or grid lead, lead-in wire
Support lead 28 is Kelvin's leadframe leads or Kelvin's lead-in wire, and leadframe leads 30 is that source lead framework draws
Line or source lead.Closing line can be referred to as wire bond.It should be noted that, according to this embodiment, the drain contact of semiconductor device 40B
50B is electrically connected to the surface 138A of device receiving area 138 by closing line 172.So, semiconductor element 170 includes that III-N is altogether
Source altogether grid switch, wherein the substrate of III-N semi-conducting material is electrically floating, and active at semiconductor device 40B of contact pad
Formed in district.
Figure 13 is the perspective view of the semiconductor element 180 according to another kind of embodiment of the present utility model.Semiconductor element
180 is similar with semiconductor element 139, except the semiconductor chip 40 of Fig. 8 is by semiconductor chip 40B (shown in Figure 11)
Replace；Semiconductor element 180 includes the bond pad 141 illustrating with reference to Fig. 8 and describing；The closing line 85 of semiconductor element 139
By closing line 172 replacement；And gate contact 54B is connected to bond pad 140 by closing line 84.So, drain contact 50B by
Closing line 76 is electrically connected to bond pad 141, and source contact 52B is electrically connected to go between 30 and by closing line 86 by closing line 88
It is electrically connected to go between 28, and gate contact 54B is electrically connected to bond pad 140 by closing line 84 and is electrically connected by closing line 84
Receive lead-in wire 26.The surface 138A of leadframe leads 30 with device receiving area 138 is linked together by closing line 142.Connect
Zygonema 142 and 88 and lead-in wire 30 by the source electrode 52B of semiconductor device 40B, thus source electrode is electrically connected to semiconductor device
The substrate of the semi-conducting material of 40B.So, semiconductor element 180 includes III-N cascode switch, wherein III-N quasiconductor
The substrate of device is connected to its source electrode, and contact pad is formed on the active area of semiconductor device 40B.III-N partly leads
The source electrode of body device is connectable to the such electromotive force of the most such as ground connection.According to this embodiment, connect III-N semiconductor device
Source electrode also the substrate of III-N semiconductor device is connected to ground connection.
At an aspect of the present utility model, it is provided that a kind of semiconductor element, there is at least the first terminal and the second terminal,
Including: support member, there is the first side and the second side and multiple lead-in wire, the first side of support member has the first device and connects
Receive structure, the second device receives structure and the first interconnection structure, and the second side of support member has contact；First quasiconductor
Device, is installed to the first device and receives structure, and the first semiconductor device has control terminal and the first current carrying terminals and second
Current carrying terminals, and be made up of III-N semi-conducting material；First electric interconnection, is coupling in the control end of the first semiconductor device
Between sub and the first lead-in wire of multiple lead-in wire；Second electric interconnection, be coupling in the first current carrying terminals of the first semiconductor device with
Between first interconnection structure；And the 3rd electric interconnection, it is coupling in the second current carrying terminals and second device of the first semiconductor device
Part receives between structure.
An independent embodiment according to semiconductor element described above, wherein the first semiconductor device is gallium nitride half
Conductor device.
An independent embodiment according to semiconductor element described above, also includes the 4th electric interconnection, is coupling in
Between control terminal and second lead-in wire of multiple lead-in wire of semiconductor device.
An independent embodiment according to semiconductor element described above, wherein the first electric interconnection is closing line, the
Two electric interconnections are closing lines, and the 3rd electric interconnection is closing line.
An independent embodiment according to semiconductor element described above, also includes the second semiconductor device, is installed to
Second device receives structure, and the second semiconductor device has control terminal and the first current carrying terminals and the second current carrying terminals, and
And be made up of silicon semiconductor material.
An independent embodiment according to semiconductor element described above, also includes: the 4th electric interconnection, by the second half
The control terminal of conductor device is coupled with the 3rd lead-in wire of multiple lead-in wires；And the 5th electric interconnection, it is coupling in second
Between first current carrying terminals and first lead-in wire of multiple lead-in wire of semiconductor device, wherein the first current-carrying of the second semiconductor device
Terminal is coupled to the control terminal of the first semiconductor device by the first electric interconnection.
An independent embodiment according to semiconductor element described above, also includes the 7th electric interconnection, is coupling in
Between first current carrying terminals and second lead-in wire of multiple lead-in wire of two semiconductor device.
An independent embodiment according to semiconductor element described above, also includes the 8th electric interconnection, is coupling in
Semiconductor element receives between structure and the first current carrying terminals of the second semiconductor device.
An independent embodiment according to semiconductor element described above, wherein the first current-carrying of the first semiconductor device
Second current carrying terminals of terminal and the first semiconductor device is on the active area of the first semiconductor device.
At another aspect of the present utility model, it is provided that a kind of semiconductor element, including: the first device receives structure, the
One device receives structure and is embedded in molding compounds；First bond pad, is embedded in molding compounds；Multiple lead frames
Lead-in wire, extends from molding compounds；First semiconductor device, is joined to the first device and receives structure, the first semiconductor device tool
There are control electrode, the first current-carrying electrodes and the second current-carrying electrodes；First electric interconnection, is coupled to by the first leadframe leads
First current-carrying electrodes of semiconductor device；And second electric interconnection, the second leadframe leads is coupled to the first half and leads
The control electrode of body device.
An independent embodiment according to semiconductor element described above, also includes: the 3rd electric interconnection, carries second
Stream electrode is coupled to the first device and receives structure；And the 4th electric interconnection, the 3rd leadframe leads is coupled to the first half
First current-carrying electrodes of conductor device.
An independent embodiment according to semiconductor element described above, also includes: the 5th electric interconnection, connects first
Close pad and be coupled to the control electrode of the first semiconductor device；And the 6th electric interconnection, the first bond pad is coupled to
Three leadframe leads.
An independent embodiment according to semiconductor element described above, also includes the 7th electric interconnection, draws first
Wire frame lead-in wire is coupled to the first device and receives structure.
An independent embodiment according to semiconductor element described above, also includes: the 5th electric interconnection, by the first half
The control electrode of conductor device is coupled to the first leadframe leads；6th electric interconnection, by the first leadframe leads coupling
Structure is received to the first device；And the 7th electric interconnection, the first bond pad is coupled to the first of the first semiconductor device
Current-carrying electrodes.
An independent embodiment according to semiconductor element described above, wherein the control electricity of the first semiconductor device
Pole, the first current-carrying electrodes and the second current-carrying electrodes are on the active area of the first semiconductor device, and wherein the first semiconductor device
Part is III-N semiconductor device.
An independent embodiment according to semiconductor element described above, also includes: the second device reception structure, second
Device receives structure and is embedded in molding compounds；Second semiconductor device, is joined to the second device and receives structure, and the second half lead
Body device has control electrode, the first current-carrying electrodes and the second current-carrying electrodes；3rd electric interconnection, by the second semiconductor device
Second current-carrying electrodes is coupled to the first bond pad；4th electric interconnection, is coupled to the first current-carrying electrodes the first device and receives
Structure；And the 5th electric interconnection, the electrode that controls of the second semiconductor device is coupled to the second load of the first semiconductor device
Stream electrode.
An independent embodiment according to semiconductor element described above, also includes the 6th electric interconnection, by the second half
The control electrode of conductor device is coupled to the first leadframe leads.
An independent embodiment according to semiconductor element described above, also includes the 7th electric interconnection, by the second device
Part receives the structure Coupling the first current-carrying electrodes to the first semiconductor device.
An independent embodiment according to semiconductor element described above, wherein the first electric interconnection is closing line or folder
The one of son, the second electric interconnection is the one of closing line or clip, and the 3rd electric interconnection is the one of closing line or clip
Kind.
At another aspect of the present utility model, it is provided that a kind of method for manufacturing semiconductor element, including: formed and prop up
Support member, support member has the first side parallel to each other and the second side and the vertical with the first side and the second side the 3rd
Side, wherein support member has the multiple lead-in wires extended from the 3rd side and the device extending to support member from the first side
Receive structure；First semiconductor device is installed to first device receive structure, the first semiconductor device have control terminal with
And first current carrying terminals and the second current carrying terminals, and it is made up of III-N semi-conducting material；Control by the first semiconductor device
Terminal is electrically coupled to the first lead-in wire of multiple lead-in wire；First current carrying terminals of the first semiconductor device is electrically coupled to multiple lead-in wire
Second lead-in wire；And the second current carrying terminals of the first semiconductor device is electrically coupled to the first device reception structure or first
One of interconnection structure.
Although disclosed herein some preferred embodiment and method, but for this area from aforementioned disclosure
In those skilled in the art will be apparent from, changing and modifications of this embodiments and methods can be carried out, new without departing from this practicality
The spirit and scope of type.Plan is only limited to by additional claims and the rule of applicable law and former by this utility model
The most necessary scope.
Claims (10)
1. a semiconductor element (10), has at least the first terminal and the second terminal, it is characterised in that including:
Support member (12), has the first side and the second side and multiple lead-in wire (26,28,30), the first of support member (12)
Side has the first device and receives structure (18), the second device reception structure (20) and the first interconnection structure (21), and supports
Second side of part (12) has contact (24)；
First semiconductor device (40,40B), is installed to the first device and receives structure (18), and the first semiconductor device (40) has
Control terminal (54,55) and the first current carrying terminals (50) and the second current carrying terminals (52), and joined by III-N semi-conducting material
It is set to；
First electric interconnection (80,82), is coupling in the control terminal (54,55) of the first semiconductor device (40) and multiple lead-in wires
Between first lead-in wire (30) of (26,28,30)；
Second electric interconnection (76), is coupling in the first current carrying terminals (50) and first interconnection structure of the first semiconductor device (40)
(21) between；And
3rd electric interconnection (78), the second current carrying terminals (52) being coupling in the first semiconductor device (40) receives with the second device
Between structure (20).
Semiconductor element the most according to claim 1 (10), it is characterised in that the first semiconductor device (40) is gallium nitride
Semiconductor device.
Semiconductor element the most according to claim 1 (10), it is characterised in that also include the second semiconductor device (60), peace
Installing to the second device and receive structure (20), the second semiconductor device (60) has control terminal (74) and the first current carrying terminals
(72) and the second current carrying terminals (75), and be configured to by silicon semiconductor material.
Semiconductor element the most according to claim 3 (10), it is characterised in that also include:
4th electric interconnection (84), by the control terminal (74) of the second semiconductor device (60) and multiple lead-in wires (26,28,30)
The 3rd lead-in wire (26) be coupled；And
5th electric interconnection (88), be coupling in first current carrying terminals (72) of the second semiconductor device (60) and multiple lead-in wires (26,
28,30), between the first lead-in wire (30) in, wherein first current carrying terminals (72) of the second semiconductor device (60) is electric by first
The control terminal (54,55) of the first semiconductor device (40) is coupled in interconnection (80).
Semiconductor element the most according to claim 4 (10), it is characterised in that also include the 7th electric interconnection (86), coupling
The second lead-in wire (28) in the first current carrying terminals (72) and multiple lead-in wires (26,28,30) of the second semiconductor device (60) it
Between.
Semiconductor element the most according to claim 4 (10), it is characterised in that the first load of the first semiconductor device (40B)
Stream terminal (50B) and the second current carrying terminals (52B) the having at the first semiconductor device (40B) of the first semiconductor device (40B)
In source region.
7. a semiconductor element, it is characterised in that including:
First device receives structure (18,20,138), and the first device receives structure (18,20) and is embedded in molding compounds；
First bond pad (22,140), is embedded in molding compounds；
Multiple leadframe leads (26,28,30), extend from molding compounds；
First semiconductor device (40,40B, 60), be joined to first device receive structure, the first semiconductor device (40,40B,
60) there is control electrode, the first current-carrying electrodes and the second current-carrying electrodes；
First electric interconnection (88,106), the first leadframe leads (30) is coupled to the first semiconductor device (40,40B,
60) the first current-carrying electrodes；And
Second electric interconnection (84), is coupled to the first semiconductor device (40,40B, 60) by the second leadframe leads (26)
Control electrode.
Semiconductor element the most according to claim 7, it is characterised in that also include:
3rd electric interconnection (76), is coupled to the second current-carrying electrodes the first device and receives structure (138)；And
4th electric interconnection (86), is coupled to the first semiconductor device (40,40B, 60) by the 3rd leadframe leads (28)
First current-carrying electrodes.
Semiconductor element the most according to claim 8, it is characterised in that also include:
5th electric interconnection (84A), is coupled to the control electrode of the first semiconductor device by the first bond pad (140)；And
6th electric interconnection (172), is coupled to the 3rd leadframe leads (28) by the first bond pad (140)；And
7th electric interconnection (182), is coupled to the first leadframe leads (30) the first device and receives structure (138).
Semiconductor element the most according to claim 7, it is characterised in that also include:
Second device receives structure (18), and the second device receives structure (18,20) and is embedded in molding compounds；
Second semiconductor device (60), is joined to the second device and receives structure (18), and the second semiconductor device (40,40B, 60) has
There are control electrode, the first current-carrying electrodes and the second current-carrying electrodes；
3rd electric interconnection (76,102), is coupled to the first joint by second current-carrying electrodes (50) of the second semiconductor device (60)
Pad (22)；
4th electric interconnection (78,104), is coupled to the first current-carrying electrodes (52) the first device and receives structure (20)；And
5th electric interconnection (80), is coupled to the first semiconductor device by the control electrode (54,55) of the second semiconductor device (60)
Second current-carrying electrodes (72) of part (40).
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562196629P | 2015-07-24 | 2015-07-24 | |
| US62/196,629 | 2015-07-24 | ||
| US15/202,917 | 2016-07-06 | ||
| US15/202,917 US10388539B2 (en) | 2015-07-24 | 2016-07-06 | Semiconductor component and method of manufacture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205810794U true CN205810794U (en) | 2016-12-14 |
Family
ID=57507622
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620780195.0U Active CN205810794U (en) | 2015-07-24 | 2016-07-22 | Semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205810794U (en) |
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2016
- 2016-07-22 CN CN201620780195.0U patent/CN205810794U/en active Active
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