CN205787709U - A kind of low-power scm formula power source management control system - Google Patents

Abstract

The utility model relates to the field of single-chip microcomputer control, in particular to a low-power consumption single-chip microcomputer power management control system. It includes a working part and a standby part, and the working part is provided with a working power supply, a first DC/DC power conversion module, a single-chip microcomputer, a second DC/DC power conversion module, peripheral devices and a high-voltage module. The utility model avoids the power consumption of the single-chip microcomputer in the standby stage of the power conversion module and the standby maintenance, greatly reduces the overall power consumption of the system in the standby stage, and uses the clock chip to complete the sleep wake-up task, thereby improving the stability of the system.

Description

A low-power single-chip power management control system

technical field

The utility model relates to the field of single-chip microcomputer control, in particular to a low-power consumption single-chip microcomputer power management control system.

Background technique

The low-power design of the electronic part of the traditional instrument focuses on the selection and software control of the single-chip microcomputer and peripheral devices. In the system with sleep and working state division, it relies on the sleep mode of the single-chip microcomputer to achieve low-power design, but in the sleep stage The power conversion unit and single-chip microcomputer still need to consume electric energy, especially when there is a large voltage difference between the power supply provided by the instrument and the voltage required by the single-chip microcomputer system and DC/DC conversion is used, the low power consumption design of the power management part is ignored, which limits the instrument. benefit of low power consumption.

Contents of the invention

The technical problem to be solved by the utility model is how to overcome the deficiencies of the prior art and provide a low-power single-chip microcomputer power management control system.

The technical solution adopted by the utility model for achieving the above object is: a low power consumption power management control system of a single-chip microcomputer system, including a working part and a standby part, and the working part is provided with a working power supply, a first DC/DC power conversion module, Single-chip microcomputer, second DC/DC power conversion module, peripheral devices and high-voltage module;

The working power is converted by the first DC/DC power conversion module to supply power for the single-chip microcomputer, and the working power is converted by the second DC/DC power conversion module to supply power for the peripheral devices;

The standby part includes a standby power supply, a clock chip module and a self-locking circuit module, the standby power supply is connected to the clock chip to provide power for it, and the self-locking circuit is connected to the clock chip.

Further, a power switch is provided between the working power supply and the first DC/DC power conversion module and the second DC/DC power conversion module, and a high voltage module power switch is provided between the power switch and the high voltage module , the power switch is turned on and off through the control signal output by the self-locking circuit module, and the high-voltage power switch is turned on and off through the control signal output from the single-chip microcomputer.

Further, the second DC/DC power conversion module realizes its own switching through the control signal sent by the single chip.

Further, the working power supply is connected to the self-locking circuit module, and a power-on switch is provided between them.

Further, the self-locking circuit module is connected with the single-chip microcomputer to receive control signals from the single-chip microcomputer.

Further, the peripheral devices include communication and storage devices.

Further, the self-locking circuit includes an inverter, a current limiting resistor, a triode, a first voltage dividing resistor, a second voltage dividing resistor, a working power input terminal, a working power output terminal and a P-channel MOSFET, and the inverter uses To accept control signals from the single-chip microcomputer, the clock chip module and the power-on switch (that is, the power signal sent by the indirect working power supply).

The invention has the advantages of avoiding the power consumption of the single-chip microcomputer in the standby stage of the power conversion module and standby maintenance, greatly reducing the overall power consumption of the system in the standby stage, and using the clock chip to complete the sleep wakeup task, improving the stability of the system.

Description of drawings

Fig. 1 is a flow chart of the signal work of the present invention.

Fig. 2 is the module control diagram of the present invention.

Fig. 3 self-locking circuit diagram of the present invention.

detailed description

The present invention is described in detail below in conjunction with accompanying drawing:

The voltage of the standby power supply used in the present embodiment is 3.6V, and the voltage of the working power supply is 24V,

A low-power consumption power management control system for a single-chip microcomputer system, including a working part and a standby part, and the working part is provided with a working power supply, a first DC/DC power conversion module, a single-chip microcomputer, a second DC/DC power conversion module, and peripheral devices and high voltage modules;

The working power is converted by the first DC/DC power conversion module to supply power for the single-chip microcomputer, and the working power is converted by the second DC/DC power conversion module to supply power for the peripheral devices;

The standby part includes a standby power supply, a clock chip module and a self-locking circuit module, the standby power supply is connected to the clock chip to provide power for it, and the self-locking circuit is connected to the clock chip.

A power switch is provided between the working power supply and the first DC/DC power conversion module and the second DC/DC power conversion module, and a high voltage module power switch is provided between the power switch and the high voltage module. The power switch is turned on and off through the control signal output by the self-locking circuit module, the high-voltage power switch is turned on and off through the control signal output by the single-chip microcomputer, and the high-voltage module power switch is controlled by the control signal sent by the single-chip microcomputer. Provide high voltage power. The second DC/DC power conversion module realizes its own switching through the control signal sent by the single chip.

The working power supply is connected to the self-locking circuit module, and a power-on switch is arranged therebetween.

The self-locking circuit module is connected with the single-chip microcomputer to receive control signals from the single-chip microcomputer.

The peripheral devices include communication and storage devices.

The self-locking circuit includes an inverter 1, a current limiting resistor, a drive triode 2, a first voltage dividing resistor (R2), a second voltage dividing resistor (R3), a working power input terminal, a working power output terminal and a P channel MOSFET3, the working power input terminal is connected to the working power supply of the working part, the working power output terminal is connected to the first DC/DC power conversion module, the second DC/DC power conversion module, and the high-voltage module power switch, and the inverter is used to accept From the control signal of the clock chip module and the power-on switch (that is, the power signal sent by the indirect working power supply), as shown in the figure, the control signal from the single-chip microcomputer is a single-chip microcomputer control signal, including high-level P1 signal and low-power Flat P1 signal, where the high-level P1 signal is generated when the system enters the working state from the dormant state, and the low-level P1 signal is generated when the system enters the dormant state from the working state; the control signal from the clock chip module is a wake-up signal, which is High-level P2 signal; the control signal from the power-on switch (that is, the power signal from the indirect working power supply) is the power-on signal, that is, the power-on signal P3.

The working principle of the present invention is: in the first start-up stage of the system, the power-on switch is manually powered on to generate a start-up signal P3 to the self-locking circuit, and a high-level signal is generated through the inverter 1 in the self-locking circuit, and the self-locking circuit is turned on at the same time. The driving transistor 2 in the lock circuit further turns on the P-channel MOSFET 3, and the power supply of the working part is input. At the same time, the first voltage dividing resistor in the self-locking circuit generates a locking signal and acts on the power switch of the working part to lock the power input, so that the working power It can work normally with power supply. At this time, keep the power-on switch working continuously for a certain period of time. After the single-chip microcomputer sends a high-level signal P1, then turn off the power-on switch, that is, remove the power-on signal P3 generated by the power-on switch. Since then, the system has completed startup and enters Work Phase.

In the working stage, the parameters of the clock chip module are first set by the single-chip microcomputer, and enter the task execution stage. The communication in the working state is realized by waking up to reduce the idle time of the microcontroller and reduce power consumption. For the modules that need to be turned on during the working process, the single-chip microcomputer turns on the power supply in time and turns off the power supply in time after completing the task. After the single-chip microcomputer completes the scheduled task and reaches the sleep time, the single-chip microcomputer sends a control signal, that is, a low-level P1 signal, and resets the alarm wake-up time of the clock chip module. The driving transistor 2 in the self-locking circuit cannot be turned on. Further, the P channel MOSFET3 closes, cuts off the power supply of the self-locking circuit, and the locking signal disappears. Since the clock chip module has no control signal, the single-chip microcomputer is powered off, and the working part is powered off and enters the system standby stage. At this stage, the standby part works with very low power consumption.

In the dormant stage, when the set alarm time arrives, the clock chip module generates a clock wake-up signal, that is, a high-level P2 signal. The same is true for the self-locking circuit. The inverter 1 generates a high-level signal, and at the same time turns on the self-locking circuit. The driving transistor 2 of the driving transistor further turns on the P-channel MOSFET 3, and the power supply of the working part is input. At the same time, the first voltage dividing resistor in the self-locking circuit generates a locking signal and acts on the power switch of the working part to lock the power input, so that the working power supply can be supplied normally. Work, the single-chip microcomputer works, at this time, the single-chip microcomputer generates a high-level P1 signal, and at the same time, clears the wake-up signal generated by the clock chip module, starts to execute system tasks, and enters the working stage. The system cycles back and forth between the working phase and the sleeping phase.

The above-mentioned embodiments are only to illustrate the technical concept and characteristics of the present utility model, and its purpose is to allow those of ordinary skill in the art to understand the content of the present utility model and implement it accordingly, and cannot limit the protection scope of the present utility model with this . All equivalent changes or modifications made according to the essence of the content of the utility model shall fall within the scope of protection of the utility model.

Claims (7)

1. a low-power scm formula power source management control system, it is characterised in that: include working portion and standby sections, institute State working portion and be provided with working power, a DC/DC power transfer module, single-chip microcomputer, the 2nd DC/DC power transfer module, outer Peripheral device and high-pressure modular；

Described working power carries out Power convert by a DC/DC power transfer module, is powered for described single-chip microcomputer, institute State working power and carry out Power convert by the 2nd DC/DC power transfer module, power for described peripheral components；

Described standby sections includes standby power, clock chip module and latching circuit module, described standby power with time described Clock chip is connected, and powers for it, and described latching circuit is connected with described clock chip.

A kind of low-power scm formula power source management control system the most according to claim 1, it is characterised in that: described work Make to be provided with on and off switch between power supply and a described DC/DC power transfer module and the 2nd DC/DC power transfer module, described Being provided with high-voltage module power supply switch between on and off switch and described high-pressure modular, described on and off switch is defeated by latching circuit module The control signal gone out is to realize break-make, and the control signal that described high-voltage electric switch is exported by single-chip microcomputer realizes break-make, it is achieved High-pressure modular and the break-make of operational module.

A kind of low-power scm formula power source management control system the most according to claim 1, it is characterised in that: described the Two DC/DC power transfer module realize the switch of self by the control signal that described monolithic sends.

A kind of low-power scm formula power source management control system the most according to claim 1, it is characterised in that: described work Make power supply to be connected with described latching circuit module, between be provided with upper electrical switch.

A kind of low-power scm formula power source management control system the most according to claim 1, it is characterised in that: described from Lock circuit module is connected with described single-chip microcomputer, in order to receive the control signal from single-chip microcomputer.

A kind of low-power scm formula power source management control system the most according to claim 1, it is characterised in that: outside described Peripheral device includes communication, storage device.

7. according to a kind of low-power scm formula power source management control system described in claim 1 or 4 or 5, it is characterised in that: Described latching circuit includes that phase inverter, current-limiting resistance, audion, the first divider resistance, the second divider resistance, working power input End, working power outfan and P-channel MOSFET, described phase inverter is in order to accept from described single-chip microcomputer, clock chip module Control signal with upper electrical switch.