CN205724953U - One singly enters singly to go out power frequency on-line blackbody cavity panel - Google Patents

Abstract

The utility model discloses one and singly enter singly to go out power frequency on-line blackbody cavity panel, including+5V voltage generation circuit ,+2.5V reference voltage generating circuit, battery voltage sampling circuit, input voltage sample circuit, output voltage sampling circuit, power tube or IGBT module current detection circuit, inverter bridge drive circuit, relay drive circuit and major-minor single chip machine controlling circuit.This utility model list enters singly to go out power frequency on-line blackbody cavity panel and has more preferable practicality, and circuit is simple, multiple functional advantage degree.

Description

One is singly entered singly to go out power frequency Line interaction UPS Panel

Technical field

This utility model relates to a kind of panel, specifically one and singly enters singly to go out power frequency on-line blackbody cavity panel.

Background technology

Due to the restriction of technology, existing interactive machine panel is applied in small-power UPS field, and driving force is more weak, and detection signal disturbing is big, and caloric value is big.And circuit is complicated, and technique is loaded down with trivial details, if therefore production process breaks down problem, technical staff's maintenance difficult, significantly increase the weight of production pressure, slowed down production efficiency, also can cause overstocked if maintenance problem can not be solved in time, can cause the input strengthening cost.

This utility model discloses the panel of the power frequency on-line blackbody cavity of a kind of multifunctional single facies pattern.For solving the problems referred to above, this utility model single phase industrial frequence Line interaction uninterrupted power source panel, by the most complicated most crucial circuit, uses full surface mount elements, optimizes circuit, concentrate on the wiring board of a piece about 82 square centimeters, make the technique of UPS get a promotion；Panel energy consumption is little, it is strong to enhance the capacity of resisting disturbance to power tube or IGBT module driving force, to the driving force of relay, detection signal circuit and stable accurately, UPS protective capability is strengthened.

Utility model content

The purpose of this utility model is to provide one singly to enter singly to go out power frequency on-line blackbody cavity panel, with the problem solving to propose in above-mentioned background technology.

For achieving the above object, the following technical scheme of this utility model offer:

One singly enters singly to go out power frequency on-line blackbody cavity panel, including+5V voltage generation circuit, + 2.5V reference voltage generating circuit, battery voltage sampling circuit, input voltage sample circuit, output voltage sampling circuit, power tube or IGBT module current detection circuit, inverter bridge drive circuit, relay drive circuit and major-minor single chip machine controlling circuit, described major-minor single chip machine controlling circuit connects+5V voltage generation circuit respectively, + 2.5V reference voltage generating circuit, battery voltage sampling circuit, temperature sampling circuit, input voltage sample circuit, output voltage sampling circuit, power tube or IGBT module current detection circuit, inverter bridge drive circuit, relay drive circuit, output load current testing circuit and clock circuit.

As preferred version of the present utility model: described major-minor single chip machine controlling circuit also exports 232 signals of communication, buzzer drives signal, display drive signals and fan driving signal.

Compared with prior art, the beneficial effects of the utility model are: this utility model list enters singly to go out power frequency on-line blackbody cavity panel and has more preferable practicality, and circuit is simple, multiple functional advantage degree.

Accompanying drawing explanation

Fig. 1 is the structured flowchart singly entering and singly going out power frequency on-line blackbody cavity panel；

Fig. 2 is panel interface diagram；

Fig. 3 is the circuit diagram of panel power supply；

Fig. 4 is the circuit diagram of+5V voltage generation circuit；

Fig. 5 is the circuit diagram of+2.5V reference voltage generating circuit；

Fig. 6 be battery voltage sampling circuit circuit diagram；

Fig. 7 is the circuit diagram of output voltage sampling circuit；

Fig. 8 is the circuit diagram of input voltage sample circuit；

Fig. 9 is load detecting sample circuit circuit diagram；

Figure 10 is power tube or the circuit diagram of IGBT module current detection circuit；

Figure 11 is the circuit diagram of relay drive circuit；

Figure 12 is the circuit diagram of inverter bridge drive circuit；

Figure 13 is the circuit diagram of major-minor single chip machine controlling circuit.

Detailed description of the invention

Below in conjunction with the accompanying drawing in this utility model embodiment, the technical scheme in this utility model embodiment is clearly and completely described, it is clear that described embodiment is only a part of embodiment of this utility model rather than whole embodiments.Based on the embodiment in this utility model, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, broadly fall into the scope of this utility model protection.

Refer to Fig. 1-13, in this utility model embodiment, one singly enters singly to go out power frequency on-line blackbody cavity panel, including+5V voltage generation circuit, + 2.5V reference voltage generating circuit, battery voltage sampling circuit, input voltage sample circuit, output voltage sampling circuit, power tube or IGBT module current detection circuit, inverter bridge drive circuit, relay drive circuit and major-minor single chip machine controlling circuit, described major-minor single chip machine controlling circuit connects+5V voltage generation circuit respectively, + 2.5V reference voltage generating circuit, battery voltage sampling circuit, temperature sampling circuit, input voltage sample circuit, output voltage sampling circuit, power tube or IGBT module current detection circuit, inverter bridge drive circuit, relay drive circuit, output load current testing circuit and clock circuit.

Major-minor single chip machine controlling circuit also exports 232 signals of communication, buzzer drives signal, display drive signals and fan driving signal.

Operation principle of the present utility model is: as shown in Figure 2: singly enter singly to go out Line interaction panel by multiple interfaces realize reception send data to single-chip microcomputer analyzed and processed and provided driving signal；CN1 for 20P needle stand by external switch power supply provide reliable plant-grid connection to panel, it is provided that+15V ,-15V ,+12V, HPOWER+, HPOWER-, FANS, SVD, SW11 and SW2 signal；J1 socket is cell voltage input socket；J2 socket is temperature sampling interface；J3 socket is display drive signals interface；J4 socket is power tube or IGBT module current detection circuit interface；J5 socket is output load current sample circuit, output voltage sampling and input voltage Sampling Interface；J6 is program burn writing interface；J7 is the driving signaling interface of inverter bridge；J8 is com interface；J9 is the driving signaling interface of relay；J10 is 232 communication interfaces of panel and external communication；J11 is that manual maintenance bypass detects interface.

As shown in Figure 3: singly entering singly to go out Line interaction panel is provided reliable working power by CN1 input socket.+ 15V power supply is introduced by 14 feet of CN1 after connecting ground capacity C37, C14 and ground connection electrochemical capacitor C13 and provides stable+15V power supply；-15V power supply is introduced by 15 feet of CN1 after connecting ground capacity C38, C16 and ground connection electrochemical capacitor C15 and provides stable-15V power supply；+ 12V power supply is introduced panel by the 12 of CN1,13,16,17 feet；Ground is connected with 9,10,11 and the 19 of CN1.

+ 5V power supply as shown in Figure 4, mainly by filter capacitor C7, C8, C9, C10, divider resistance R39, R40 and three-terminal voltage-stabilizing chip LM317 are formed by connecting；Voltage+12V is introduced through diode D2, through the filter circuit that electrochemical capacitor C10 and C9 composes in parallel, as the input Vin and+12VDD of three-terminal voltage-stabilizing chip LM317 from the 12 of input socket CN1,13,16,17 feet；By R39 and R40 to output end voltage and the dividing potential drop of ground GND, as the ADJ end of LM317；Manostat U2 outfan 3(+Vout) after C8, C7 filter, export 5V DC voltage to single-chip microprocessor MCU and other circuit.Foregoing circuit also can realize the output of 5V direct current with other conventional voltage-stabilizing output circuits.

As shown in Figure 5: formed voltage follower by TL072 and R11, R17 and C4, thus produce the MVOL voltage of+2.5V.Due to R11=R17, + 5V is through R11, R17 dividing potential drop and, as the in-phase input end of operational amplifier, output voltage is directly fed back to the inverting input of operational amplifier, and its feedback resistance is zero, making its voltage follower, amplification coefficient is 1, so the output voltage of operational amplifier is equal to in-phase end voltage, it is+2.5V, forms the MVOL voltage of 2.5V through C4 filtering.+ 2.5V circuit is that specialized designs is for realizing the reference voltage of the all-wave detection function of input and output voltage.Battery voltage sampling circuit is as shown in Figure 6 :+15V voltage is linked into 8 feet of operational amplifier U1 after connecting ground capacity C1 ,-15V voltage is connected to 4 feet of U1；Signal BAT+ be anode, BAT-be battery cathode, signal BAT+ is accessed by 1 foot of J1 and accesses operational amplifier in-phase input end by resistance R8, R15, R14, R13, R7, R3 and earth resistance R6, ground connection high-frequency filter capacitor C2；Signal BAT-is accessed by 2 feet of J1 and accesses operational amplifier inverting input by resistance R12, R21, R20, R19 and R18；Output voltage feeds back to operational amplifier inverting input by resistance R24 and electric capacity C3, thus forms voltage differential amplifier.Differential amplifier, by BAT+ and BAT-voltage is made comparisons, exports BATVOL difference mode signal and through also connecting resistance R24, the end of oppisite phase of electric capacity C3 to U1A.Output voltage sampling circuit is as shown in Figure 7: UPS output voltage sampling circuit :+15V and-15V power supply 8 feet of concatenation operation amplifier U7,4 feet respectively；Signal OUT N and signal OUT L is respectively from the 1 of socket J5,2 feet and 5,6 feet introduce panel, signal OUT L is the phases line voltage of the output voltage of UPS, again by resistance R65, R66, R103 and R102 current limliting, after electric capacity C27 High frequency filter, accessing the in-phase end of operational amplifier U7A, the MVOL voltage of 2.5V accesses in-phase end also by resistance R99 simultaneously；Signal OUT N is the neutral voltage of the output voltage of UPS, by accessing the end of oppisite phase of operational amplifier U7A after resistance R69, R68, R108 and R107；Output voltage feeds back to the end of oppisite phase of operational amplifier U7A by resistance R106 and electric capacity C31, thus constitute voltage differential amplifier, when UPS has output voltage, sampling and outputting voltage phases line voltage OUT L and neutral voltage OUT N voltage differential amplifier are made comparisons, difference mode signal is exported by operational amplifier, the output signal R106 and C31 through being connected in parallel feeds back to end of oppisite phase, output signal is after resistance R104 and ground connection high-frequency filter capacitor C28 simultaneously, and a point two-way outputs signals to host scm and secondary single-chip microcomputer processes.It is 21 feet and 7 feet of signal OUTVOL access single-chip microcomputer U6 of signal OUTPUT AD access monolithic U4 respectively.Because its mode using resistance+operational amplifier detects, being to realize the speed of service faster, the detection time is short, can realize the switching time less than 4ms, meet the use of IT industry precision instrument.This circuit combines+2.5V reference voltage, with 2.5V as center line, more than the positive half cycle that 2.5V is alternating voltage, little 2.5V is the negative half period of alternating voltage, so can realize output AC voltage positive axis, the detection of negative semiaxis, play equilibrium and distinguish positive negative signal, AC signal is realized all-wave detection, the generating positive and negative voltage of alternating current can be differentiated.

Fig. 8 is UPS input voltage sample circuit: signal IN N and signal IN L is respectively from the 1 of socket J5,2 feet and 3,4 feet introduce panel, signal IN L is the phases line voltage of the input voltage of UPS, again by resistance R70, R71, R116 and R115 current limliting, after electric capacity C35 High frequency filter, accessing the in-phase end of operational amplifier U7B, the MVOL voltage of 2.5V is also by accessing in-phase end after resistance R113 and ground capacity C33 simultaneously；Signal IN N is the neutral voltage of the output voltage of UPS, by accessing the end of oppisite phase of operational amplifier U7B after resistance R72, R73, R123 and R122；Output voltage feeds back to the end of oppisite phase of operational amplifier U7B by resistance R120 and electric capacity C39, thus constitute voltage differential amplifier, when UPS has input voltage, sampled input voltage phases line voltage IN L and neutral voltage IN N voltage differential amplifier are made comparisons, difference mode signal is exported by operational amplifier, the output signal R120 and C39 through being connected in parallel feeds back to end of oppisite phase, output signal is after resistance R117 and ground connection high-frequency filter capacitor C36 simultaneously, and a point two-way outputs signals to host scm and secondary single-chip microcomputer processes.It is 2 feet and 2 feet of signal OUTVOL access single-chip microcomputer U6 of signal LINE AD access monolithic U4 respectively.Because its mode using resistance+operational amplifier detects, being to realize the speed of service faster, the detection time is short, can realize the switching time less than 4ms, meet the use of IT industry precision instrument.This circuit combines+2.5V reference voltage, with 2.5V as center line, more than the positive half cycle that 2.5V is alternating voltage, it is the negative half period of alternating voltage less than 2.5V, so can realize input ac voltage positive axis, the detection of negative semiaxis, play equilibrium and distinguish positive negative signal, AC signal is realized all-wave detection, the generating positive and negative voltage of alternating current can be differentiated.

As shown in Figure 9: signal IN LOAD be UPS output voltage phase line through current transformer, current transformer collection be generated as voltage signal, from the 9 of socket J5,10 feet introduce panels, the 7 of J5,8 foot ground connection；Signal IN LOAD accesses the 9 foot end of oppisite phase of operational amplifier U5C, in-phase end ground connection by resistance R84；Operational amplifier output terminal feeds back to end of oppisite phase through R86 after meeting diode D6, and after meeting current-limiting resistance R81 and high-frequency filter capacitor C23, a point two-way is connected to host scm and secondary single-chip microcomputer simultaneously；It is 22 feet and 5 feet of signal LOAD AD access single-chip microcomputer U6 of signal LOAD access single-chip microcomputer U4 respectively；Due to R84=R86 so that it is amplification coefficient is 1, so the output voltage of operational amplifier is contrary with input voltage phase.Power tube or IGBT module current detection circuit are as shown in Figure 10, circuit theory is: be then with the signal of Copper Foil between the upper left right two row's MOSFET power tubes of electric-examination drafting board with power tube MOSFET base plate during employing power tube base plate, Copper Foil is to have fixing resistivity, it is possible to takes its signal and forms GSSL signal and GSSR signal；When using IGBT module, then so that in IGBT module current detecting plate, the electric current of current transformer collection IGBT module forms GSSL signal and GSSR signal, master control borad power tube or IGBT module current detection circuit comparison signal GSSL and GSSR show that difference mode signal sends into single-chip microcomputer.Single-chip microcomputer is made to control after analyzing and processing with current sampling data, it is achieved go out the short-circuit protection to UPS, overcurrent protection.Signal GSSL and GSSR introduces panel from 1,2 feet of socket J4 and 3,4 feet respectively, and the 5 of socket J4,6 foot ground connection, 7,8 feet meet+15V and 9,10 feet meet-15V；After GSSL is by current-limiting resistance R110 and resistance R112 in parallel and electric capacity C32 ground connection, accessing the 12 foot in-phase ends of operational amplifier U5D ,+5V voltage accesses GSSL end also by resistance R47 and ground capacity C12 simultaneously；GSSR is by accessing operational amplifier U5D end of oppisite phase after current-limiting resistance R119；Output end voltage feeds back to the end of oppisite phase of operational amplifier U5D by resistance R121 and electric capacity C40, thus constitutes voltage differential amplifier；Sampling GSSL signal and GSSR signal input voltage differential amplifier are made comparisons, and export into CURVOL signal by operational amplifier；Signal CURVOL is connected to the end of oppisite phase of operational amplifier U5A by R75, the in-phase end ground connection of U5A, and+15V receives 4 feet of U5A, and-15V receives 4 feet of U5A；The 1 foot outfan of U5A is connected to the grid of field effect transistor Q9 by R132, and the grid of Q9 meets+15V pull-up resistor R77, and the source electrode of Q9 receives the drain electrode output LOCKDRV signal of+5V, Q9；1 foot of U5A is connected to the in-phase end of U5B by diode D5 and is fed back to the end of oppisite phase of operational amplifier U5A simultaneously by resistance R78；U5B makees voltage follower, and end of oppisite phase 6 foot of U5B is received outfan 7 foot and exported CURPRT signal through resistance R76 and ground capacity C22.Relay drive circuit is as shown in figure 11: use field effect transistor as driving relay, can be with large driven current density relay in parallel, it is achieved powerful voltage stabilizing.Single-chip microcomputer produces 6 roads and drives signal, is R BOOST3 respectively, R BOOST2, R BOOST, R TRIM, R PASS and R OUT relay drive signal；Wherein driving signal R OUT is that UPS output relay drives signal, and R PASS is that UPS input relay drives signal.Driving signal R OUT to meet pull down resistor R101 to be connected to drive resistance R124 and ground connection high-frequency filter capacitor C42 to be followed by the grid into field effect transistor Q7 by resistance R101, the source ground of Q4, the drain electrode of Q4 is connected to the 13 of J9, and 14 foot outputs control output relay.Simultaneously by 2 feet being signally attached to diode D13 to J11 of resistance R101, the 1 foot ground connection of J11, J11 is the manual maintenance bypass input of UPS.When J11 circuit closed, the drop-down ground connection of grid of Q7, output relay dead electricity flicks and makes civil power make UPS switch to maintenance bypass state through bypass output；Driving signal R PASS, be connected to the grid of field effect transistor Q8 after meeting pull down resistor R136, the source ground of Q8, the drain electrode of Q8 is connected to the 9 of J9, and 10 foot outputs control input relay.Signal R BOOST, R BOOST2 R BOOST3 and R TRIM is the driving signal of voltage stabilizing relay；Driving signal R BOOST to be connected to the grid of field effect transistor Q6, the source ground of Q6 after meeting pull down resistor R138, the drain electrode of Q6 is connected to the 5 of J9,6 foot outputs；Driving signal R BOOST2 to be connected to the grid of field effect transistor Q4, the source ground of Q4 after meeting pull down resistor R139, the drain electrode of Q4 is connected to the 3 of J9,4 foot outputs；Driving signal R BOOST3 to connect the grid of field effect transistor Q14, the source ground of Q14 after meeting pull down resistor R140, Q14 drain electrode is connected to the 1 of J9,2 foot outputs；Driving signal R TRIM to be connected to the grid of field effect transistor Q5, the source ground of Q5 after meeting pull down resistor R137, the drain electrode of Q5 is connected to the 7 of J9,8 foot outputs.

Inverter bridge drive circuit is as shown in figure 12: socket J7 is the accessory power outlet that inverter bridge drives signal, and+5V is connected to the 5 of J7,6 feet outputs by resistance R74, and signal HPOWER+ is received the 1 of J7 by the 5 of CN1,7 feet, 2 feet；Signal HPOWER-is connected to the 3 of J7 by the 6 of CN1,8 feet, 4 feet；PWM drive signal PWM+, from the 13 feet outputs of single-chip microcomputer U6, is connected on pull down resistor R85, then receives the grid of field effect transistor Q11 by current-limiting resistance R82, simultaneously by the drain electrode of diode D8 access field effect transistor Q13；The source electrode of Q11 is connected on and is pulled between+5V resistance R125 and diode D7 ground connection, and the drain electrode of Q11 is connected to the 9 of J7,10 foot output DRVHL by R79 and drives signal；In like manner signal PWM+ receives the grid of field effect transistor Q10 by current-limiting resistance R83, is accessed the drain electrode of field effect transistor Q12 by diode D9 simultaneously；The source electrode of Q10 is connected on and is pulled between+5V resistance R125 and diode D7 ground connection, and the drain electrode of Q10 is connected to the 11 of J7,12 foot output DRVHR by R80 and drives signal；BUS+ drives the signal 22 foot outputs from single-chip microcomputer U6, is accessed the grid of field effect transistor Q13, Q13 source ground by current-limiting resistance R90, and the drain electrode of Q13 is connected to the 7 of J7,8 foot output DRVLL by resistance R89 and drives signal；BUS+ receives PWM-by R91 simultaneously；BUS+ drives the signal 22 foot outputs from single-chip microcomputer U6, is accessed the grid of field effect transistor Q12, Q12 source ground by current-limiting resistance R93, and the drain electrode of Q12 is connected to the 13 of J7,14 foot output DRVLR by resistance R88 and drives signal；BUS-receives PWM-by R92 simultaneously；PWM-drives the signal 23 foot outputs from single-chip microcomputer U6, after meeting pull down resistor R96, is accessed the grid of Q13 and Q12 respectively by current-limiting resistance R91, R90 and R92, R93.

Single chip machine controlling circuit is as shown in figure 13: the control core of circuit uses single-chip microcomputer, respectively by two pieces of mutual phase controls of single-chip microcomputer with process data.Active crystal oscillator Z1 and electric capacity C21 composition crystal oscillating circuit is connected the clock circuit within composition with 9 feet of single-chip microcomputer；Single-chip microcomputer 20 foot supply pin VDD access+5V, 8 foot VSS ground connection, between the two and meet decoupling capacitor C26；UPS input and output voltage sampled signal LINE AD and OUTPUT AD is respectively connected to A/D switched pins 2,7 foot within single-chip microcomputer U6, and data make corresponding control after single-chip microcomputer processes；Inverter bridge GSS electric current comparison signal CURPRT accesses the A/D within single-chip microcomputer U6 and changes 3 feet, thus realizes, to inverter bridge GSS current sample, making corresponding control after single-chip microcomputer processes；Battery voltage signal BATVOL accesses 4 feet of the A/D conversion within single-chip microcomputer U6 after resistance R95 and ground connection high-frequency filter capacitor C25, it is achieved to battery voltage monitoring；The A/D that load signal LOAD AD accesses within single-chip microcomputer U6 changes 5 feet, it is achieved the monitoring to UPS loading condition, makees corresponding control, such as underloading battery protection, overload protection process etc. after single-chip microcomputer processes；Lock inverter bridge drives signal LOCKDRV to access 6 feet of single-chip microcomputer U6 through divider resistance R133 and R98；10 feet of single-chip microcomputer U6 connect earth resistance R134 and resistance R127 and export R BOOST3 signal；The 11 foot output R OUT of single-chip microcomputer U6 drive signal；The 12 of single-chip microcomputer U6 drive signal by R109 output R BOOST2；24 feet of single-chip microcomputer U6 access 1 foot of single-chip microcomputer U4 and drive signal by resistance R118 output R PASS after output signal A PASS is connected to R67 respectively；25 feet of single-chip microcomputer U6 drive signal by resistance R111 output R BOOST；28 feet of single-chip microcomputer U6 drive signal by resistance R114 output R TRIM；The 14 of single-chip microcomputer U6,15 feet receive SCK_A and the SDI_IN signal that single-chip microcomputer U4 sends respectively；16 feet of single-chip microcomputer U6 are through R105 connection SDO signal to single-chip microcomputer U4；17 feet of single-chip microcomputer U6 are as the outfan of 232 signal of communication TX_A；18 feet of single-chip microcomputer U3 export 232 signal of communication RX_A by after ground capacity C30；26 feet of single-chip microcomputer U6 are by connecting ground capacity C24 and earth resistance R87 after resistance R94；27 feet of single-chip microcomputer U6 pass through resistance R97 ground connection；The 13 of single-chip microcomputer U6,21,22,23 feet export the PWM drive signal such as PWM+, BUS-, BUS+, PWM-respectively and access inverter bridge drive circuit.

Claims (2)

1. one kind is singly entered singly to go out power frequency on-line blackbody cavity panel, including+5V voltage generation circuit, + 2.5V reference voltage generating circuit, battery voltage sampling circuit, input voltage sample circuit, output voltage sampling circuit, power tube or IGBT module current detection circuit, inverter bridge drive circuit, relay drive circuit and major-minor single chip machine controlling circuit, it is characterized in that, described major-minor single chip machine controlling circuit connects+5V voltage generation circuit respectively, + 2.5V reference voltage generating circuit, battery voltage sampling circuit, temperature sampling circuit, input voltage sample circuit, output voltage sampling circuit, power tube or IGBT module current detection circuit, inverter bridge drive circuit, relay drive circuit, output load current testing circuit and clock circuit.

The most according to claim 1 singly enter singly to go out power frequency on-line blackbody cavity panel, it is characterised in that described major-minor single chip machine controlling circuit also exports 232 signals of communication, buzzer drives signal, display drive signals and fan driving signal.