CN205596098U - Be applied to analog to digital converter's economizer - Google Patents
Be applied to analog to digital converter's economizer Download PDFInfo
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- CN205596098U CN205596098U CN201620318328.2U CN201620318328U CN205596098U CN 205596098 U CN205596098 U CN 205596098U CN 201620318328 U CN201620318328 U CN 201620318328U CN 205596098 U CN205596098 U CN 205596098U
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Abstract
The utility model discloses a be applied to analog to digital converter's economizer, including the many to one multitask ware of receiving the pulse wave signal, many to one multitask ware is connected with analog to digital converter, and analog to digital converter is connected with the data compression module, analog to digital converter is the analog digital signal with the pulse wave signal conversion of many to one multitask ware transmission, the processing is foreseeed to data compression pair of module analog digital signal to according to the pulse wave signal of prediction result control many to one multitask ware adjustment input, or foresee recompile as a result, reduce its data volume, then the serial sign indicating number behind the output code. Reduce analog to digital converter's function power consumption, also reduced conveying power consumption required when signal transfer handles to the treater simultaneously, the the too high problem of wireless transmission process energy consumption satisfied modern portable electronic products's demand, the use that has the electronic equipment of fixed electric quantity has prolonged time is shortened.
Description
Technical field
This utility model belongs to digital processing field, relates to a kind of analog-digital converter dress
Put, a kind of energy saver being applied to analog-digital converter.
Background technology
Intelligent device market is considerable now, as mobile phone, wrist-watch all contain substantial amounts of sensor
To provide service for user.And the signal that sensor receives is nature analogue signal, doing relatively
When the signal operation of high-order or process, then must use analog-digital converter, with digital signal
Mode processes.
Present stage, controlling analog-digital converter is that the MCU with Sensor hub function does this
Process, and do not solve the correlation module of the loss problem of the energy when being controlled.But,
In the mancarried devices such as mobile phone, power consumption is always electronic components topmost finger when design
Mark.And in analog-digital converter, energy consumption can also be reduced through circuit equally.At next
In the industry 4.0 in epoch, more can embody Sensor hub and there is the value of province's energy module, as
The subjects under discussion such as Internet of Things and big data, the number that required device is built up by substantial amounts of wireless senser
According to the epoch, and wireless senser is different from and can directly transmit for the signal in sensing in place of mobile phone now
To high in the clouds, not carry out computing at sensor place device, and consume energy during transmitting, depend on
The data volume that need to transmit, through this circuit framework, also can synchronize to reduce data volume, to reduce transmission
Power consumption, reach to improve device once charges can the timeliness of use.
At present, analog signal processing flow process is only carried out through being just directly transferred to processing module after transducer
Signal processing, the energy to analog-digital converter and total system does not uses and does further
Optimization.Owing to analog-digital converter can be connected to multiple sensor on using, at operation frequency
The most therefore change in rate, cause and employ too high operation frequency when conversion, cause conversion
The power consumption of device improves.
Utility model content
The purpose of this utility model is the shortcoming overcoming above-mentioned prior art, it is provided that one is applied to
The energy saver of analog-digital converter.Reduce the running power consumption of analog-digital converter, also same
Time reduce signal and be sent to required transmission power consumption when processor processes.
The purpose of this utility model is achieved through the following technical solutions:
This energy saver being applied to analog-digital converter, including receiving the multipair of pulse wave signal
One multiplexer, many-one multiplexer is connected with analog-digital converter, analog-digital converter
It is connected with data compressing module；The arteries and veins that many-one multiplexer is transmitted by described analog-digital converter
Ripple signal is converted to analog and digital signal；Analog and digital signal is carried out pre-by described data compressing module
Survey processes, and controls the pulse wave letter of many-one multiplexer adjustment input according to prediction result
Number, or predict the outcome and recompile, reduce its data volume, the then serial code after output coding.
Further, feature of the present utility model also resides in:
Wherein data compressing module includes the prediction module being connected with analog-digital converter, it was predicted that mould
Block is also connected with control module and coding module, and control module is connected with many-one multiplexer, compiles
Code module is connected with position recombination module.
Wherein prediction module includes multiple buffer, and the selector being connected with buffer, with choosing
Selecting device and the first arithmetic element of buffer connection, buffer receives analog and digital signal, the first fortune
Calculate unit and export the signal that predicts the outcome, and the number of buffer is no less than 3.
Wherein coding module includes coding circuit, and coding circuit receives the signal that predicts the outcome, coding electricity
Road output Dan Zuwei signal.
Wherein position recombination module includes buffer, and buffer receives Dan Zuwei signal, buffer and the
Three arithmetic elements connect, buffer output bit flow signal, the 3rd arithmetic element output effective code.
Effective code and Bitstream signal be compression after output serial code, effective code and Bitstream signal
Transmitted by wireless transport module.
Wherein the total bit of effective code and Bitstream signal is less than the mould of analog-digital converter conversion
Intend digital signal.
Wherein control module includes arithmetic element, and the second arithmetic element receives the signal that predicts the outcome, the
Two arithmetic element output analog-digital converter control signals.
Wherein analog-digital converter is direct converting analogue digital converter, follows continuous gradual simulation
Digital converter, rise to compare analog-digital converter, Delta coding simulation digital converter, prestige
Er Jinsen analogies bit pad, integrating analog digital converter, time-interleaved Analog-digital Converter
Any one in device.
Wherein many-one multiplexer receives 2 groups or the pulse wave signal of more than 2 groups.
The beneficial effects of the utility model are, data compressing module can be by the simulation numeral after conversion
Signal, after being compressed, exports with less figure place, effectively reduces simulation numeral and turns
The energy consumption of the circuit that the process of changing is used.
Further, it is predicted processing to analog and digital signal by prediction module, it is possible to suitable
Time adjust many-one multiplexer receive pulse signal, reduce the circuit of digital analog converter
Energy consumption.
Further, make wirelessly to be transmitted by the data after compression, decrease wireless
The too high problem of transmitting procedure energy consumption meets the demand of Modern portable electronic product, extends tool
There is the use time of the electronic equipment of fixing electricity；
Further, the analog-digital converter choosing multiple type that this utility model is used
Analog-digital converter, it is possible to be widely used in various portable electric appts.
Further, this utility model is able to receive that many group pulses signal, improves analog data
Conversion efficiency, reduce further energy consumption.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model；
Fig. 2 is the structural representation of prediction module in this utility model；
Fig. 3 is the structural representation of coding module in this utility model；
Fig. 4 is the structural representation of control module in this utility model；
Fig. 5 is the structural representation of position recombination module in this utility model；
Fig. 6 is signal timing diagram of the present utility model.
Wherein: 1 is oscillator；2 is many-one multiplexer；3 is analog-digital converter；4
For data compressing module；41 is prediction module；411 is the first buffer；412 is selector；
413 is the first arithmetic element；42 is coding module；421 is coding circuit；43 is control module；
431 is the second arithmetic element；44 is position recombination module；441 is the second buffer；442 is the 3rd
Arithmetic element；5 is wireless transport module.
Detailed description of the invention
This utility model provides a kind of energy saver being applied to analog-digital converter, including connecing
Receive the many-one multiplexer 2 of at least 2 above pulse wave signals of group, many-one multiplexer 2 and mould
Intending digital converter 3 to connect, analog-digital converter is connected with data compressing module 4；Described mould
Intend digital converter 3 to be converted to the pulse wave signal that many-one multiplexer 2 transmits simulate numeral letter
Number, data compressing module 4 above-mentioned analog and digital signal is predicted process, and according to prediction at
Reason output control many-one multiplexer 2 adjusts the pulse wave signal of input, or according to the weight that predicts the outcome
Newly encoded, reduce analog and digital signal data volume, the then serial code after output coding；Wherein count
Include the prediction module 41 being connected with analog-digital converter 3 according to compression module 4, also include with in advance
Survey coding module 42 and control module 43 that module 41 connects, coding module 42 and position restructuring mould
Block 44 connects.
Wherein prediction module 41 includes at least 3 the first buffers 411, all of first buffer
411 are linked in sequence to analog-digital converter 3, and last first buffer 411 and
One arithmetic element 413 connects, and remaining first buffer 411 is connected with selector 412, and first
Arithmetic element 413 exports the signal that predicts the outcome.
Wherein coding module 42 includes coding circuit 421, and coding circuit 421 receives the letter that predicts the outcome
Number, coding circuit 421 exports Dan Zuwei signal.
Wherein control module 43 includes the second arithmetic element 431, and the second arithmetic element 431 receives pre-
Survey the signal that predicts the outcome that module 41 sends, and output Analog-digital Converter control signal is given multipair
One multiplexer 2.
Wherein position recombination module 44 includes buffer the second buffer 441, the second buffer 441
Receive the Dan Zuwei signal of coding module 42 output, the second buffer 441 and the 3rd arithmetic element
442 connect, the second buffer 441 output bit flow signal, and the 3rd arithmetic element 442 output has
Effect code, and Bitstream signal and effective code be compression after output valid data serial code, effective code
Transmitted by wireless transport module 5 with Bitstream signal, effective code and Bitstream signal total
Figure place is less than the analog and digital signal of analog-digital converter conversion.
Below in conjunction with the accompanying drawings this utility model is described in further detail:
This utility model provides a kind of energy saver being applied to analog-digital converter, sees figure
1, including many-one multiplexer 2, many-one multiplexer 2 receives 2 groups or the arteries and veins of more than 2 groups
Rushing signal, this pulse signal can be produced by oscillator 1, and pulse signal is alternatively spontaneous arteries and veins
Rush signal；Many-one multiplexer 2 pulse signal of reception is divided into TCLK (Typical clock),
HCLK (High) higher than TCLK and the LCLK (Low) less than TCLK, and many-one is many
This signal is passed to analog-digital converter 3 by task device 2, and analog-digital converter 3 is by this letter
Number it is converted into analog and digital signal；Wherein analog-digital converter 3 turns for direct converting analogue numeral
Parallel operation, follow continuous gradual analog-digital converter, rise to compare analog-digital converter, Delta
Coding simulation digital converter, Wilkinson analogies bit pad, integrating analog digital converter,
Any one in time-interleaved analog-digital converter；Analog-digital converter 3 and data compression
Module 4 connects.
Data compressing module 4 includes the prediction module 41 receiving analog and digital signal, sees Fig. 2,
At least 3 the first buffers that prediction module 41 is sequentially connected with after being included in digital simulation transducer 3
411, last first buffer 411 is connected with arithmetic element 413, remaining first buffer
411 are connected with selector 412, and selector 412 is connected with the first arithmetic element 413, computing list
Unit 413 signal that will predict the outcome passes to coding module 42；Seeing Fig. 3, coding module 42 includes
Coding circuit 421, coding circuit 421 uses huffman coding or other coded systems to encode；
Prediction module 41 is also connected with control module 43, and control module 43 includes the second arithmetic element 431,
Second arithmetic element 431 connects prediction module 41 and many-one multiplexer 2；Coding module 43
Also being connected with position recombination module 44, position recombination module 44 includes the second buffer 441, and second delays
Storage 441 is connected with coding module 42, the second buffer 441 also with the 3rd arithmetic element 442
Connect, the second buffer 441 and the 3rd arithmetic element 442 outside secured transmission of payload data bit respectively
Stream signal and effective code are to wireless transport module 5, the outside secured transmission of payload data of wireless transport module 5
Serial code.
The workflow of the energy saver that this utility model is applied to analog-digital converter is, multipair
One multiplexer 2 receives at least 2 group pulse signals, and pulse signal can be spontaneous pulse letter
Number, it is also possible to the pulse signal produced for oscillator 1；Many-one multiplexer 2 is by pulse signal
Passing to analog-digital converter 3, analog digital converter 3 is converted into analog and digital signal,
And pass to the prediction module 41 of digital compression module 4；With selector 412 in prediction module 41
Some first buffers 411 connected receive analog and digital signal, and are sentenced by selector 412
Disconnected level, transports the judged result of selector 412 and last first buffer 411 first
Calculating the enterprising row operation of unit 413, its operation result is for predicting the outcome, and the signal that will predict the outcome is sent out
Give coding module 42；Coding circuit 421 in coding module 42 receives this signal that predicts the outcome,
And encode with coded systems such as huffman codings, and export Dan Zuwei signal to position recombination module
The length of 44, Dan Zuwei signals most preferably 16；Position recombination module 44 receives Dan Zuwei signal,
And with sequential, incoming second buffer 441 of Dan Zuwei signal will be continually entered, and by the 3rd fortune
Calculate the unit 442 controller output period, the second buffer 441 output bit flow signal, the 3rd fortune
Calculating the effective code that operation result is output of unit 442, Bitstream signal is the bit of same length
Stream signal, this Bitstream signal and effective code are the serial code after compression, this serial code are exported extremely
Wireless transport module 5, data are wirelessly transmitted under carrying out to back segment by wireless transport module 5
One step processes.
As shown in Figure 6, the numerical value according to Digital signal can be certainly for timing variations of the present utility model
Dynamic adjustment ADC CLK, uses TCLK faster when the change in value of Digital signal is big
Frequency is sampled, and numerical value is become 20 (first paragraph LCLK) from 34 as shown；And in detecting
Provide Control signal, ADC CLK when change in value to Digital signal is bigger to receive
Sample rate is promoted after Control signal；In like manner, in the change in value detecting Digital signal
Time less, (second segment TCLK) is become 15 from 13, reduces ADC CLK.Enable and Bitout
For the output of position recombination module, demonstration example is that two pen data can export a Bitout and one
Enable, can reduce the number of times originally transmitting data by restructuring.
In Fig. 6, LCLK is low speed sample frequency (Low Clock)；TCLK is that standard uses frequency
Rate (Typical Clock)；ADC CLK is analog-digital converter sample frequency (Analog to
Digital Converter Clock)；Control Signal is that the output that control module 43 produces controls
Signal；Digital Signal is the analog and digital signal that analog-digital converter 3 produces；Cdata
The Dan Zuwei signal of output after compressing for the encoded module coding of Digital Signal
(Compressed data), named D1, D2, D3...... after compression；Enable is to reform in position
The effective code of module 44 output；Bitout is the Bitstream signal of position reformation module 44 output, and
B1, B2, B3...... are for effectively to export name, and Sig is invalid signals.
Claims (10)
1. it is applied to the energy saver of analog-digital converter, it is characterized in that, including the many-one multiplexer (2) receiving pulse wave signal, many-one multiplexer (2) is connected with analog-digital converter (3), and analog-digital converter (3) is connected with data compressing module (4)；
The pulse wave signal that many-one multiplexer (2) transmits is converted to analog and digital signal by described analog-digital converter (3)；
Analog and digital signal is predicted processing by described data compressing module (4), and control many-one multiplexer (2) according to prediction result and adjust the pulse wave signal of input, or recompile according to predicting the outcome, reduce its data volume, the then serial code after output coding.
The energy saver being applied to analog-digital converter the most according to claim 1, it is characterized in that, described data compressing module (4) includes the prediction module (41) being connected with analog-digital converter (3), prediction module (41) is also connected with control module (43) and coding module (42), control module (43) is connected with many-one multiplexer (2), and coding module (42) is connected with position recombination module (44).
The energy saver being applied to analog-digital converter the most according to claim 2, it is characterized in that, described prediction module (41) includes at least 3 buffers, and the selector (412) being connected with buffer, the first arithmetic element (413) being connected with selector (412) and buffer, buffer receives analog and digital signal, and the first arithmetic element (413) exports the signal that predicts the outcome.
The energy saver being applied to analog-digital converter the most according to claim 2, it is characterized in that, described coding module (42) includes coding circuit (421), coding circuit (421) receives the signal that predicts the outcome, coding circuit (421) output Dan Zuwei signal.
The energy saver being applied to analog-digital converter the most according to claim 2, it is characterized in that, institute's rheme recombination module (44) includes buffer, buffer receives Dan Zuwei signal, buffer and the 3rd arithmetic element (442) connect, buffer output bit flow signal, the 3rd arithmetic element (442) output effective code.
The energy saver being applied to analog-digital converter the most according to claim 5, it is characterised in that described effective code and Bitstream signal be compression after output serial code, effective code and Bitstream signal are transmitted by wireless transport module.
The energy saver being applied to analog-digital converter the most according to claim 6, it is characterised in that the total bit of described effective code and Bitstream signal is less than the analog and digital signal of analog-digital converter conversion.
The energy saver being applied to analog-digital converter the most according to claim 2, it is characterized in that, described control module (43) includes the second arithmetic element (431), second arithmetic element (431) receives the signal that predicts the outcome, the second arithmetic element (431) output analog-digital converter control signal.
The energy saver being applied to analog-digital converter the most according to claim 1, it is characterized in that, described analog-digital converter (3) is direct converting analogue digital converter, follow continuous gradual analog-digital converter, rise to compare in analog-digital converter, Delta coding simulation digital converter, Wilkinson analogies bit pad, integrating analog digital converter, time-interleaved analog-digital converter any one.
The energy saver being applied to analog-digital converter the most according to claim 1, it is characterised in that described many-one multiplexer (2) receives 2 groups or the pulse wave signal of more than 2 groups.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620318328.2U CN205596098U (en) | 2016-04-15 | 2016-04-15 | Be applied to analog to digital converter's economizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620318328.2U CN205596098U (en) | 2016-04-15 | 2016-04-15 | Be applied to analog to digital converter's economizer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205596098U true CN205596098U (en) | 2016-09-21 |
Family
ID=56934969
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620318328.2U Expired - Fee Related CN205596098U (en) | 2016-04-15 | 2016-04-15 | Be applied to analog to digital converter's economizer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205596098U (en) |
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2016
- 2016-04-15 CN CN201620318328.2U patent/CN205596098U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160921 Termination date: 20170415 |