CN205594616U - Reference voltage self -adaptation device, system and computer of memory - Google Patents
Reference voltage self -adaptation device, system and computer of memory Download PDFInfo
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- CN205594616U CN205594616U CN201620171883.7U CN201620171883U CN205594616U CN 205594616 U CN205594616 U CN 205594616U CN 201620171883 U CN201620171883 U CN 201620171883U CN 205594616 U CN205594616 U CN 205594616U
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Abstract
The utility model relates to a storage device field provides a reference voltage self -adaptation device, system and computer of memory. The device and power and memory link to each other, and the divider resistance, the first end that link to each other including first end and power be the reference voltage output, the 2nd divider resistance on second termination ground and connect between a divider resistance and the 2nd divider resistance the fine setting module continuous with the memory, carrying out the partial pressure to the power through a divider resistance and the 2nd divider resistance, obtaining output voltage, output voltage carries out chronogenesis nature matching test through the fine setting pair of module, if the success then regards as reference voltage to export to the memory output voltage, otherwise finely tune a divider resistance, up to carrying out the success of chronogenesis nature matching test to output voltage, with output voltage export for the memory. Pair of module output voltage carries out chronogenesis nature matching test through the fine setting, has realized judging and adjusting output voltage, provides stability high reference voltage for the memory.
Description
Technical field
This utility model relates to storage device field, particularly relate to a kind of internal memory reference voltage self-reacting device,
System and computer.
Background technology
Along with science and technology constantly improves, people are to bodies such as the multifunction of intelligent terminal, Large Copacity and operation are smooth
Liquid is more and more fastidious.Memory modules (DDR Double Data Rate) is essential as intelligent terminal
A part, information is transmitted by it and the quality that stores directly influences the overall operation of terminal.
All there is push-pull output buffering in existing memory modules, and due to the input of existing memory modules
Receptor is the receptor of a differential levels, therefore provides a reference bias midpoint to memory modules, i.e. carries
For a reference voltage (Voltage reference is called for short Vref), to improve the data of memory modules
Noise grade in bus.And when the deterioration in accuracy of reference voltage, can make memory modules transmit data time,
Each clock signal changes, and then has influence on correct sequential.
Prior art provide reference voltage to be the electricity that two resistances of series connection are identical on circuit boards for memory modules
Resistance, obtained by carrying out dividing potential drop to filtered voltage.Simply it is easily achieved although this method is a little circuit,
But the resistance that two resistances are identical is fixed, reference voltage could be realized and keep constant.Further, since
Certain diversity is there is, therefore when running voltage is fixed, it is impossible to solid between circuit board and memory modules
Fixed reference voltage is finely adjusted.
Utility model content
The purpose of this utility model is to provide the reference voltage self-reacting device of a kind of internal memory, it is intended to solve existing
There is technology cannot provide, for internal memory, the reference voltage that degree of stability is high, and reference voltage cannot be finely adjusted
Problem.
This utility model is achieved in that the reference voltage self-reacting device of a kind of internal memory, is connected with power supply,
The reference voltage self-reacting device of described internal memory includes:
The first divider resistance that first end is connected with described power supply；
First end is reference voltage output terminal, the second end ground connection, with described first divider resistance jointly to described
Power supply carries out dividing potential drop and obtains the second divider resistance of output voltage；And
It is connected between described first divider resistance and described second divider resistance, is connected with described internal memory, right
Described output voltage carries out timing matching test, if success, is then exported by described output voltage to described interior
Deposit, otherwise described first divider resistance is finely adjusted, until described output voltage is carried out timing coupling
It is successfully tested, described output voltage is exported to the fine setting module of described internal memory.
Further, described fine setting module includes:
When timing matching test success, described output voltage is exported to described internal memory, in timing
Join test unsuccessful time, export the control unit of corresponding control signal；
Being connected with described control unit, the first end is connected with the second end of described first divider resistance, the second end
It is connected with described second divider resistance the first end, according to the corresponding resistance that adjusts of described control signal output to institute
State the first divider resistance to be finely adjusted so that described output voltage carries out the success of timing matching test, and
Described output voltage is exported to the compensating unit of described internal memory.
Further, described compensating unit includes: the first switching tube Q1 and the first resistance R201；
The hot end of described first switching tube Q1 and described first resistance R201 the first end connect described first altogether
Second end of divider resistance, the cold end of described first switching tube Q1 and first resistance R201 the second end phase
Even, the controlled end of described first switching tube Q1 is connected with described control unit.
Further, described compensating unit includes: second switch pipe Q2, the 3rd switching tube Q3, the second resistance
R202 and the 3rd resistance R203；
First end of the hot end of described second switch pipe Q2 and described second resistance R202 connects described the altogether
Second end of one divider resistance, the cold end of described first switching tube Q1 is with described second resistance R202's
Second end is connected, and the controlled end of described first switching tube Q1 is connected with described control module, described 3rd switch
First end of the hot end of pipe Q3 and described 3rd resistance R203 connects the low electricity of described first switching tube Q1 altogether
Position end, the cold end of described 3rd switching tube Q3 connects second end of described 3rd resistance R203 and described altogether
First end of the second divider resistance, the controlled end of described second switch pipe Q2 is connected with described control module.
Further, DDR sdram memory, DDR2SDRAM internal memory, DDR3SDRAM are saved as in described
Internal memory or DDR4SDRAM internal memory.
Another object of the present utility model is to provide the reference voltage Adaptable System of a kind of internal memory, including on
Position machine, the reference voltage Adaptable System of described internal memory also includes that the reference voltage of internal memory as above is adaptive
Answer device.
Another object of the present utility model is to provide a kind of computer, and including mainboard, described mainboard is provided with
The header connector of external internal memory, described computer also includes the reference voltage self adaptation of internal memory as above
Device.
Reference voltage self-reacting device, system and the computer of internal memory of the present utility model, by by first
Divider resistance the first end is connected with power supply, and first divider resistance the second end is connected with fine setting module the first end, micro-
Mode transfer and the second divider resistance and internal memory are connected, by the first divider resistance and the second divider resistance to described power supply
Carry out dividing potential drop, obtain output voltage, by fine setting module, output voltage is carried out timing matching test, if
Success, then export output voltage as the reference voltage to internal memory, be otherwise finely adjusted the first divider resistance,
Until output voltage to be carried out the success of timing matching test, output voltage is exported to described internal memory.Pass through
Fine setting module carries out timing matching test to output voltage, it is achieved that judges output voltage and adjusts,
The high output voltage of degree of stability is provided as the reference voltage, it is to avoid because reference voltage is unstable for internal memory
And the imperfect phenomenon with storage distortion of digital independent produced.
Accompanying drawing explanation
Fig. 1 is the structural representation of the reference voltage self-reacting device of the internal memory of this utility model first embodiment
Figure；
Fig. 2 is that the concrete structure of the reference voltage self-reacting device of the internal memory of this utility model first embodiment shows
It is intended to；
Fig. 3 is that the physical circuit of the reference voltage self-reacting device of the internal memory of this utility model the second embodiment shows
It is intended to；
Fig. 4 is that the physical circuit of the reference voltage self-reacting device of the internal memory of this utility model the 3rd embodiment shows
It is intended to；
Fig. 5 is the structural representation of the reference voltage Adaptable System of the internal memory of this utility model the 4th embodiment
Figure.
Detailed description of the invention
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with accompanying drawing
And embodiment, this utility model is further elaborated.Should be appreciated that described herein specifically
Embodiment, only in order to explain this utility model, is not used to limit this utility model.
Below in conjunction with concrete accompanying drawing, realization of the present utility model is described in detail:
Fig. 1 shows that the structure of the reference voltage self-reacting device of the internal memory of this utility model first embodiment is shown
Being intended to, for convenience of description, only illustrate part related to the present embodiment, details are as follows:
The reference voltage self-reacting device 100 of internal memory of the present utility model, with power vd D and internal memory 200 phase
Connect, including:
The first divider resistance 10 that first end is connected with power vd D；First end is reference voltage output terminal, the
Two end ground connection, power vd D is carried out dividing potential drop obtains second point of output voltage jointly with the first divider resistance 10
Piezoresistance 20；And be connected between the first divider resistance 10 and the second divider resistance 20, with internal memory 200
It is connected, output voltage is carried out timing matching test, if success, then by output voltage as the reference voltage
First divider resistance 10 or the second divider resistance 20, to internal memory 200, are otherwise finely adjusted by output, until
Output voltage is carried out the success of timing matching test, output voltage is exported to the fine setting module of internal memory 200
30。
In all embodiments of the present utility model, until output voltage to be carried out the success of timing matching test,
Being exported by output voltage to internal memory 200, output voltage herein is as the reference voltage of internal memory 200.
In the present embodiment, power vd D is carried out point by the first divider resistance 10 and the second divider resistance 20
Pressure, obtains output voltage, and fine setting module 30 carries out timing matching test to output voltage, with to output electricity
It is pressed into Row sum-equal matrix, until the output voltage after adjusting exports to internal memory 200, as the reference voltage if to defeated
Go out after voltage repeatedly adjusts, when still output voltage cannot be exported as the reference voltage to internal memory 200,
Then export, to host computer, the prompting message that reports an error.
When the first divider resistance 10 resistance is different with the second divider resistance 20 resistance, fine setting module 30 is deposited
Contain the first divider resistance 10 resistance and the second divider resistance 20 resistance, also store to have and mate survey with timing
Try successfully corresponding output voltage preset value.
Owing in actual applications, there is certain error in the resistance of resistance, the first divider resistance 10 and second point
Piezoresistance 20, after power vd D is carried out dividing potential drop, obtains the actual value of output voltage, the reality of this output voltage
There is certain error in actual value and value of calculation.Therefore, by fine setting module 30 according to the first divider resistance 10
The resistance of resistance and the second divider resistance 20 carries out timing matching test, and then can be to internal memory output ginseng
Before examining voltage, the first divider resistance 10 and the second divider resistance 20 are carried out dividing potential drop institute defeated to power vd D
The voltage gone out is tested, to determine whether voltage to be exported is satisfactory reference voltage.Avoid
Because of fault or the reason of working environment, the first divider resistance 10 and the second divider resistance 20 are to power vd D
Carrying out the voltage that dividing potential drop exported when there is relatively large deviation, internal memory is led because have input the reference voltage of mistake
There is the phenomenon of error in the number of writing transmission.
Fig. 2 shows the concrete knot of the reference voltage self-reacting device of the internal memory of this utility model first embodiment
Structure schematic diagram, for convenience of description, only illustrates part related to the present embodiment, and details are as follows:
Fine setting module 30 includes:
When timing matching test success, output voltage is exported to internal memory 200, survey in timing coupling
When trying unsuccessful, export the control unit 31 of corresponding control signal；
Be connected with control unit 31, the second end of the first end and the first divider resistance 10 be connected, the second end with
Second divider resistance 20 first end is connected, according to the corresponding resistance that adjusts of control signal output to the first dividing potential drop electricity
Resistance 10 is finely adjusted so that output voltage carries out the success of timing matching test, and is exported by output voltage
To the compensating unit 32 of internal memory 200.
In the present embodiment, control unit 31 can be connected with power supply, power supply be its power supply.It addition, control
In unit 31 processed in addition to storage has the first divider resistance 10 resistance and the second divider resistance 20 resistance, also deposit
Contain timing matching test successful output voltage preset value.Compensating unit 32 can be controllable by controlling list
The variable resistance of unit 31.But output voltage control unit 31 according to the resistance of the first divider resistance 10,
Resistance and the power vd D voltage of two divider resistances 20 are calculated, and output voltage is being carried out timing
When joining test crash, control unit 31 is preset according to the successful output voltage of timing matching test prestored
Value, compensating unit 32 is adjusted by the adjustment signal of output correspondence.By compensating unit 32 at first point
Export between second end and first end of the second divider resistance 20 of piezoresistance 10 and adjust resistance accordingly, with
Adjust divider resistance, the first divider resistance 10 is carried out resistance increase.
In other embodiments beyond the present embodiment, the resistance and second of the first divider resistance 10 according to demand
The resistance of divider resistance 20 is different, it is possible to be adjusted the second divider resistance 20, to change the first dividing potential drop
Resistance 10 and the second divider resistance 20 dividing potential drop situation to power vd D, and then obtain reference voltage.
In actual applications, the first divider resistance 10 repeatedly can be adjusted, by adjusting resistance for the first time
After being adjusted, timing matching test still cannot success time, then by adjust resistance carry out second time adjust
Whole.In control unit 31, storage has timing matching test successful output voltage preset value, on the one hand,
After output voltage is carried out timing matching test, can judge defeated exactly according to output voltage preset value
Go out the error degree of voltage, and then the first divider resistance 10 or the second divider resistance 20 carried out dividing potential drop adjustment,
It is easy to quickly export correct and stable reference voltage.
Based on above-described embodiment, the second embodiment is proposed.Fig. 3 is this utility model the second embodiment
The physical circuit schematic diagram of the reference voltage self-reacting device of internal memory, for convenience of description, only illustrates and this reality
Executing the part that example is relevant, details are as follows:
Compensating unit 32 includes: the first switching tube Q1 and the first resistance R201；
The hot end of the first switching tube Q1 and first resistance R201 the first end connect the of the first divider resistance altogether
Two ends, the cold end of the first switching tube Q1 and first resistance R201 the second end are connected, the first switching tube Q1
Controlled end be connected with control unit.
Concrete, in the present embodiment, the first divider resistance 10 is resistance R101, the second divider resistance 20
For resistance R102, fine setting module 30 carries out sequential according to the resistance of resistance R101 and the resistance of resistance R102
Property matching test, if success, then output voltage is exported as the reference voltage to internal memory 200.Otherwise, right
Resistance R101 or resistance R102 carries out dividing potential drop adjustment, until the output voltage of output correspondence is as the reference voltage
Or export the prompting message that reports an error.
By controlling conducting and the cut-off of the first switching tube Q1, it is achieved the control to the first resistance R201.Tool
Body, when switching tube Q1 turns on, resistance R201 is shorted, and resistance R101 and resistance R102 is to power supply
The voltage of VDD carries out dividing potential drop.When switching tube Q1 ends, resistance R201 is connected to resistance R101 and resistance
Between R102, it is provided that one adjusts resistance, to adjust divider resistance.In actual applications, resistance R201 can
To be variable resistance, after adjusting resistance and adjusting for the first time, timing matching test still cannot success time,
Carry out second time by adjustment resistance again to adjust or third time adjustment.In control unit 31, storage has timing
Join the output voltage preset value being successfully tested, on the one hand, to the resistance of the first divider resistance 10 and second point
After the resistance of piezoresistance 20 carries out timing matching test, can be the most right according to this output voltage preset value
First divider resistance 10 carries out dividing potential drop adjustment, it is simple to quickly export correct and stable reference voltage.Wherein,
Control unit 31 can be the CPU in computer, it is also possible to be for management in the control circuit of memorizer
Data storage or the single-chip microcomputer of management circuit work power.
Based on first embodiment, the 3rd embodiment is proposed.Fig. 4 is this utility model the 3rd embodiment
The physical circuit schematic diagram of the reference voltage self-reacting device of internal memory, for convenience of description, only illustrates and this reality
Executing the part that example is relevant, details are as follows:
Compensating unit 32 includes: second switch pipe Q2, the 3rd switching tube Q3, the second resistance R202 and
Three resistance R203；
The hot end of second switch pipe Q2 and first end of the second resistance R202 connect the first divider resistance altogether
Second end, the cold end of the first switching tube Q1 and second end of the second resistance R202 are connected, the first switch
The controlled end of pipe Q1 is connected with control module, the hot end of the 3rd switching tube Q3 and the 3rd resistance R203
The first end connect the cold end of the first switching tube Q1 altogether, the cold end of the 3rd switching tube Q3 connects the 3rd altogether
Second end of resistance R203 and the first end of the second divider resistance, the controlled end of second switch pipe Q2 and control
Module is connected.
In the present embodiment, the first divider resistance 10 is resistance R101, and the second divider resistance 20 is resistance
R102, control unit 31 carries out timing coupling according to the resistance of resistance R101 and the resistance of resistance R102 and surveys
Examination, if success, then exports output voltage to internal memory 200 as the reference voltage.
Below in conjunction with Fig. 4, the operation principle of the present embodiment is described in detail:
When second switch pipe Q2 and the 3rd switching tube Q3 simultaneously turns on, the second resistance R201 and the 3rd resistance
R202 is shorted, and resistance R101 and resistance R102 carries out dividing potential drop to power vd D, obtains output voltage.?
In actual application, output voltage can be according to the resistance of resistance R101, resistance R102 by control unit 31
Resistance and power vd D voltage analysis obtain.
Control unit 31 carries out timing matching test to above-mentioned output voltage, if success, then by this output
Voltage exports as the reference voltage, if unsuccessful, exports control signal, and this control signal is the first control letter
Number.Control second switch pipe Q2 by this first control signal to turn on, simultaneously the 3rd switching tube Q3 cut-off,
Now the second resistance R202 is shorted, the 3rd resistance R203 to resistance R101 formed resistance compensate, and with electricity
Resistance R202 carries out dividing potential drop to power vd D, obtains the first output voltage.
Control unit 31 carries out timing matching test to the first output voltage, if success, then this is first defeated
Going out voltage to export as the reference voltage, if unsuccessful, export control signal, this control signal is the second control
Signal.Control second switch pipe Q2 by this second control signal to end, simultaneously the 3rd switching tube Q3 conducting,
Now the 3rd resistance R203 is shorted, the second resistance R202 to resistance R101 formed resistance compensate, and with electricity
Resistance R202 carries out dividing potential drop to power vd D, obtains the second output voltage.
Control unit 31 carries out timing matching test to the second output voltage, if success, then this is second defeated
Going out voltage to export as the reference voltage, if unsuccessful, export control signal, this control signal is the 3rd control
Signal.Control second switch pipe Q2 and the 3rd switching tube Q3 by the 3rd control signal to end simultaneously, this
Time the second resistance R202 and the 3rd resistance R203 be connected on successively between resistance R101 and resistance R102,
Second resistance R202 series connection the 3rd resistance R203 to resistance R101 formed resistance compensate, and with resistance R202
Power vd D is carried out dividing potential drop, obtains the 3rd output voltage.
Control unit 31 carries out timing matching test to the 3rd output voltage, if success, then defeated by the 3rd
Go out voltage to export as the reference voltage, if unsuccessful, export the prompting message that reports an error.
Resistance is adjusted, to adjust dividing potential drop in the second end output of the first divider resistance 10 by compensating unit 32
Resistance, carries out resistance increase to the first divider resistance 10, carries out sequence after output voltage carries out the most secondary adjustment again
Property matching test, if after repeatedly, timing matching test still cannot be successful, then control unit 31
Exporting the prompting message that reports an error to host computer, user can be according to this prompting message that reports an error to internal memory 200 or right
Control unit 31 carries out fault detect.On the one hand, to the resistance of the first divider resistance 10 and the second dividing potential drop
After the resistance of resistance 20 carries out timing matching test, can be exactly to right according to this output voltage preset value
First divider resistance 10 or the second divider resistance 20 carry out dividing potential drop adjustment, it is simple to quickly output is correct and stable
Reference voltage.On the other hand data can be read out or storage data task completes it at internal memory 200
Before, send fault to developer or attendant and remind.
Additionally, in all embodiments of the present utility model, internal memory can be DDR sdram memory, DDR2
Sdram memory, DDR3SDRAM internal memory or DDR4SDRAM internal memory.
Another object of the present utility model is to provide the reference voltage Adaptable System 300, Fig. 5 of a kind of internal memory
Show the structural representation of the reference voltage Adaptable System of the internal memory of this utility model the 4th embodiment.
The reference voltage Adaptable System 400 of internal memory includes host computer 300, the reference voltage self adaptation of internal memory
System 300 also includes the reference voltage self-reacting device 100 of the internal memory being connected with host computer 300, this internal memory
The reference voltage self-reacting device 100 that reference voltage self-reacting device 100 is the internal memory in above-described embodiment.
Another object of the present utility model is to provide a kind of computer, and including mainboard, mainboard is provided with external
The header connector of memory bar, computer also includes memory bar as above.
The technical scheme relevant to this utility model due to the memory bar in above-described embodiment, computer and
Being described in detail in above-described embodiment, therefore, here is omitted.
Reference voltage self-reacting device, system and the computer of internal memory of the present utility model, by by first
Divider resistance the first end is connected with power supply, and first divider resistance the second end is connected with fine setting module the first end, micro-
Mode transfer and the second divider resistance and internal memory are connected, by the first divider resistance and the second divider resistance to described power supply
Carry out dividing potential drop, obtain output voltage, by fine setting module, output voltage is carried out timing matching test, if
Success, then export output voltage as the reference voltage to internal memory, be otherwise finely adjusted the first divider resistance,
Export to described internal memory obtaining reference voltage.By fine setting module, output voltage is carried out timing coupling to survey
Examination, it is achieved that output voltage judged and adjusts, providing, for internal memory, the reference voltage that degree of stability is high,
Avoid the digital independent produced because reference voltage is unstable imperfect and store the phenomenon of distortion.
The foregoing is only preferred embodiment of the present utility model, not in order to limit this utility model,
All any amendment, equivalent and improvement etc. made within spirit of the present utility model and principle, all should
Within being included in protection domain of the present utility model.
Claims (7)
1. a reference voltage self-reacting device for internal memory, is connected with power supply and internal memory, it is characterised in that described reference voltage self-reacting device includes:
The first divider resistance that first end is connected with described power supply；
First end is reference voltage output terminal, the second end ground connection, described power supply carries out with described first divider resistance dividing potential drop jointly and obtains the second divider resistance of output voltage；And
It is connected between described first divider resistance and described second divider resistance, it is connected with described internal memory, described output voltage is carried out timing matching test, if success, then described output voltage is exported to described internal memory, otherwise described first divider resistance being finely adjusted, until described output voltage to be carried out the success of timing matching test, described output voltage being exported to the fine setting module of described internal memory.
The reference voltage self-reacting device of internal memory the most according to claim 1, it is characterised in that described fine setting module includes:
When timing matching test success, described output voltage is exported to described internal memory, when timing matching test is unsuccessful, export the control unit of corresponding control signal；
It is connected with described control unit, first end is connected with the second end of described first divider resistance, second end is connected with described second divider resistance the first end, according to the corresponding resistance that adjusts of described control signal output, described first divider resistance is finely adjusted, make described output voltage carries out the success of timing matching test, and described output voltage is exported to the compensating unit of described internal memory.
The reference voltage self-reacting device of internal memory the most according to claim 2, it is characterised in that described compensating unit includes: the first switching tube Q1 and the first resistance R201；
The hot end of described first switching tube Q1 and described first resistance R201 the first end connect the second end of described first divider resistance altogether, the cold end of described first switching tube Q1 and first resistance R201 the second end are connected, and the controlled end of described first switching tube Q1 is connected with described control unit.
The reference voltage self-reacting device of internal memory the most according to claim 3, it is characterised in that described compensating unit includes:
Second switch pipe Q2, the 3rd switching tube Q3, the second resistance R202 and the 3rd resistance R203；
First end of the hot end of described second switch pipe Q2 and described second resistance R202 connects the second end of described first divider resistance altogether, the cold end of described first switching tube Q1 is connected with second end of described second resistance R202, the controlled end of described first switching tube Q1 is connected with described control module, the hot end of described 3rd switching tube Q3 and first end of described 3rd resistance R203 connect the cold end of described first switching tube Q1 altogether, the cold end of described 3rd switching tube Q3 connects the second end and first end of described second divider resistance of described 3rd resistance R203 altogether, the controlled end of described second switch pipe Q2 is connected with described control module.
The reference voltage self-reacting device of internal memory the most according to claim 1, it is characterised in that save as DDR sdram memory, DDR2 sdram memory, DDR3 sdram memory or DDR4 sdram memory in described.
6. a reference voltage Adaptable System for internal memory, including host computer, it is characterised in that described reference voltage Adaptable System also includes the reference voltage self-reacting device of the internal memory as described in any one of claim 1-5.
7. a computer, including mainboard, described mainboard is provided with the header connector of external memory bar, it is characterised in that described computer also includes the reference voltage self-reacting device of the internal memory as described in any one of claim 1-5.
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Cited By (1)
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| CN107168831A (en) * | 2016-03-07 | 2017-09-15 | 中国长城科技集团股份有限公司 | Reference voltage self-reacting device, method, system and the computer of internal memory |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107168831A (en) * | 2016-03-07 | 2017-09-15 | 中国长城科技集团股份有限公司 | Reference voltage self-reacting device, method, system and the computer of internal memory |
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| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: 518000 computer building of the Great Wall, Nanshan District science and Technology Park, Shenzhen, Guangdong Patentee after: China the Great Wall science and technology group Limited by Share Ltd Address before: 518000 the Great Wall computer building, 3 FA FA Road, Nanshan District science and Technology Park, Guangdong, Shenzhen Patentee before: China Changcheng Computer Shenzhen Co., Ltd. |