CN205581480U - Array substrate, display panel and display device - Google Patents

Array substrate, display panel and display device Download PDF

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Publication number
CN205581480U
CN205581480U CN201620397069.7U CN201620397069U CN205581480U CN 205581480 U CN205581480 U CN 205581480U CN 201620397069 U CN201620397069 U CN 201620397069U CN 205581480 U CN205581480 U CN 205581480U
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China
Prior art keywords
layer
touch
array base
electrode
base palte
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CN201620397069.7U
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Chinese (zh)
Inventor
张伟
徐敬义
李慧
张琨鹏
赵小恒
石天雷
赵二鹏
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to CN201620397069.7U priority Critical patent/CN205581480U/en
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Abstract

The utility model provides an array substrate, be in including substrate, setting NULL layer and setting on the substrate are in orientation layer on the NULL layer, the NULL layer includes the NULL that a plurality of intervals set up, is provided with the filling block in the interval between two at least adjacent NULL, the filling block is made by insulating material. Correspondingly, the utility model provides a display panel and a display device. The utility model discloses can make the orientation layer more level and more smooth, improve the display effect.

Description

Array base palte, display floater and display device
Technical field
This utility model relates to Display Technique field, is specifically related to a kind of array base palte, display Panel and display device.
Background technology
In display panels, in order to realize polarity inversion, common electrode layer can be drawn Being divided into multiple spaced public electrode, each public electrode receives between two adjacent frames Opposite polarity public voltage signal.In embedded touch (In-cell Touch) display device In, it will usually common electrode layer is divided into multiple public electrode (strip electricity extended in the row direction Pole or be arranged as the block type electrode of multiple lines and multiple rows), in the display stage, common electrode layer receives public affairs Signal altogether;In the touch-control stage, multirow public electrode receives touch-control successively and drives signal, thus will Public electrode time-sharing multiplex is public electrode and touch-control drive electrode.
Fig. 1 is the part-structure figure of array base palte in prior art, including thin film transistor (TFT) (not Illustrate) and the planarization layer 1 of cover film transistor, common electrode layer 2 is arranged on planarization On layer 1, owing to adjacent two public electrodes 21 are spaced apart, therebetween can the section of being formed Difference, therefore, when forming the film layer such as passivation layer, oriented layer 3 in common electrode layer again, can lead Cause film layer out-of-flatness, the liquid crystal aligning at the section of impact difference, cause showing bad;Further, the section of working as When being provided with chock insulator matter at Cha, the chock insulator matter at section difference and the chock insulator matter at public electrode are to liquid The support force of brilliant box is different, easily causes display bad.
Utility model content
This utility model is intended at least to solve one of technical problem present in prior art, carries A kind of array base palte, display floater and display device are gone out, between reducing due to public electrode The display bad phenomenon that causes of section difference.
In order to solve one of above-mentioned technical problem, this utility model provides a kind of array base palte, Including substrate, common electrode layer over the substrate is set and is arranged on described public electrode Oriented layer on layer, described common electrode layer includes multiple spaced public electrode, at least Being provided with filling block in interval between two adjacent public electrodes, described filling block is by insulating Material is made.
Preferably, the surface deviating from described substrate of described filling block and described public electrode Deviate from the flush of described substrate.
Preferably, it is provided with in the interval between the described public electrode that any two is adjacent Described filling block.
Preferably, described array base palte also includes the thin film transistor (TFT) arranged over the substrate Array and the planarization layer being arranged on described thin film transistor (TFT) array, described common electrode layer sets Put on described planarization layer, and described filling block and described planarization layer are structure as a whole.
Preferably, described array base palte also includes the passivation being arranged in described common electrode layer Layer and the pixel electrode layer being arranged on described passivation layer, described oriented layer is positioned at described pixel electricity On the layer of pole, described pixel electrode layer includes multiple pixel electrode, and described pixel electrode is with corresponding The drain electrode of thin film transistor (TFT) is connected by via, and the thickness of described pixel electrode is less than described public The thickness of electrode.
Correspondingly, this utility model also provides for a kind of display floater, carries including this utility model The above-mentioned array base palte of confession.
Preferably, described public electrode receives common electrical for the display stage in the display cycle Pressure signal, and receive touch-control driving signal in the touch-control stage, described display floater also includes and institute Stating the touch-control sensing electrode layer of common electrode layer insulation gap, described touch-control sensing electrode layer includes The touch-control sensing electrode of multiple insulation gaps, described touch-control sensing electrode and described public electrode are equal For list structure, and the bearing of trend of the two intersects.
Preferably, described display floater also include being oppositely arranged with described array base palte to box Substrate and be arranged on described array base palte and described to the liquid crystal layer between box substrate, described touches Control induction electrode layer is positioned at and described box substrate deviates from described array base palte side.
Preferably, described public electrode receives common electrical for the display stage in the display cycle Pressure signal, and receive touch-control driving signal in the touch-control stage, described public electrode is block, and Multiple described public electrodes are arranged as multiple lines and multiple rows.
Correspondingly, this utility model also provides for a kind of display device, carries including this utility model The above-mentioned display floater of confession.
When being provided with filling block between adjacent two public electrodes, these two adjacent public Section difference between electrode can reduce, after common electrode layer forms oriented layer, oriented layer Situation about sinking corresponding to the part between public electrode will be improved, and therefore, is including In the display panels of this array base palte, it is possible to reduce the out-of-flatness of oriented layer is to liquid crystal aligning Impact;Meanwhile, after filling block is set, corresponding between public electrode part chock insulator matter and Chock insulator matter corresponding to public electrode region is identical to the support force of liquid crystal cell, thus improves Display effect.
Accompanying drawing explanation
Accompanying drawing is used to offer and is further appreciated by of the present utility model, and constitutes description A part, be used for explaining this utility model together with detailed description below, but not Constitute restriction of the present utility model.In the accompanying drawings:
Fig. 1 is the part-structure schematic diagram of array base palte in prior art;
Fig. 2 is the part-structure schematic diagram of array base palte in embodiment of the present utility model;
Fig. 3 is the structural representation of mutual capacitance type touch-control display panel in embodiment of the present utility model Figure;
Fig. 4 is the position relationship signal of the touch-control drive electrode in Fig. 3 and touch-control sensing electrode Figure;
Fig. 5 is the structural representation of self-tolerant touch-control drive electrode layer in this utility model;
Wherein, reference is:
1, planarization layer;2, common electrode layer;21, public electrode;3, oriented layer;4、 Substrate;5, filling block;6, grid line;7, interlayer insulating film;8, to box substrate;9, touch Control induction electrode layer;91, touch-control sensing electrode;10, liquid crystal layer.
Detailed description of the invention
Below in conjunction with accompanying drawing, detailed description of the invention of the present utility model is described in detail.Should When being understood by, detailed description of the invention described herein is merely to illustrate and explains that this practicality is new Type, is not limited to this utility model.
As one side of the present utility model, it is provided that a kind of array base palte, incorporated by reference to Fig. 2 and Fig. 3, described array base palte include substrate 4, arrange common electrode layer 2 on the substrate 4 with And the oriented layer 3 being arranged in common electrode layer 2;Common electrode layer 2 includes that multiple interval sets The public electrode 21 put, is provided with in the interval between the public electrode 21 that at least two is adjacent Filling block 5, filling block 5 is made up of insulant.In actual applications, can be by filling block Difference in height between 5 and public electrode 21 is arranged in preset range, e.g., and public electrode 21 The 1/2 or 1/3 of thickness.
When being provided with filling block 5 between adjacent two public electrodes 21, these two adjacent Section difference between public electrode 21 can reduce, and forms oriented layer 3 in common electrode layer 2 Time, the situation sagging corresponding to the part between public electrode 21 of oriented layer 3 will obtain Improve, therefore, in the display panels including this array base palte, it is possible to reduce oriented layer The out-of-flatness of 3 impact on liquid crystal aligning;Meanwhile, after arranging filling block 5, corresponding to public Between electrode 21 part chock insulator matter and corresponding to the chock insulator matter pair of public electrode 21 region The support force of liquid crystal cell is identical, thus improves display effect.
Preferably, the surface of the away from substrate 4 of filling block 5 and public electrode 21 deviate from lining The flush at the end 4, so that the oriented layer 3 formed above common electrode layer 2 is positioned at more On even curface.
It is provided with filling block 5 in interval between the public electrode 21 that any two is adjacent, So that passivation layer above common electrode layer 2, oriented layer 3 etc. are positioned at the most smooth face On, improve display effect further.
Described array base palte also includes the thin film transistor (TFT) array (not shown) being arranged on substrate With the planarization layer 1 being arranged on described thin film transistor (TFT) array, with to being provided with film crystal The substrate 4 of pipe array planarizes, and common electrode layer 2 is arranged on planarization layer 1.Fill out Fill block 5 to be formed after forming common electrode layer 2, it is also possible to forming common electrode layer Formed before 2.In order to simplify processing technology, in this utility model, filling block 5 and smooth Changing layer 1 to be structure as a whole, generally, planarization layer 1 uses transparent insulant to make.
When making planarization layer 1 and filling block 5, can first sequentially form insulation material layer And photoresist layer;Then utilize halftoning (half-tone) mask plate that photoresist layer is exposed Light, so that being fully retained corresponding to the photoresist in region between public electrode 21, corresponds to The photoresist of public electrode 21 region be etched away a part, remainder is carved completely Eating away;Again the insulant being not covered with photoresist is performed etching;Afterwards, to photoresist layer It is ashed, would correspond to the photoresist removal of public electrode 21 region, corresponds to Between public electrode 21, the photoresist in region retains a part;Etching is continued after ashing, thus Formed and include filling block 5 and the integrative-structure of planarization layer 1.
Described thin film transistor (TFT) can be top gate type, include active layer, grid, gate insulation layer, Source electrode and drain electrode, described grid is positioned at the side of the away from substrate of described active layer, and described grid are exhausted Edge layer is between described grid and described active layer, and described array base palte also includes thin with described The grid line 6 that the grid of film transistor is arranged with layer, the grid of described thin film transistor (TFT) and grid line 6 Interlayer insulating film 7 it is provided with between place layer and described planarization layer, described thin film transistor (TFT) Source electrode and drain electrode all by run through simultaneously interlayer insulating film 7 and described gate insulation layer via and Described active layer is connected.Certainly, described thin film transistor (TFT) can also be bottom gate type, concrete structure No longer describe in detail.
Described array base palte can also include passivation layer and pixel electrode layer (not shown), Described passivation layer is arranged in common electrode layer 2, and described pixel electrode layer is arranged on passivation layer On, described pixel electrode layer includes multiple pixel electrode, described pixel electrode and corresponding thin film The drain electrode of transistor is connected by via, and the thickness of described pixel electrode is less than public electrode 21 Thickness.Generally, the thickness of pixel electrode is the 1/3 or less of public electrode 21 thickness, Therefore, after pixel electrode layer is set, the flatness of oriented layer 3 can't be affected.
This utility model provide array base palte be applicable to In-cell touch display panel, this Time, public electrode 21 is used for receiving public voltage signal in the display stage of display cycle, and Receive touch-control in the touch-control stage and drive signal.
As another aspect of the present utility model, it is provided that a kind of display floater, including this practicality The above-mentioned array base palte of novel offer, as it is shown on figure 3, also include with described array base palte box Arrange to box substrate 8 and to the liquid crystal layer between box substrate 8 and described array base palte 10.Owing to being provided with implant 5 between adjacent public electrode 21, so that public The oriented layer 3 formed above electrode layer 2 is more smooth, reduces due to the out-of-flatness of oriented layer 3 Impact on liquid crystal aligning, simultaneously as it is smooth to be arranged on the film layer above common electrode layer 2 Degree improves, thus the chock insulator matter of diverse location is the most identical to the support force of liquid crystal cell, thus improves The display effect of display floater.
Described display floater can be In-cell touch display panel, i.e. public electrode 21 is used Receive public voltage signal in the display stage in the display cycle, and receive touch-control in the touch-control stage Drive signal.Further, touch-control display panel can be self-tolerant touch-control display panel, it is also possible to For mutual capacitance type touch-control display panel.When described display floater is mutual capacitance type touch-control display panel, As shown in Figure 4, described display floater also includes and the touch-control sense of common electrode layer 2 insulation gap Electrode layer 9, touch-control sensing electrode layer 9 is answered to include the touch-control sensing electrode 91 of multiple insulation gap, Public electrode 21 and touch-control sensing electrode 91 are list structure strip, and the extension side of the two To intersecting.As it is shown on figure 3, touch-control sensing electrode layer 9 is positioned at and box substrate 8 is deviated from institute State array base palte side.
Coupling electric capacity is formed, on touch-control rank between touch-control sensing electrode 91 and public electrode 21 Section, provides touch-control to drive signal, the most each touch-control sensing electrode respectively to each public electrode 21 Also corresponding induced signal can be produced on 91.When occurring to touch, the coupling electricity of touch location Appearance changes, and causes induced signal on touch-control sensing electrode 91 corresponding to this position also to occur Change, so that it is determined that touch location.
When described display floater is self-tolerant touch-control display panel, as it is shown in figure 5, public Electrode 21 is block, and multiple public electrode 21 is arranged as multiple lines and multiple rows.With mutual capacitance type touch-control Display floater in the same manner, provides touch-control to drive signal successively to multiple public electrodes 21, when sending out During raw touch, between public electrode 21 and the human body of touch location, form parasitic capacitance, thus Induced signal on public electrode 21 is changed, and then determines touch location.
As the 3rd aspect of the present utility model, it is provided that a kind of display device, including above-mentioned Display floater.It is appreciated that described display device could be included for described display floater Public electrode 21 provide drive signal drive circuit.
It is understood that embodiment of above is merely to illustrate that of the present utility model former The illustrative embodiments managed and use, but this utility model is not limited thereto.For this For those of ordinary skill in field, in the feelings without departing from spirit of the present utility model and essence Under condition, can make various modification and improvement, these modification and improvement are also considered as this utility model Protection domain.

Claims (10)

1. an array base palte, including substrate, arranges common electrode layer over the substrate And it being arranged on the oriented layer in described common electrode layer, described common electrode layer includes multiple Every the public electrode arranged, it is characterised in that between the public electrode that at least two is adjacent Every the interior filling block that is provided with, described filling block is made up of insulant.
Array base palte the most according to claim 1, it is characterised in that described filling block The flush deviating from described substrate of the surface deviating from described substrate and described public electrode.
Array base palte the most according to claim 1, it is characterised in that any two phase It is provided with described filling block in the adjacent interval between described public electrode.
Array base palte the most as claimed in any of claims 1 to 3, its feature exists In, described array base palte also includes arranging thin film transistor (TFT) array over the substrate and setting Planarization layer on described thin film transistor (TFT) array, described common electrode layer is arranged on described flat On smoothization layer, and described filling block and described planarization layer are structure as a whole.
Array base palte the most according to claim 4, it is characterised in that described array base Plate also includes the passivation layer being arranged in described common electrode layer and is arranged on described passivation layer Pixel electrode layer, described oriented layer is positioned on described pixel electrode layer, described pixel electrode layer Including multiple pixel electrodes, the drain electrode of described pixel electrode and corresponding thin film transistor (TFT) is by mistake Hole is connected, and the thickness of described pixel electrode is less than the thickness of described public electrode.
6. a display floater, it is characterised in that include in claim 1 to 5 any one Array base palte described in Xiang.
Display floater the most according to claim 6, it is characterised in that described common electrical Pole is for receiving public voltage signal in the display stage of display cycle, and receives in the touch-control stage Touch-control drive signal, described display floater also include with described common electrode layer insulation gap touch Control induction electrode layer, described touch-control sensing electrode layer includes the touch-control sensing electricity of multiple insulation gap Pole, described touch-control sensing electrode and described public electrode are list structure, and the extension of the two Direction intersects.
Display floater the most according to claim 7, it is characterised in that described display surface Plate also include being oppositely arranged with described array base palte to box substrate and be arranged on described array Substrate and described to the liquid crystal layer between box substrate, it is described right that described touch-control sensing electrode layer is positioned at Box substrate deviate from described array base palte side.
Display floater the most according to claim 6, it is characterised in that described common electrical Pole is for receiving public voltage signal in the display stage of display cycle, and receives in the touch-control stage Touch-control drives signal, and described public electrode is block, and multiple described public electrode is arranged as many Row multiple row.
10. a display device, it is characterised in that include in claim 6 to 9 any One described display floater.
CN201620397069.7U 2016-05-05 2016-05-05 Array substrate, display panel and display device Active CN205581480U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107065356A (en) * 2017-05-10 2017-08-18 京东方科技集团股份有限公司 Display base plate and preparation method thereof, display panel and display device
CN108803108A (en) * 2018-05-30 2018-11-13 武汉华星光电技术有限公司 A kind of touch control LCD (Liquid Crystal Display) panel, display device and terminal
CN109061956A (en) * 2018-09-29 2018-12-21 武汉华星光电技术有限公司 Display panel, display module and electronic device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107065356A (en) * 2017-05-10 2017-08-18 京东方科技集团股份有限公司 Display base plate and preparation method thereof, display panel and display device
WO2018205569A1 (en) * 2017-05-10 2018-11-15 京东方科技集团股份有限公司 Display substrate and preparation method therefor, display panel, and display device
CN108803108A (en) * 2018-05-30 2018-11-13 武汉华星光电技术有限公司 A kind of touch control LCD (Liquid Crystal Display) panel, display device and terminal
CN109061956A (en) * 2018-09-29 2018-12-21 武汉华星光电技术有限公司 Display panel, display module and electronic device

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