CN205566333U - POE detection circuitry and POE detector - Google Patents
POE detection circuitry and POE detector Download PDFInfo
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- CN205566333U CN205566333U CN201620278768.XU CN201620278768U CN205566333U CN 205566333 U CN205566333 U CN 205566333U CN 201620278768 U CN201620278768 U CN 201620278768U CN 205566333 U CN205566333 U CN 205566333U
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Abstract
The utility model discloses a POE detection circuitry, include: the single chip circuit, respectively with singlechip circuit connection receive circuit and network detection circuit, give the single chip circuit, receive the power supply circuit of circuit and the power supply of network detection circuit. The utility model discloses still provide a POE detector that has above -mentioned POE detection circuitry. The utility model discloses on the basis of POE load test function of having integrateed, the function that the net gape detected has still integrateed.
Description
Technical field
This utility model relates to POE detection technique field, particularly relates to a kind of POE testing circuit and has the POE detector of this POE testing circuit.
Background technology
POE (Power Over Ethernet) refers in the case of existing Ethernet Cat.5 wiring architecture does not makes any changes, while for some IP-based terminals (such as IP telephone machine, wireless local network connecting point AP, web camera etc.) transmission data signal, moreover it is possible to the technology of direct current supply is provided for this kind equipment.POE is also referred to as electric power system (POL based on LAN, Power over LAN) or active Ethernet (Active Ethernet), the most also POE it is called for short, this is to utilize transmission data and the newest standards specification of electrical power while existing standard Ethernet transmission cable, and maintains the compatibility with existing Ethernet system and user.
POE technology is due to its easily installation, manageability, simplicity, safety, stability, extensibility and the principle that reuses, in fields such as domestic. applications, wireless networking, security protection, building management, retail, amusements, all there is huge application prospect, and promoted the development of association area.Being pushed further into of especially POE Plus enhancement techniques a, it is believed that change can be caused in association area.
Although the application of POE is more and more extensive, but not yet occur in prior art arranging net for POE the equipment effectively detected, the detection of POE supply standard, the detection of POE switch load capacity, network detection all cannot convenient effectively be carried out, mountain vallage POE switch in existing market is caused to spread unchecked, the problems such as POE powered products is lack of standardization.
Utility model content
For solving above-mentioned technical problem, the utility model proposes a kind of POE testing circuit and POE detector, this POE testing circuit, on the basis of being integrated with POE load testing function, is also integrated with the function of network interface detection.
The technical solution adopted in the utility model is, a kind of POE testing circuit of design, including: single chip circuit, the parasite power supplier being connected with single chip circuit respectively and network testing circuit, the power circuit powered to single chip circuit, parasite power supplier and network testing circuit.
Single chip circuit includes the ISP interface of AVR single chip and AVR single chip two-way communication, receives the display device of AVR single chip signal.
Parasite power supplier includes receiving the AF/AT switching relay of AVR single chip signal, receiving the RJ45 interface that the PD circuit of AF/AT switching relay signal, the ohmic load receiving PD circuit signal and instruction device are connected with PD circuit.
Network testing circuit includes the RJ45 interface that the ethernet circuit with AVR single chip two-way communication is connected with network transformer with the network transformer of ethernet circuit two-way communication.
Power circuit includes the reduction voltage circuit that battery is connected, the switch being connected between battery and reduction voltage circuit with battery, and reduction voltage circuit is respectively connecting to AVR single chip, AF/AT switching relay, ethernet circuit and AND circuit and powers.
Wherein, PD circuit and network transformer are connected on same RJ45 interface.
Preferably, single chip circuit also includes the clock circuit with AVR single chip two-way communication, the button being connected with AND circuit respectively with the AND circuit of AVR single chip and ethernet circuit two-way communication, and button is connected to the interrupt pin of AVR single chip by AND circuit.
Display device is LCD display and electroluminescent lamp, and instruction device is display lamp.
Ethernet circuit is by SPI interface and AVR single chip two-way communication.
In one embodiment, AVR single chip uses the master chip of ATmega644-20AU model, AF/AT switching relay uses Panasonic's relay of AGQ200A4H model, PD circuit uses the master chip of LT4275 model, ethernet circuit uses the master chip of AX88796C model, and reduction voltage circuit uses the master chip of ADP1706 model.
This utility model also proposes a POE detector with above-mentioned POE testing circuit.
Compared with prior art, parasite power supplier compatibility IEEE 802.3AF/AT standard of the present utility model, can determine whether the supply standard of POE power supply unit, connect in parasite power supplier and have ohmic load, the load capacity detection of POE switch can be carried out, the puppy parcs such as network testing circuit IC-compatible MP, ARP of the present utility model, it is applicable to the network detection of various end-to-end equipment, this utility model can be installed to a housing during use, form hand-held detection equipment, not only portable performance is good, can complete again the detection of POE properties efficiently.
Accompanying drawing explanation
Below in conjunction with embodiment and accompanying drawing, this utility model is described in detail, wherein:
Fig. 1 is the electrical block diagram of POE testing circuit；
Fig. 2 is the connection diagram of single chip circuit；
Fig. 3 is the connection diagram of button in single chip circuit；
Fig. 4 is the connection diagram of parasite power supplier；
Fig. 5 is the connection diagram of network testing circuit；
Fig. 6 is the connection diagram of power circuit；
Fig. 7 is the connection diagram of power circuit breaker in middle.
Detailed description of the invention
As it is shown in figure 1, the POE testing circuit that the utility model proposes, including: single chip circuit, the parasite power supplier being connected with single chip circuit respectively and network testing circuit, the power circuit powered to single chip circuit, parasite power supplier and network testing circuit.
As shown in Figure 2,3, single chip circuit includes: AVR single chip 110 and the ISP interface 111 of AVR single chip 10 two-way communication, the display device of reception AVR monolithic 110 signal, AVR single chip 110 carries out burning and the debugging of Single Chip Microcomputer (SCM) program by ISP interface 111.In this example it is shown that device is LCD display 109 and electroluminescent lamp 108, AVR single chip 110 controls LCD display 109 and the state of display lamp 108 display system operation.
Single chip circuit: also include the clock circuit with AVR single chip two-way communication, the button being connected with AND circuit respectively with the AND circuit of AVR single chip and ethernet circuit two-way communication.Wherein, AVR single chip 110 uses the master chip of ATmega644-20AU model, clock circuit 105 is provided clock by 16MHz crystal oscillator to AVR single chip 110, button 106 is connected as input to AND circuit 107, by being connected to the interrupt pin of AVR single chip 110 with door, AVR single chip receives the instruction of user's input by button 106.
As shown in Figure 4, parasite power supplier includes: receives the AF/AT switching relay 112 of AVR single chip 110 signal, receive the RJ45 interface 118 that the PD circuit 115 of AF/AT switching relay 112 signal, the ohmic load 114 receiving PD circuit 115 signal and instruction device are connected with PD circuit 115.Wherein, PD circuit 115 uses the master chip of LT4275 model, AF/AT switching relay uses Panasonic's relay of AGQ200A4H model, AVR single chip 110 by I/O port control AF/AT switching relay 112 switch PD circuit 115 by power mode (802.3at standard be subject to electric classification), by detection PSE repeatedly for power-off, draw power and the level of current PSE.
The mentality of designing of the POE system detection module of the present invention relates to according to POE work process.When arranging POE system in one network, the work process of POE system is as follows:
1, detection: at the beginning, POE system exports the least voltage at port, until it detects the receiving end equipment (PD end equipment) that connection is a support IEEE802.3af standard of cable terminations；
2, PD end device class: after receiving end equipment being detected, POE system may be classified for PD end equipment, and assesses the power attenuation needed for this PD end equipment；
3, starting power supply: within the starting period of a configurable time (generally less than 15 μ s), the power supply unit (PSE device) of POE system starts to power to PD end equipment from low-voltage, until providing the DC source of 48V；
4, power supply: the unidirectional current of reliable and stable 48V is provided for PD end equipment, meets the PD end equipment power consumption not across 15.4W；
5. power-off: if PD end equipment disconnects from network, PSE device will stop powering for PD end equipment rapidly (typically within 300～400ms), and whether duplicate detection process is connected to PD end equipment with the terminal of detection cable.
Five class netting twines of standard have four pairs of twisted-pair feeders, but only use in 10M BASE-T and 100M BASE-T therein two right.IEEE80 2.3af allows two kinds of usages, and when the idle foot of application is powered, 4,5 feet are connected as positive pole, and 7,8 feet are connected as negative pole.When application data pin is powered, D/C power is added in the midpoint of transmission transformer, does not affect the transmission of data.Line can be any polarity to 1,2 and line to 3,6 in this manner.
Standard does not allow to apply both the above situation simultaneously.Power supply provides equipment PSE device can only provide a kind of usage, but power supply application apparatus PD end equipment allows for adapting to two kinds of situations simultaneously.This standard regulation power supply is typically 48V, 13W.PD end equipment provides 48V to be easier to the conversion of low-voltage, but should have the insulation safety voltage of 1500V simultaneously.
Linear(insults Li Erte) product that model is LT4275 of company is pin compatibility IEEE 802.3 series and power supply unit (PD) controller of LTPoE++.The PSE controller internal charge pump that model is LT4275 can provide the solution of a N-channel MOS FET, can substitute bigger and more expensive P-channel MOSFET.Improve to low RDS (ON) MOSFET also limits electric power transmission and efficiency, reduce energy consumption and heat radiation, and simplify heat dissipation design.Surge current during startup is adjustable (by an external capacitive).This PSE controller also includes that a power supply well exports, resistor that plate is signed, undervoltage lockout and Thermal protection.
In the present embodiment, PD circuit (LT4275A/LT4275B) drives a single photoelectrical coupler, with the power level of the PSE device that instruction connects.Pin is optional, supports off-gauge low voltage operating.Auxiliary power covers and is supported by AUX pin.Photoelectrical coupler connects an instruction device, and this instruction device is status indicator lamp 113, and display lamp 113 shows that PD circuit 115 is to be operated in AF pattern or AT pattern.Ohmic load 114 is the pure resistive loads of parasite power supplier, to realize the load capacity detection of POE switch.During detection POE power supply unit, by netting twine, Devices to test is connected to RJ45 interface 118, POE power supply unit the direct current of 37 ~ 56V is provided to parasite power supplier.
As shown in Figure 5, network testing circuit: including the RJ45 interface 118 that the ethernet circuit 117 with AVR monolithic 110 two-way communication is connected with network transformer 116 with the network transformer 116 of ethernet circuit 117 two-way communication, RJ45 interface 118 is shared by network testing circuit and parasite power supplier.Wherein, ethernet circuit 117 uses the master chip of AX88796C model, by SPI interface and AVR single chip 110 two-way communication.The effect of network transformer 116 is isolated DC, transmission data, strengthens interference.
When carrying out ethernet interface circuit design, a lot of application scenarios especially hand-held network equipment needs to consider low power dissipation design, the trend of the miniaturization of the oriented encapsulation of IC the most in recent years, the best approach reducing chip pin number is i.e. to use serial line interface, being typically with SPI interface, this just requires to select suitable ethernet controller chip.Network control chip AX88796C is a for the embedded and network control chip of EPA application, and it is low in energy consumption, number of pins is few, and supports SPI or the Non-PCI interface of variable I/O running voltage, compatible multiple microprocessor.It uses 8/16 class SRAM or the address/data bus multiplex interface meeting industrywide standard, can be joined directly together with all kinds of conventional or high-order microcontroller, and need not add any external logic circuit.Additionally, network control chip AX88796C is also directed to the microprocessor possessing SPI host computer side interface, it is provided that one group of optional SPI simplifies hardware from machine interface and connects.The built-in 10/100M ethernet physical layer (PHY) meeting IEEE 802.3/IEEE 802.3u specification of network control chip AX88796C and MAC controller (MAC), integrated 14 KB SRAM network package bufferings, carry out the storage of package in an efficient manner, retrieve and revise.This module is the puppy parc such as IC-compatible MP, ARP in network test, it is adaptable to the network detection of end-to-end equipment.
As shown in Figure 6,7, power circuit includes: reduction voltage circuit 104 that battery 102 is connected with battery 102, the switch 103 being connected between battery 102 and reduction voltage circuit 104, reduction voltage circuit 104 is respectively connecting to AVR single chip 110, AF/AT switching relay 112, ethernet circuit 117 and AND circuit 107 and powers, and the power supply break-make of power circuit is by switching 103 controls.Wherein, battery 102 uses 9V aneroid battery, reduction voltage circuit 104 to be 3.3V, and reduction voltage circuit uses the master chip of ADP1706 model, and 9V aneroid battery 102 generates 3.3V by 3.3V reduction voltage circuit 104 and powers to other circuit.
This utility model also proposes a POE detector with above-mentioned POE testing circuit, including housing, being provided with POE testing circuit in housing, housing is provided with the installing port coordinated with LCD display 109, display lamp 108, status indicator lamp 113, button 106, switch 103, RJ45 interface 118, ISP interface 111 etc..
The foregoing is only preferred embodiment of the present utility model, not in order to limit this utility model, all any amendment, equivalent and improvement etc. made within spirit of the present utility model and principle, within should be included in protection domain of the present utility model.
Claims (7)
1. a POE testing circuit, including: single chip circuit, the parasite power supplier being connected with single chip circuit respectively and network testing circuit, the power circuit powered to single chip circuit, parasite power supplier and network testing circuit, it is characterised in that
Described single chip circuit includes AVR single chip and the ISP interface of described AVR single chip two-way communication, receives the display device of described AVR single chip signal；
Described parasite power supplier includes receiving the AF/AT switching relay of described AVR single chip signal, receiving the RJ45 interface that the PD circuit of described AF/AT switching relay signal, the ohmic load receiving described PD circuit signal and instruction device are connected with described PD circuit；
Described network testing circuit includes the RJ45 interface being connected with described network transformer with the ethernet circuit of described AVR single chip two-way communication with the network transformer of described ethernet circuit two-way communication；
Described PD circuit and described network transformer are connected on same RJ45 interface.
2. POE testing circuit as claimed in claim 1, it is characterized in that, described single chip circuit also includes the button being connected with the clock circuit of described AVR single chip two-way communication, respectively AND circuit with described AVR single chip and described ethernet circuit two-way communication with described AND circuit, and described button is connected to the interrupt pin of AVR single chip by AND circuit.
3. POE testing circuit as claimed in claim 2, it is characterized in that, described power circuit includes the reduction voltage circuit that battery is connected, the switch being connected between battery and reduction voltage circuit with battery, and described reduction voltage circuit is respectively connecting to AVR single chip, AF/AT switching relay, ethernet circuit and AND circuit and powers.
4. the POE testing circuit as described in any one of claims 1 to 3, it is characterised in that described display device is LCD display and electroluminescent lamp, described instruction device is display lamp.
5. the POE testing circuit as described in any one of claims 1 to 3, it is characterised in that described ethernet circuit is by SPI interface and described AVR single chip two-way communication.
6. POE testing circuit as claimed in claim 3, it is characterized in that, described AVR single chip uses the master chip of ATmega644-20AU model, described AF/AT switching relay uses Panasonic's relay of AGQ200A4H model, described PD circuit uses the master chip of LT4275 model, described ethernet circuit uses the master chip of AX88796C model, and described reduction voltage circuit uses the master chip of ADP1706 model.
7. one kind has the POE detector of POE testing circuit described in any of the above-described claim.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620278768.XU CN205566333U (en) | 2016-04-06 | 2016-04-06 | POE detection circuitry and POE detector |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620278768.XU CN205566333U (en) | 2016-04-06 | 2016-04-06 | POE detection circuitry and POE detector |
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| CN205566333U true CN205566333U (en) | 2016-09-07 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201620278768.XU Expired - Fee Related CN205566333U (en) | 2016-04-06 | 2016-04-06 | POE detection circuitry and POE detector |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108709583A (en) * | 2017-11-30 | 2018-10-26 | 江苏苏威尔科技有限公司 | Portable wireless or the data collector and its working method of USB connections |
| CN113009246A (en) * | 2019-12-20 | 2021-06-22 | 杭州海康威视数字技术股份有限公司 | PSE equipment detection device and PSE equipment detection method |
-
2016
- 2016-04-06 CN CN201620278768.XU patent/CN205566333U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108709583A (en) * | 2017-11-30 | 2018-10-26 | 江苏苏威尔科技有限公司 | Portable wireless or the data collector and its working method of USB connections |
| CN113009246A (en) * | 2019-12-20 | 2021-06-22 | 杭州海康威视数字技术股份有限公司 | PSE equipment detection device and PSE equipment detection method |
| CN113009246B (en) * | 2019-12-20 | 2024-02-02 | 杭州海康威视数字技术股份有限公司 | PSE device detection device and PSE device detection method |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160907 Termination date: 20170406 |
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| CF01 | Termination of patent right due to non-payment of annual fee |