CN205566251U - Protection circuit that MOS used is tied to super utmost point - Google Patents
Protection circuit that MOS used is tied to super utmost point Download PDFInfo
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- CN205566251U CN205566251U CN201620269837.0U CN201620269837U CN205566251U CN 205566251 U CN205566251 U CN 205566251U CN 201620269837 U CN201620269837 U CN 201620269837U CN 205566251 U CN205566251 U CN 205566251U
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Abstract
The utility model discloses a protection circuit that MOS used is tied to super utmost point, including resistance R1 and PWM IC1, resistance R1 establishes ties with high -tension electricity HV and R2 respectively, R2 establishes ties with diode Z1 and R5 respectively, electric capacity C2 connects in parallel in resistance R4, resistance R4 and resistance R3 are parallelly connected, electric capacity C3 and PWM IC1's common port electric connection, PWMIC1's another pin and 1 foot pin electric connection of IC1 comp, 1 foot pin of IC1 comp is connected with NPN type triode Q2 and NPN type triode Q3 respectively, electric capacity C2 connects the 1 foot pin in IC1 comp. The utility model discloses the circuit is used in single -stage PFC circuit, or in the general adapter can all, can solve coolMOS problem of the same kind, for the MOS with the specification, coolMOS RDS (ON) is little, has reduced the loss, has improved overall efficiency, can reduce the cost of product, accomplishes higher power density, realizes the excellent formula of product.
Description
Technical field
This utility model belongs to LED power technical field, particularly relates to the protection circuit of a kind of super knot MOS application, is specifically applied in the circuit that can use super knot MOS, protection super knot MOS.
Background technology
Along with the progress of technology, the development of present CoolMOS is little towards Rds (ON), and electric current is big, chip is little, and production technology is more ripe, and the direction that cost is lower is developed, but because chip area is little, the ability of its impact resistance electric current, the ability of avalanche resistance is as well as decline.Rush of current under high temperature and the sparking rush of current in production etc. can produce bad; in actual application; can therefore be restricted; the most serious customer complaint or indemnity is produced time more serious; in the case; the protection circuit of utility model one CoolMOS (super knot MOS), can be effectively protected CoolMOS. and effectively solve this problem.
Summary of the invention
This utility model utility model is to provide the protection circuit of a kind of super knot MOS application; the CoolMOS in single-stage PFC LED power (super knot MOS) is particularly applied to provide protection circuit; prevent MOS produce and test and client because of various more severe applicable cases under to MOS provide protection; collapse in the case of preventing CoolMOS therefore; and produce bad; fully use the excellent formula of CoolMOS, make competitive power of product strong.
To achieve these goals, this utility model adopts the technical scheme that
nullA kind of protection circuit of super knot MOS application,Including resistance R1 and PWM IC1,Described resistance R1 connects with high-tension electricity HV and R2 respectively,Described R2 connects with diode Z1 and R5 respectively,Described diode Z1 and R5 is in parallel,Described diode Z1 connects with resistance R10 and NPN type triode respectively,Described resistance R10 and NPN type triode Q2 are in parallel,Described resistance R10 connects with resistance R16,Described resistance R16 is in parallel with NPN type triode Q2,And resistance R16 is serially connected with NPN type triode Q3,Described resistance R16 is connected to ground wire,Two pins of described NPN type triode Q3 are connected with two pins of NPN type triode Q2,And another pin of described NPN type triode Q3 is connected to ground wire,Described R5 connects with resistance R4 and electric capacity C3 respectively,Described resistance R4 and electric capacity C2 series connection,Described electric capacity C2 is parallel to resistance R4,Described resistance R4 is in parallel with resistance R3,The common port of described electric capacity C3 and PWM IC (SD6**) is electrically connected with,Another pin of described PWM IC1 is electrically connected with IC1 Comp 1 foot pin,IC1 Comp 1 foot pin is connected with NPN type triode Q2 and NPN type triode Q3 respectively,Described electric capacity C2 is connected to IC1 Comp 1 foot pin.
Preferably, described resistance R3 is in parallel with electric capacity C12, and described electric capacity C12 is connected to ground wire and the common port of PWM IC1.
The protection circuit of a kind of super knot MOS application that this utility model provides; compared with LED circuit; this utility model preferably protects the CoolMOS voltage current impact in abnormal cases to MOS by the circuit increased; prevent transformator saturated; reduce the snowslide chance of CoolMOS, be effectively protected CoolMOS and be unlikely to damage;This utility model circuit is applied in single-stage PFC circuit, or can in general adapter, CoolMOS same problems can be solved, little relative to the MOS of same specification, CoolMOS RDS (ON), reduce loss, improve overall efficiency, the cost of product can be reduced, accomplish higher power density, it is achieved the excellent formula of product.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model.
Detailed description of the invention
Below in conjunction with the accompanying drawing in this utility model embodiment, the technical scheme in this utility model embodiment is clearly and completely described, it is clear that described embodiment is only a part of embodiment of this utility model rather than whole embodiments.
Refer to Fig. 1, this utility model adopts the technical scheme that
nullA kind of protection circuit of super knot MOS application,Including resistance R1 and PWM IC1,Described resistance R1 connects with high-tension electricity HV and R2 respectively,Described R2 connects with diode Z1 and R5 respectively,Described diode Z1 and R5 is in parallel,Described diode Z1 connects with resistance R10 and NPN type triode respectively,Described resistance R10 and NPN type triode Q2 are in parallel,Described resistance R10 connects with resistance R16,Described resistance R16 is in parallel with NPN type triode Q2,And resistance R16 is serially connected with NPN type triode Q3,Described resistance R16 is connected to ground wire,Two pins of described NPN type triode Q3 are connected with two pins of NPN type triode Q2,And another pin of described NPN type triode Q3 is connected to ground wire,Described R5 connects with resistance R4 and electric capacity C3 respectively,Described resistance R4 and electric capacity C2 series connection,Described electric capacity C2 is parallel to resistance R4,Described resistance R4 is in parallel with resistance R3,Described resistance R3 is in parallel with electric capacity C12,Described electric capacity C12 is connected to ground wire and PWM
The common port of IC1, the common port of described electric capacity C3 and PWM IC1 is electrically connected with, another pin of described PWM IC1 is electrically connected with IC1 Comp 1 foot pin, IC1 Comp 1 foot pin is connected with NPN type triode Q2 and NPN type triode Q3 respectively, and described electric capacity C2 is connected to IC1 Comp 1 foot pin.
This utility model preferably protects the CoolMOS voltage current impact in abnormal cases to MOS by the circuit increased, and prevents transformator saturated, reduces the snowslide chance of CoolMOS, is effectively protected CoolMOS and is unlikely to damage;This utility model adds lightning protection circuit can effectively protect MOS, in order to avoid MOS exceeds standard at voltage stress current stress, and damages.After 700V CoolMOS applies lightning prevention circuit, dropped to 574V by exceeding voltage stress 785V, 10% voltage stress requirement of design margin can be met completely;This utility model circuit is applied in single-stage PFC circuit, or can in general adapter, CoolMOS same problems can be solved, little relative to the MOS of same specification, CoolMOS RDS (ON), reduce loss, improve overall efficiency, the cost of product can be reduced, accomplish higher power density, it is achieved the excellent formula of product.
The above; it is only this utility model preferably detailed description of the invention; but protection domain of the present utility model is not limited thereto; any those familiar with the art is in the technical scope that this utility model discloses; conceive equivalent or change in addition according to the technical solution of the utility model and utility model thereof, all should contain within protection domain of the present utility model.
Claims (2)
- null1. the protection circuit of a super knot MOS application,Including resistance R1 and PWM IC1,It is characterized in that: described resistance R1 connects with high-tension electricity HV and R2 respectively,Described R2 connects with diode Z1 and R5 respectively,Described diode Z1 and R5 is in parallel,Described diode Z1 connects with resistance R10 and NPN type triode respectively,Described resistance R10 and NPN type triode Q2 are in parallel,Described resistance R10 connects with resistance R16,Described resistance R16 is in parallel with NPN type triode Q2,And resistance R16 is serially connected with NPN type triode Q3,Described resistance R16 is connected to ground wire,Two pins of described NPN type triode Q3 are connected with two pins of NPN type triode Q2,And another pin of described NPN type triode Q3 is connected to ground wire,Described R5 connects with resistance R4 and electric capacity C3 respectively,Described resistance R4 and electric capacity C2 series connection,Described electric capacity C2 is parallel to resistance R4,Described resistance R4 is in parallel with resistance R3,The common port of described electric capacity C3 and PWM IC1 is electrically connected with,Another pin of described PWM IC1 is electrically connected with IC1 Comp 1 foot pin,IC1 Comp 1 foot pin is connected with NPN type triode Q2 and NPN type triode Q3 respectively,Described electric capacity C2 is connected to IC1 Comp 1 foot pin.
- The protection circuit of a kind of super the most according to claim 1 knot MOS application, it is characterised in that: described resistance R3 is in parallel with electric capacity C12, and described electric capacity C12 is connected to ground wire and the common port of PWM IC1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201620269837.0U CN205566251U (en) | 2016-04-05 | 2016-04-05 | Protection circuit that MOS used is tied to super utmost point |
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CN201620269837.0U CN205566251U (en) | 2016-04-05 | 2016-04-05 | Protection circuit that MOS used is tied to super utmost point |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105656463A (en) * | 2016-04-05 | 2016-06-08 | 深圳市莱福德光电有限公司 | Protection circuit applied to super junction MOS (metal oxide semiconductor) |
-
2016
- 2016-04-05 CN CN201620269837.0U patent/CN205566251U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105656463A (en) * | 2016-04-05 | 2016-06-08 | 深圳市莱福德光电有限公司 | Protection circuit applied to super junction MOS (metal oxide semiconductor) |
CN105656463B (en) * | 2016-04-05 | 2023-08-15 | 深圳市莱福德光电有限公司 | Protection circuit for super-junction MOS application |
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Address after: 518102 Guangdong city of Shenzhen province Baoan District Xixiang Street Industrial Park Development Zone guwu Taihua Indus 14A building 4-5 floor Patentee after: Polytron Technologies Inc, Shenzhen Address before: 518102 Guangdong city of Shenzhen province Baoan District Xixiang Street Industrial Park Development Zone guwu Taihua Indus 14A building 4-5 floor Patentee before: Shenzhen Ledfriend Optoelectronics Co., Ltd. |
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CP01 | Change in the name or title of a patent holder |