CN205510224U - Digital image processing ware - Google Patents
Digital image processing ware Download PDFInfo
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- CN205510224U CN205510224U CN201620298394.8U CN201620298394U CN205510224U CN 205510224 U CN205510224 U CN 205510224U CN 201620298394 U CN201620298394 U CN 201620298394U CN 205510224 U CN205510224 U CN 205510224U
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Abstract
The utility model discloses a digital image processing ware, it includes imaging sensing ware acquisition of signal circuit, high -speed analog switch circuit, image processing circuit, the application processing circuit, imaging sensing ware acquisition of signal circuit includes image acquisition chip etc, first electric capacity, second electric capacity is connected with the image acquisition chip respectively, high -speed analog switch circuit includes high -speed switcher chip, third electric capacity, first resistance, third electric capacity, high -speed switcher chip is connected respectively to first resistance, image processing circuit includes image processor chip etc, including application processing ware chip in the application processing circuit. The utility model discloses low in production cost, the low power dissipation can accomplish that the level is corrected, bad point corrects, goes to go to make an uproar in halo effect, airspace, automatic white balance, automatic exposure gain control, auto focus, go mosaic, gamma curve, saturation chroma control, the adjustment of image special effect, the adjustment of colourity space smoothing degree.
Description
Technical field
This utility model relates to a kind of processor, particularly relates to a kind of Digital Image Processor.
Background technology
Existing realize Image Acquisition and process by specific ISP processor, mainly have following defect: apply on relative low-end product relatively costly；Actual product power consumption is bigger than normal；Do not repair on image procossing and compensate scheduling algorithm and process, there is the image quality problem such as image quality definition and contrast deviation.
Summary of the invention
Technical problem to be solved in the utility model is to provide a kind of Digital Image Processor, its production cost is low, low in energy consumption, level rectification, bad point rectification can be completed, go halo effect, spatial domain denoising, AWB, automatic exposure gain control, auto-focusing, demosaicing, gamma curve, saturation chroma control, the adjustment of image special-effect, chrominance space smoothness to adjust.
This utility model solves above-mentioned technical problem by following technical proposals: a kind of Digital Image Processor, it includes that image sensor signal acquisition circuit, high-speed analog switch circuit, image processing circuit, application process circuit, signal acquisition circuit connects high-speed analog switch circuit, high-speed analog switch circuit connection diagram picture processes circuit, and image processing circuit connects application and processes circuit；nullImage sensor signal acquisition circuit includes Image Acquisition chip、First electric capacity、Second electric capacity，First electric capacity、Second electric capacity is connected with Image Acquisition chip respectively，High-speed analog switch circuit includes speed-sensitive switch chip、3rd electric capacity、First resistance，3rd electric capacity、First resistance connects speed-sensitive switch chip respectively，Image processing circuit includes image processor chip、Second resistance、3rd resistance、4th electric capacity、5th electric capacity、6th electric capacity、7th electric capacity、8th electric capacity、9th electric capacity、Tenth electric capacity、11st electric capacity、12nd electric capacity、13rd electric capacity、14th electric capacity，4th electric capacity and the 5th electric capacity are in parallel，6th electric capacity and the 7th electric capacity are in parallel，6th electric capacity and the second resistance connect，8th electric capacity、9th electric capacity、Tenth electric capacity is the most in parallel，3rd resistance connects image processor chip，11st electric capacity、12nd electric capacity、13rd electric capacity、14th electric capacity is the most in parallel，Application processes circuit and includes application processor chip.
Preferably, described picture processing chip is that 32 RISC process chip.
Preferably, state image sensor signal acquisition circuit and a photographic head connects.
Preferably, described photographic head is the photographic head of the RAW image form that can support 5M and following MIPI interface.
Positive progressive effect of the present utility model is: this utility model production cost is low, low in energy consumption, level rectification, bad point rectification can be completed, go halo effect, spatial domain denoising, AWB, automatic exposure gain control, auto-focusing, demosaicing, gamma curve, saturation chroma control, the adjustment of image special-effect, chrominance space smoothness to adjust.
Accompanying drawing explanation
Fig. 1 is the fundamental diagram of this utility model Digital Image Processor.
Fig. 2 is the circuit diagram of the image sensor signal acquisition circuit in this utility model Digital Image Processor.
Fig. 3 is the circuit diagram of the high-speed analog switch circuit in this utility model Digital Image Processor.
Fig. 4 is the circuit diagram of the image processing circuit in this utility model Digital Image Processor.
Fig. 5 is the circuit diagram of the image processing circuit in this utility model Digital Image Processor.
Detailed description of the invention
Provide this utility model preferred embodiment below in conjunction with the accompanying drawings, to describe the technical solution of the utility model in detail.
As shown in Figures 1 to 5, this utility model Digital Image Processor includes that image sensor signal acquisition circuit, high-speed analog switch circuit, image processing circuit, application process circuit, signal acquisition circuit connects high-speed analog switch circuit, high-speed analog switch circuit connection diagram picture processes circuit, and image processing circuit connects application and processes circuit；nullImage sensor signal acquisition circuit includes Image Acquisition chip U1、First electric capacity C1、Second electric capacity C2，First electric capacity C1、Second electric capacity C2 is connected with Image Acquisition chip U1 respectively，High-speed analog switch circuit includes speed-sensitive switch chip U2、3rd electric capacity C3、First resistance R1，3rd electric capacity C3、First resistance R1 connects speed-sensitive switch chip U2 respectively，Image processing circuit includes image processor chip U3、Second resistance R2、3rd resistance R3、4th electric capacity C4、5th electric capacity C5、6th electric capacity C6、7th electric capacity C7、8th electric capacity C8、9th electric capacity C9、Tenth electric capacity C10、11st electric capacity C11、12nd electric capacity C12、13rd electric capacity C13、14th electric capacity C14，4th electric capacity C4 and the 5th electric capacity C5 is in parallel，6th electric capacity C6 and the 7th electric capacity C7 is in parallel，6th electric capacity C6 and the second resistance R2 connects，8th electric capacity C8、9th electric capacity C9、Tenth electric capacity C10 is the most in parallel，3rd resistance R3 connects image processor chip U3，11st electric capacity C11、12nd electric capacity C12、13rd electric capacity C13、14th electric capacity C14 is the most in parallel，Application processes circuit and includes application processor chip U4.
The chip model of Image Acquisition chip U1 can be GC2355.The chip model of speed-sensitive switch chip U2 can be FSA642.The chip model of image processor chip U3 can be AW6120.The chip model of application processor chip U4 can be MT6572.
Picture processing chip U3 is that 32 RISC process chip.
Image sensor signal acquisition circuit and a photographic head connect, so convenient collection image.Photographic head is the photographic head of the RAW image form that can support 5M and following MIPI interface.
Equipment work is divided into both of which, pattern one: park mode；Pattern two: mode of operation.
When equipment is in park mode, system is standby, the pending event such as at any time.
When equipment is in mode of operation, the RAW data that the transmission of image sensor signal acquisition circuit can be come by image processing circuit do algorithm process, completes to expect picture image quality, and is transferred to main control device and does related application.
Operation principle of the present utility model is as follows: the Main Function of Image Acquisition chip is the digital signal that the original image signal collected is converted to RAW form.Image sensor signal acquisition circuit takes figure by speed-sensitive switch chip type selecting, by MIPI(Mobile Industry Processor
Interface, mobile Industry Processor Interface) data of the original RAW form obtained are transferred to picture processing chip by line, picture processing chip generates the data of yuv format after being corrected by level rectification, bad point, gone the technical finesses such as halo effect, spatial domain denoising, AWB, automatic exposure gain control, auto-focusing, demosaicing, gamma curve, saturation chroma control, the adjustment of image special-effect, chrominance space smoothness adjustment, it is transferred to application processor chip by high speed MIPI, does final image and show or preservation action.
Particular embodiments described above; to of the present utility model solving the technical problem that, technical scheme and beneficial effect further described; it is it should be understood that; the foregoing is only specific embodiment of the utility model; it is not limited to this utility model; all within spirit of the present utility model and principle, any modification, equivalent substitution and improvement etc. done, within should be included in protection domain of the present utility model.
Claims (4)
1. a Digital Image Processor, it is characterized in that, it includes that image sensor signal acquisition circuit, high-speed analog switch circuit, image processing circuit, application process circuit, signal acquisition circuit connects high-speed analog switch circuit, high-speed analog switch circuit connection diagram picture processes circuit, and image processing circuit connects application and processes circuit；nullImage sensor signal acquisition circuit includes Image Acquisition chip、First electric capacity、Second electric capacity，First electric capacity、Second electric capacity is connected with Image Acquisition chip respectively，High-speed analog switch circuit includes speed-sensitive switch chip、3rd electric capacity、First resistance，3rd electric capacity、First resistance connects speed-sensitive switch chip respectively，Image processing circuit includes image processor chip、Second resistance、3rd resistance、4th electric capacity、5th electric capacity、6th electric capacity、7th electric capacity、8th electric capacity、9th electric capacity、Tenth electric capacity、11st electric capacity、12nd electric capacity、13rd electric capacity、14th electric capacity，4th electric capacity and the 5th electric capacity are in parallel，6th electric capacity and the 7th electric capacity are in parallel，6th electric capacity and the second resistance connect，8th electric capacity、9th electric capacity、Tenth electric capacity is the most in parallel，3rd resistance connects image processor chip，11st electric capacity、12nd electric capacity、13rd electric capacity、14th electric capacity is the most in parallel，Application processes circuit and includes application processor chip.
2. Digital Image Processor as claimed in claim 1, it is characterised in that described picture processing chip is that 32 RISC process chip.
3. Digital Image Processor as claimed in claim 1, it is characterised in that described image sensor signal acquisition circuit and a photographic head connect.
4. Digital Image Processor as claimed in claim 3, it is characterised in that described photographic head is the photographic head of the RAW image form supporting 5M and following MIPI interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620298394.8U CN205510224U (en) | 2016-04-12 | 2016-04-12 | Digital image processing ware |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620298394.8U CN205510224U (en) | 2016-04-12 | 2016-04-12 | Digital image processing ware |
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| CN205510224U true CN205510224U (en) | 2016-08-24 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201620298394.8U Expired - Fee Related CN205510224U (en) | 2016-04-12 | 2016-04-12 | Digital image processing ware |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109672876A (en) * | 2017-10-17 | 2019-04-23 | 福州瑞芯微电子股份有限公司 | Depth map processing unit and depth map processing unit |
| CN111866394A (en) * | 2018-06-15 | 2020-10-30 | Oppo广东移动通信有限公司 | Photographing method, photographing device, terminal and computer-readable storage medium |
| CN115776532A (en) * | 2021-09-07 | 2023-03-10 | 荣耀终端有限公司 | Method for capturing image in video and electronic equipment |
-
2016
- 2016-04-12 CN CN201620298394.8U patent/CN205510224U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109672876A (en) * | 2017-10-17 | 2019-04-23 | 福州瑞芯微电子股份有限公司 | Depth map processing unit and depth map processing unit |
| CN111866394A (en) * | 2018-06-15 | 2020-10-30 | Oppo广东移动通信有限公司 | Photographing method, photographing device, terminal and computer-readable storage medium |
| CN115776532A (en) * | 2021-09-07 | 2023-03-10 | 荣耀终端有限公司 | Method for capturing image in video and electronic equipment |
| CN115776532B (en) * | 2021-09-07 | 2023-10-20 | 荣耀终端有限公司 | Method for capturing images in video and electronic equipment |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160824 |
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| CF01 | Termination of patent right due to non-payment of annual fee |