CN205509990U - CMOS power amplifier matching circuit - Google Patents

CMOS power amplifier matching circuit Download PDF

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Publication number
CN205509990U
CN205509990U CN201620253938.9U CN201620253938U CN205509990U CN 205509990 U CN205509990 U CN 205509990U CN 201620253938 U CN201620253938 U CN 201620253938U CN 205509990 U CN205509990 U CN 205509990U
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CN
China
Prior art keywords
matching network
power amplifier
chip
match circuit
impedance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn - After Issue
Application number
CN201620253938.9U
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Chinese (zh)
Inventor
张科峰
任达明
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Wuhan Syntek Ltd
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Wuhan Syntek Ltd
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Priority to CN201620253938.9U priority Critical patent/CN205509990U/en
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Abstract

The utility model discloses a CMOS power amplifier matching circuit, CMOS power amplifier matching circuit includes the circuit board, set up outside the piece on the circuit board matching network and set up the power amplification NULL on the circuit board, power amplification NULL includes the interior matching network of high frequency power amplification ware, low frequency power amplification ware and piece, high frequency power amplifier with matching network connects in the piece, AF power amplifier with the piece outer matching network connect. The utility model discloses a but matching network and the outer matching network's of piece advantage in the CMOS power amplifier matching circuit bonding pad divide into high -frequency part and low frequency portion with PA, and wherein high -frequency part utilizes the interior matching network of piece to realize, has reduced the PCB design degree of difficulty, low frequency portion utilizes the outer matching network of piece, reaches relatively good performance.

Description

A kind of CMOS power amplifier match circuit
Technical field
This utility model relates to power amplification field, particularly relates to a kind of CMOS power amplifier match circuit.
Background technology
After entering 21 century, energy demand is more and more prominent with the contradiction of supply, and all trades and professions are all over the world Making every effort to accomplish that the high efficiency of the energy utilizes, this proposes the highest requirement to wireless lan communication lsi system, Cover the index that low-voltage, low-power consumption, high-performance, a series of comparisons such as lightweight, volume is little are harsh. At present, mobile communication equipment all uses number-design of mould hydrid integrated circuit, i.e. front radio-frequency to receive circuit part Being analog systems, the part after the A/D converter of rear end is digital display circuit.Due to low-voltage, low-power consumption and little The requirement of volume, becomes main flow by the digital circuit Single-Chip Integration of the analog radio frequency circuit of front end with rear end and becomes Gesture.Running voltage and the power consumption of digital display circuit can be made the lowest at present, and digital circuit low-voltage is not It is suitable for the work of analog radio frequency circuit, because the electricity as analog radio frequency circuit shares with back-end digital circuit During pressure, the dynamic range of radio circuit, the linearity, operating frequency and gain are limited being reduced by voltage. Power amplifier is positioned at the final stage of transmitter, and modulated signal is amplified to certain performance number by it, delivers to Antenna is launched, while ensureing that correlation receiver receives satisfied signal level, does not disturb and close on other The normal work of wireless communication system.Power amplifier decides the quality of output signal, along with communication system Development, power amplifier is for multimode, and multifrequency, high modulation bandwidth requires more and more higher.For merit For rate amplifier, matching network is the direct factor determining output size.
The output matching network of CMOS power amplifier at present, with two kinds of sheets of off-chip in basic employing sheet, interior Matching network is not suitable for low-frequency range, and off-chip matching network adds the design difficulty of PCB.
Utility model content
Based on this, this utility model provides a kind of CMOS power amplifier match circuit, can be in bonding pad Matching network and the advantage of off-chip matching network, be divided into HFS and low frequency part, wherein radio-frequency head by PA Point, in utilizing sheet, matching network realizes, and reduces PCB design difficulty;Low frequency part utilizes off-chip pair net Network, reaches reasonable performance.
A kind of CMOS power amplifier match circuit, described CMOS power amplifier match circuit includes electricity Road plate, the off-chip matching network being arranged on circuit board and the integrated core of power amplification being arranged on circuit board Sheet;The integrated chip of described power amplification includes interior of high frequency power amplifier, low-frequency power amplifier and sheet Distribution network, described high frequency power amplifier is connected with described interior matching network, described low-frequency power amplifier It is connected with described off-chip matching network.
Wherein in an embodiment, described interior matching network includes in sheet defeated in input matching network and sheet Go out matching network.
Wherein in an embodiment, described off-chip matching network includes that off-chip input matching network and off-chip are defeated Go out matching network.
Wherein in an embodiment, described interior input matching network is a conjugation matching network.
Wherein in an embodiment, described interior output matching network is mated by load balance factor.
Wherein in an embodiment, described off-chip output matching network includes load inductance and capacitance.
Wherein in an embodiment, described off-chip output matching network also includes a transformator, passes through transformation Load impedance is changed by device.
Wherein in an embodiment, described interior output matching network carries out band and leads to the signal of high frequency output Filtering.
Wherein in an embodiment, the electric capacity of described off-chip output matching network, inductance and transformator composition Band filter.
Wherein in an embodiment, the impedance of described conjugate impedance match network is identical with input impedance real part/imaginary part On the contrary.
Beneficial effect:
The utility model discloses a kind of CMOS power amplifier match circuit, described CMOS power amplification Device match circuit includes circuit board, be arranged on circuit board off-chip matching network and being arranged on circuit board The integrated chip of power amplification;The integrated chip of described power amplification includes high frequency power amplifier, low frequency power Matching network in amplifier and sheet, described high frequency power amplifier is connected with described interior matching network, institute State low-frequency power amplifier to be connected with described off-chip matching network.CMOS power amplifier of the present utility model Match circuit can matching network and the advantage of off-chip matching network in bonding pad, PA is divided into HFS with low Frequently part, wherein HFS, in utilizing sheet, matching network realizes, and reduces PCB design difficulty;Low frequency Part utilizes off-chip matching network, reaches reasonable performance.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of this utility model operation logic and use, below will be to operation In the technology of principle and use, the required accompanying drawing used is briefly described.It is clear that in describing below Accompanying drawing be only more of the present utility model run examples, for those of ordinary skill in the art, On the premise of not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the schematic diagram of this utility model a kind of CMOS power amplifier match circuit.
Detailed description of the invention
Below in conjunction with the accompanying drawing in this utility model operation logic, to the technology in this utility model embodiment Scheme is clearly and completely described, it is clear that described embodiment is only this utility model part Embodiment rather than whole embodiments.Based on the embodiment in this utility model, ordinary skill The every other embodiment that personnel are obtained under not making creative work premise, broadly falls into this practicality new The scope of type protection.
Refer to Fig. 1, a kind of CMOS power amplifier match circuit, CMOS power amplifier match circuit The off-chip matching network 100 including circuit board, being arranged on circuit board and the power being arranged on circuit board are put Big integrated chip;The integrated chip of power amplification includes high frequency power amplifier 302, low-frequency power amplifier 301 And matching network 200 in sheet, high frequency power amplifier 302 is connected with matching network in sheet 200, low frequency power Amplifier 301 is connected with off-chip matching network.
Wherein in an embodiment, described interior matching network includes in sheet defeated in input matching network and sheet Go out matching network.
It should be noted that it is defeated in input impedance and first in this sheet, input matching network includes first Going out impedance, in this first, input impedance includes an input signal source and in parallel with described input signal source Electric capacity C11, electric capacity C22, inductance L22 and a load impedance, and source-series with described input signal An inductance L11, this first internal output impedance includes a load impedance.
It should be noted that output matching network is defeated in including second interior input impedance and second in this sheet Going out impedance, this second interior input impedance includes an input signal source and in parallel with described input signal source An inductance L33 and electric capacity C33 of series connection, and a load impedance in parallel with described input signal source, should Second internal output impedance includes an output impedance.
In the present embodiment, by the output matching network of PA is modified, in bonding pad matching network with The advantage of off-chip matching network, is divided into PA HFS and low frequency part, wherein HFS, utilizes sheet Interior matching network realizes, and reduces PCB design difficulty.
Wherein in an embodiment, described off-chip matching network includes that off-chip input matching network and off-chip are defeated Go out matching network.
It should be noted that in the present embodiment, off-chip input matching network includes the outer input impedance of first With export impedance outside first, wherein, the outer input impedance of described first includes the first impedance, described first Impedance is connected with a signal source, exports impedance and include the second impedance outside first, in parallel with described second impedance A load impedance, wherein, described load impedance includes an inductance L1 and described LC in parallel for inductance L1 Oscillation circuit and the inductance L4 connected with described inductance and inductance L5, described LC oscillation circuit includes successively Electric capacity C1, inductance L2, electric capacity C2, electric capacity C3, electric capacity C4 and the inductance L3 connected.
It addition, off-chip output matching network includes the second off-chip input impedance and the output impedance of the second off-chip, its In, the second off-chip input impedance includes an input signal source and the impedance being connected with described input signal source, Second off-chip output impedance includes a load impedance and two electric capacity being connected in series in described load impedance C5, C6, two inductance L6 and L7 in parallel with electric capacity C5 and C6.
It should be noted that in the present embodiment, described low frequency part utilizes off-chip matching network, reaches ratio Preferably performance.
Wherein in an embodiment, described interior input matching network is a conjugation matching network.
It should be noted that in the present embodiment, in the case of signal source is given, output depends on The ratio of load resistance and singal source resistance, when both are equal, output is maximum.The concept of impedance matching can To be generalized to alternating current circuit, when load impedance is conjugated with genertor impedance, it is possible to realize the maximum biography of power It is defeated, if load impedance is unsatisfactory for the condition of conjugate impedance match it is necessary to add a resistance between load and signal source Resistance switching network, is transformed to the conjugation of genertor impedance, it is achieved impedance matching by load impedance.
Wherein in an embodiment, described interior output matching network is mated by load balance factor.
Wherein in an embodiment, described off-chip output matching network includes load inductance and capacitance.
It should be noted that block capacitor is in order that the isolation between two circuit, but it undertakes again simultaneously The function of transmission signal, the transmission the biggest loss of signal of signal electric capacity is the least, and capacity is conducive to greatly low frequency The transmission of signal.
Wherein in an embodiment, described off-chip output matching network also includes a transformator, passes through transformation Load impedance is changed by device.
Wherein in an embodiment, described interior output matching network carries out band and leads to the signal of high frequency output Filtering.
Wherein in an embodiment, the electric capacity of described off-chip output matching network, inductance and transformator composition Band filter.
Wherein in an embodiment, the impedance of described conjugate impedance match network is identical with input impedance real part, The value that imaginary part is contrary.
It should be noted that band filter is that a ripple allowing special frequency channel is by shielding other frequencies simultaneously The equipment of section, band filter refers to by the frequency component in a certain frequency range but by other scopes Frequency component decay to the wave filter of extremely low level, relative with the concept of band elimination filter.One analog band The example of bandpass filter is RLC resistance-inductance-capacitance circuit (RLC circuit).These wave filter can also use low pass Wave filter produces with high pass filter combination.By multiple electric capacity, inductance and change in this utility model embodiment Depressor composition RLC oscillation circuit, forms a band filter with equivalence.
It should be noted that be conjugate impedance match for input matching network, only need to be by 50 Ω conversions of input For identical with input impedance real part, the contrary value of imaginary part but owing to being Broadband Matching, therefore simply by electricity Hold in-10dB the circle that the combination with inductance makes in working frequency range internal impedance reaches Smith's artwork, low frequency portion The matching network divided is off-chip matching network, and wherein Ω is angular frequency, and Q-value is quality factor, if therefore thinking The relative bandwidth reaching bigger is accomplished by reducing the Q-value of inductance, therefore in input matching network part, electricity Feel resistance of additionally having connected.Owing to initial S11 distance-10dB impedance circle is far, the most first one inductance of series connection It is connected in parallel with a capacitor and changes the imaginary part of input impedance so that S11 is closer to-10dB circle.Again by series connection In one capacitor and inductor series branch makes full frequency band, some S11 enters in-10dB circle.The most in parallel In one capacitor and inductor parallel branch makes the circle that S11 remainder enters-10dB.
Needing to carry out load balance factor coupling for output network, output loading needs to reach optimum impedance could be real The matching network of existing maximum output HFS is matching network in sheet, due to the output matching of low frequency Network simply adds load inductance and capacitance, and is changed for the inductance of 50 Ω by transformator, The output matching network of HFS is the most only discussed in detail.Output matching network is to utilize bandpass filtering The principle of device utilizes transformator and electric capacity, and inductance is equivalent to a band filter, thus obtains reasonable Gain flatness.Utilize the main coil of transformator as load inductance thus in reducing sheet shared by passive device Area.
The utility model discloses a kind of CMOS power amplifier match circuit, described CMOS power amplification Device match circuit includes circuit board, be arranged on circuit board off-chip matching network and being arranged on circuit board The integrated chip of power amplification;The integrated chip of described power amplification includes high frequency power amplifier, low frequency power Matching network in amplifier and sheet, described high frequency power amplifier is connected with described interior matching network, institute State low-frequency power amplifier to be connected with described off-chip matching network.CMOS power amplifier of the present utility model Match circuit can matching network and the advantage of off-chip matching network in bonding pad, PA is divided into HFS with low Frequently part, wherein HFS, in utilizing sheet, matching network realizes, and reduces PCB design difficulty;Low frequency Part utilizes off-chip matching network, reaches reasonable performance.
It should be noted that the described unit illustrated as separating component can be or may not be physics Upper separate.Some or all of unit therein can be selected according to the actual needs new to realize this practicality The purpose of type embodiment scheme.
It addition, each functional unit in each embodiment of this utility model can be integrated in a chip unit In, it is also possible to it is that unit is individually physically present, it is also possible to two or more unit are integrated in one On unit.Above-mentioned integrated unit both can realize to use the form of hardware, it would however also be possible to employ software function list The form of unit realizes.If described integrated unit realizes and as independent using the form of SFU software functional unit When production marketing or use, can be stored in a computer read/write memory medium.Based on such reason Solve, part that prior art is contributed by the technical solution of the utility model the most in other words or this skill Completely or partially can embodying with the form of software product of art scheme.
Being described in detail this utility model operation logic above, the explanation of above-mentioned operation logic is simply used In helping understanding method of the present utility model and core concept thereof;General technology people simultaneously for this area Member, according to thought of the present utility model, the most all will change, To sum up, this specification content should not be construed as restriction of the present utility model.

Claims (10)

1. a CMOS power amplifier match circuit, it is characterised in that described CMOS power amplifier match circuit includes circuit board, the off-chip matching network that is arranged on circuit board and the integrated chip of power amplification being arranged on circuit board;
The integrated chip of described power amplification includes that matching network in high frequency power amplifier, low-frequency power amplifier and sheet, described high frequency power amplifier are connected with described interior matching network, and described low-frequency power amplifier is connected with described off-chip matching network.
A kind of CMOS power amplifier match circuit the most according to claim 1, it is characterised in that described interior matching network includes in sheet output matching network in input matching network and sheet.
A kind of CMOS power amplifier match circuit the most according to claim 1, it is characterised in that described off-chip matching network includes off-chip input matching network and off-chip output matching network.
A kind of CMOS power amplifier match circuit the most according to claim 2, it is characterised in that described interior input matching network is a conjugation matching network.
A kind of CMOS power amplifier match circuit the most according to claim 2, it is characterised in that described interior output matching network is mated by load balance factor.
A kind of CMOS power amplifier match circuit the most according to claim 3, it is characterised in that described off-chip output matching network includes load inductance and capacitance.
A kind of CMOS power amplifier match circuit the most according to claim 3, it is characterised in that described off-chip output matching network also includes a transformator, is changed load impedance by transformator.
A kind of CMOS power amplifier match circuit the most according to claim 2, it is characterised in that described interior output matching network carries out bandpass filtering to the signal of high frequency output.
A kind of CMOS power amplifier match circuit the most according to claim 3, it is characterised in that the electric capacity of described off-chip output matching network, inductance and transformator composition band filter.
A kind of CMOS power amplifier match circuit the most according to claim 4, it is characterised in that the impedance of described conjugate impedance match network is identical with input impedance real part, imaginary part is contrary.
CN201620253938.9U 2016-03-30 2016-03-30 CMOS power amplifier matching circuit Withdrawn - After Issue CN205509990U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620253938.9U CN205509990U (en) 2016-03-30 2016-03-30 CMOS power amplifier matching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620253938.9U CN205509990U (en) 2016-03-30 2016-03-30 CMOS power amplifier matching circuit

Publications (1)

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CN205509990U true CN205509990U (en) 2016-08-24

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105656436B (en) * 2016-03-30 2018-06-26 武汉芯泰科技有限公司 A kind of CMOS power amplifier match circuit
CN116029250A (en) * 2023-03-27 2023-04-28 香港中文大学(深圳) Design method of oscillator circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105656436B (en) * 2016-03-30 2018-06-26 武汉芯泰科技有限公司 A kind of CMOS power amplifier match circuit
CN116029250A (en) * 2023-03-27 2023-04-28 香港中文大学(深圳) Design method of oscillator circuit

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AV01 Patent right actively abandoned
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Granted publication date: 20160824

Effective date of abandoning: 20180626