CN205489504U

CN205489504U - A anti high tension protection circuit for low pressure voltage measurement circuit

Info

Publication number: CN205489504U
Application number: CN201620114721.XU
Authority: CN
Inventors: 姚宏
Original assignee: Beijing Const Instruments Technology Inc
Current assignee: Beijing Const Instruments Technology Inc
Priority date: 2016-02-04
Filing date: 2016-02-04
Publication date: 2016-08-17
Anticipated expiration: 2026-02-04

Abstract

The utility model provides an anti high tension protection circuit for low pressure voltage measurement circuit, including voltage input end and voltage output end, the withstand voltage circuit of series connection between voltage input end and voltage output end, and be connected to the pressure limiting circuit of voltage output end, withstand voltage circuit is including having the first input end, the first withstand voltage unit of first output with the second input has, the withstand voltage unit of second of second output, the withstand voltage unit of first withstand voltage unit and second still includes between first input end and the first output or the N channel depletion type FET of the withstand voltage device of conduct that connects gradually between second input and second output pipe and as the N channel JFET pipe of current -limiting device. The utility model discloses the electric current is little during circuit protective, the consumption is little, withstand voltage circuit accessible establish ties wantonly first withstand voltage unit and/or the withstand voltage unit of second satisfy higher withstand voltage requirement, are convenient for expand withstand voltage scope, and the configuration is nimble.

Description

A kind of anti-high tension protection circuit for low voltage voltage measuring circuit

Technical field

This utility model belongs to electronic circuit technology field, is specifically related to a kind of low tension in low-voltage detection system The anti-high tension protection circuit of pressure measuring circuit.

Background technology

Anti-high tension protection circuit is frequently used in the low-voltage detection system such as low-voltage electronic equipment, measuring instruments, low to protect Encroaching on of the pressure constant high-pressure that is not likely to occur of tension measuring circuit part or instantaneous high pressure.The most high-precision measuring instrument Table antagonism high tension protection circuit is had higher requirement, owing to this circuit is usually used in the importation of measuring circuit, thus uncommon Hope that this circuit has little impedance, low noise and fast-response and No leakage electric current, without characteristics such as DC errors.

The most as shown in Figure 3, it is by diode CR5, negative clamp voltage unit and diode for current anti-high tension protection circuit Pressure limiting circuit and the resistance to piezoresistance of CR6, positive clamp voltage unit composition are constituted, and outfan OUT2 connects low-voltage circuit, resistance to piezoresistance R1 is generally fixed resistance, when input voltage exceedes clamp voltage, has electric current and flows through the R1 of resistance to piezoresistance, thus will exceed clamper The voltage of voltage drops on resistance to piezoresistance, it is ensured that high pressure will not injure low-voltage circuit.Although this circuit is simple, but this circuit tool Having input impedance high, low-response, when having bigger thermal noise and shield, power consumption is big, the shortcoming that can generate heat.

As shown in Figure 4, Authorization Notice No. is the open a kind of over-current over-voltage protection electricity of utility model of CN 203813406U Road, including three depletion type MOSs FET pipe Q5, Q6 and Q7 and two-stage sample circuit, wherein, first order sample circuit is by voltage stabilizing Diode D1 is constituted, and second level voltage sampling circuit is made up of resistance R2, the source electrode of MOSFET pipe Q5 and the source of MOSFET pipe Q6 The most connected, the drain electrode of MOSFET pipe Q5 connects high level, and the drain electrode of MOSFET pipe Q6 connects low level, the grid of MOSFET pipe Q5 with The drain electrode of MOSFET pipe Q6 is electrical connected, and the drain electrode of MOSFET pipe Q7 is connected with the drain electrode of MOSFET pipe Q5, MOSFET pipe Q6's Grid is connected to the high level end of second level voltage sampling circuit, and the grid of MOSFET pipe Q7 is connected to first order voltage sample electricity The high level end on road, the grid voltage of the Q6 grid voltage higher than Q7；This circuit structure is simple, uses MOSFET pipe to replace fixing Resistance, as resistance to voltage device, overcomes the defect of the conventional anti-high tension protection circuit shown in Fig. 3, and by selecting different grids Voltage sample point is adapted to different voltage ranges.But, it yet suffers from following deficiency: (1) this circuit is at the protection initial stage Having a biggest current impulse of mA level, power consumption is big, easily causes circuit and damages；(2) this circuit needs two are pressure Device realizes pressure function, space and cost as one group and all can improve；Pressure it is limited in scope, is not easy to extension.

Utility model content

In order to solve the problems referred to above, the purpose of this utility model is to provide a kind of anti-high voltage protective electricity for low-voltage circuit Road, this circuit is be applicable to the tension measuring circuit of various scopes, and when shielding, power consumption is little, and is easy to extend pressure model Enclose, flexible configuration.

Above-mentioned purpose of the present utility model is realized by techniques below scheme:

A kind of anti-high tension protection circuit for low voltage voltage measuring circuit, including voltage input end and voltage output end, And be connected on the voltage holding circuit between described voltage input end and voltage output end, and it is connected to the limit of described voltage output end Volt circuit, described voltage output end is connected to low voltage voltage measuring circuit, described voltage holding circuit include having first input end and First pressure unit of the first outfan and/or there is the second pressure unit of the second input and the second outfan, wherein:

First pressure unit is additionally included between first input end and the first outfan the resistance to voltage device of the conduct being sequentially connected with N-channel depletion type FET pipe and N-channel JFET as current limiting device manage, the drain electrode of N-channel depletion type FET pipe is connected to the One input, the source electrode of N-channel depletion type FET pipe is connected with the drain electrode of N-channel JFET pipe, the grid of N-channel depletion type FET pipe Being connected with the grid of N-channel JFET pipe, the grid of N-channel depletion type FET pipe connects with the junction of the grid of N-channel JFET pipe again Receiving the source electrode of N-channel JFET pipe, the source electrode of N-channel JFET pipe is connected to the first outfan；

Second pressure unit be additionally included in be sequentially connected with between the second input and the second outfan as current limiting device N-channel JFET pipe and N-channel depletion type FET as resistance to voltage device manage, the source electrode of N-channel JFET pipe connects the second input End, the drain electrode of N-channel JFET pipe is connected with the source electrode of N-channel depletion type FET pipe, and the grid of N-channel JFET pipe exhausts with N-channel The grid of type FET pipe connects, and the junction of the grid of N-channel JFET pipe and the grid of N-channel depletion type FET pipe is connected to N The source electrode of raceway groove JFET pipe, the drain electrode of N-channel depletion type FET pipe is connected to the second outfan；

In described voltage holding circuit, one or more first pressure unit and/or one or more second pressure unit can Arbitrarily it is connected in series between described voltage input end and voltage output end.

In the above-mentioned anti-high tension protection circuit for low voltage voltage measuring circuit, in described voltage holding circuit, one First pressure unit and a second pressure unit are composed in series pressure unit group, and one or more pressure unit groups are connected in series Between described voltage input end and voltage output end.

In the above-mentioned anti-high tension protection circuit for low voltage voltage measuring circuit, described first pressure unit and second Pressure unit also includes the protection circuit being made up of stabilivolt, the source electrode of the anode of stabilivolt and N-channel JFET pipe and grid Junction is connected, the source electrode of the negative electrode of stabilivolt and N-channel depletion type FET pipe and the junction phase of the drain electrode of N-channel JFET pipe Even, described mu balanced circuit protection N-channel JFET pipe is not damaged by instantaneous high pressure.

In the above-mentioned anti-high tension protection circuit for low voltage voltage measuring circuit, described pressure limiting circuit includes by just clamping Position voltage cell is connected with the negative electrode of the first diode and the positive pressure limiting circuit that formed and negative clamp voltage unit and the two or two The negative pressure limiting circuit that the anode of pole pipe is connected and is formed, wherein, the anode of described first diode and the negative electrode of the second diode Linking together, the junction of the anode of the first diode and the negative electrode of the second diode is connected to described voltage output end.

Of the present utility model have the technical effect that (1) select there is the least saturated drain-source electrode current I_DSSN-channel JFET Pipe produces grid voltage when shielding, such as MMBF4117, its I_DSSRepresentative value only has 30 μ A, and maximum is less than 90 μ A, Need not as the utility model that Authorization Notice No. is CN 203813406 U, need additionally to increase by a road voltage holding circuit produce Give birth to gate voltage signal during protection, thus reduced cost and power consumption, it is easy to accomplish miniaturization；(2) rising of this circuit is protected Protective current little (< 90 μ A) during effect, so power consumption is little when shielding, therefore pressure pipe can encapsulate with selection of small, Be conducive to reducing the impact of thermo-electromotive force (Thermal EMF), it is adaptable to high-accuracy voltage is measured especially small signal and surveyed In amount circuit；(3) voltage holding circuit of the present utility model can meet higher resistance to pressure request, just by pressure unit of arbitrarily connecting In extending its pressure scope, flexible configuration.

Accompanying drawing explanation

Fig. 1 is the circuit diagram of embodiment 1 of the present utility model；

Fig. 2 is the circuit diagram of embodiment 2 of the present utility model；

Fig. 3 is the one anti-high tension protection circuit figure of prior art；

Fig. 4 is the schematic diagram of the embodiment of overcurrent-overvoltage protecting circuit of the prior art；

Fig. 5 is the test circuit diagram of embodiment 1；

Fig. 6 is the measurement result figure of test 1；

Fig. 7 is the measurement result figure of test 2；

Fig. 8 is the measurement result figure of test 3；

Fig. 9 is the measurement result figure of test 4.

In figure, reference is expressed as:

VH1: voltage input end of the present utility model, VL1: earth terminal, OUT1: voltage output end of the present utility model； CR1, CR2: stabilivolt, A1, A2: stabilivolt anode, C1, C2: stabilivolt negative electrode；U1, U3: negative clamp voltage unit, U2, U4: Positive clamp voltage unit, CR3, CR4, CR5, CR6: diode；Q1, Q2:N raceway groove JFET manages, Q3, Q4:N channel depletion type FET Pipe, the grid of G1, G2:N raceway groove JFET pipe, the grid of G3, G4:N channel depletion type FET pipe, the source of S1, S2:N raceway groove JFET pipe Pole, the source electrode of S3, S4:N channel depletion type FET pipe, the drain electrode of D1, D2:N raceway groove JFET pipe, D31, D32, D41, D42:N raceway groove The drain electrode of depletion type FET pipe；R1: resistance, OUT2: the outfan in prior art circuits；

Q5, Q6, Q7: depletion type MOS FET manages, R2: resistance, CR7: Zener diode；

K: circuit tester, VIN: oscillographic passage 1, VOUT: oscillographic passage 2.

Detailed description of the invention

Below in conjunction with the drawings and specific embodiments, this utility model is used for the anti-high voltage protective of low voltage voltage measuring circuit Circuit is described in detail.

Fig. 1 is the circuit diagram of this utility model embodiment 1, also show principle of the present utility model.As it is shown in figure 1, Anti-high tension protection circuit of the present utility model includes voltage input end VH1 and voltage output end OUT1, and it is defeated to be connected on voltage Enter between end and voltage output end, include the first pressure unit and the voltage holding circuit of the second pressure unit, and it is defeated to be connected to voltage Going out the pressure limiting circuit of end, voltage output end connects low voltage voltage measuring circuit.New to this practicality below by specific embodiment The technical scheme of type describes in detail.

Embodiment 1:

As it is shown in figure 1, voltage holding circuit includes the first pressure unit with first input end and the first outfan and has Second input and the second pressure unit of the second outfan, wherein:

First pressure unit is additionally included between first input end and the first outfan the resistance to voltage device of the conduct being sequentially connected with N-channel depletion type FET pipe Q3 and as the N-channel JFET pipe Q1 of current limiting device, the drain electrode of N-channel depletion type FET pipe Q3 D31, D32 are connected to first input end, and the source S 3 of N-channel depletion type FET pipe Q3 is with the drain D 1 of N-channel JFET pipe Q1 even Connecing, the grid G 3 of N-channel depletion type FET pipe Q3 is connected with the grid G 1 of N-channel JFET pipe Q1, N-channel depletion type FET pipe Q3's The junction of the grid G 1 of grid G 3 and N-channel JFET pipe Q1 is connected to the source S 1 of N-channel JFET pipe Q1, N-channel JFET The source S 1 of pipe Q1 is connected to the second outfan.

In order to protect the N-channel JFET pipe Q1 in the first pressure unit will not be damaged by instantaneous high pressure, the first pressure unit There also is provided the protection circuit being made up of stabilivolt CR1, the anode A 1 of stabilivolt CR1 and the source electrode of N-channel depletion type FET pipe Q3 It is connected with the junction of grid, the drain electrode of the negative electrode C1 of stabilivolt CR1 and N-channel JFET pipe Q1 and N-channel depletion type FET pipe Q3 Source electrode junction be connected.

Second pressure unit be additionally included in be sequentially connected with between the second input and the second outfan as current limiting device N-channel JFET pipe Q2 and as resistance to voltage device N-channel depletion type FET pipe Q4, N-channel JFET pipe Q2 source electrode connect second Input, the source electrode of the drain electrode of N-channel JFET pipe and N-channel depletion type FET pipe Q4 be connected, the grid of N-channel JFET pipe Q2 It is connected with the grid of N-channel depletion type FET pipe Q4, the grid of N-channel JFET pipe Q2 and the grid of N-channel depletion type FET pipe Q4 Junction be connected to the source electrode of N-channel JFET pipe Q2, the source electrode of N-channel JFET pipe Q2 is connected to the second input.

Equally, in order to the N-channel JFET pipe Q2 in the second pressure unit will not be damaged by instantaneous high pressure, the second pressure unit There also is provided the protection circuit being made up of stabilivolt CR2, the anode A 2 of stabilivolt CR2 and the source electrode of N-channel JFET pipe Q1 and grid The junction of pole is connected, the source electrode of the negative electrode C2 of stabilivolt CR1 and N-channel depletion type FET pipe Q3 and the leakage of N-channel JFET pipe Q2 The junction of pole is connected.

In above-mentioned voltage holding circuit, the first pressure unit and the second pressure unit be connected in series in voltage input end VH1 and Between voltage output end OUT1, the first input end of the i.e. first pressure unit is connected to voltage input end VH1, the first pressure unit The first outfan and the second pressure unit the second input be connected, the second outfan of the second pressure unit is connected to voltage Outfan OUT1.

The positive pressure limiting that pressure limiting circuit includes being connected by the negative electrode of positive clamp voltage unit U4 and the first diode CR4 and formed The negative pressure limiting circuit that the anode of circuit and negative clamp voltage unit U3 and the second diode U3 is connected and is formed, wherein, first The anode of diode CR4 and the negative electrode of the second diode CR3 link together, the anode of the first diode CR4 and the two or two pole The junction of the negative electrode of pipe CR3 is connected to voltage output end OUT1.

Above-mentioned in the anti-high tension protection circuit of low voltage voltage measuring circuit, N-channel depletion type FET pipe Q3, N-channel consume Type FET pipe Q4 to the greatest extent is N-channel depletion type FET pipe, and operating frequency is high, and noise is little, N-channel depletion type FET pipe during normal work Grid and source electrode between voltage be zero, whole circuit is held on, and leads unlike enhancement mode MOSFET pipe it is also required to provide one Energising pressure.

Above-mentioned in the anti-high tension protection circuit of low voltage voltage measuring circuit, N-channel JFET pipe Q1 and N-channel JFET pipe Q2 is N-channel technotron, and it is as current limiting device, and this device is the most in the conduction state, flows through when not having electric current Time, its conducting resistance is the least, if having electric current to flow through and this electric current is close to its saturated drain-source electrode current I_DSSTime, it turns on resistance Anti-meeting increases rapidly, therefore consisting of current-limiting circuit protective current when shielding is little and normal condition conducting resistance The least, it is suitable for anti-high tension protection circuit.

During normal signal input, because diode CR3, CR4 of pressure limiting circuit are in cut-off state, electric current is not had to flow through (owing to voltage holding circuit is complete floating structure, not having leakage current in theory, the electric current that it flows through is by diode in pressure limiting circuit The reverse current of CR3 or CR4 and the leakage current of tension measuring circuit protected determine, by well-designed can be by above-mentioned Two kinds of electric currents are limited in pA level, and each group of the conducting resistance of this voltage holding circuit is less than 5kohm, so the voltage error produced exists 10nV level, considers further that the standing part of leakage current can eliminate when calibration, so actual error is up to nV level, this is much smaller than heat The error that electromotive force (Thermal EMF) brings, nearly three orders of magnitude of difference, therefore without considering), thus there is no electric current stream yet Cross N-channel JFET pipe Q1 and N-channel JFET pipe Q2, the voltage between the grid source electrode of the two technotron of voltage holding circuit Equal to zero volt, the two N-channel JFET pipe turns on, owing to not having electric current to flow through, between the drain electrode of this technotron and source electrode Voltage equal so that the voltage between pressure N-channel depletion type FET pipe Q3, Q4 grid source electrode is also zero volt, due to N Channel depletion type FET pipe Q3 and Q4 is depletion type pipe, when the voltage between grid source electrode is zero volt, also deposits between drain electrode and source electrode At conducting channel, therefore N-channel depletion type FET pipe Q3 and Q4 is in the conduction state.

When having positive high voltage or negative high voltage occurs, this anti-high tension protection circuit plays a protective role, and is described in detail below and works as The work process of this circuit when both of these case occurs.

When have occur more than the high pressure of positive clamp voltage unit U4 voltage time, have electric current and flow through this circuit, successively from N ditch Road depletion type FET pipe Q3, N-channel JFET pipe Q1, N-channel JFET pipe Q2 are to N-channel depletion type FET pipe Q4, limit circuit simultaneously Diode CR4 conducting, and diode CR3 cut-off, current direction positive clamp voltage unit U4, the diode CR3 of this circuit and Diode CR4 should select the diode that reverse current is extremely low, and during conducting, pressure drop is about+0.7 volt, the most now N-channel depletion type The drain D 41 of FET pipe Q4, D42 electrode potential are maintained at (U4+0.7) volt, and the voltage of the raised area then falls in N-channel depletion type FET On pipe Q3, N-channel JFET pipe Q1, N-channel JFET pipe Q2 and N-channel depletion type FET pipe Q4；Along with voltage increases, this protection electricity Electric current in road also can increase, when electric current is increased close to the saturated drain-source electrode current I of N-channel JFET pipe Q1_DSSTime, N-channel The drain-source voltage V of JFET pipe Q1_DSWill increase sharply, the voltage V between the grid of N-channel depletion type FET pipe Q3, source electrode_GS Quickly increasing to negative direction, the impedance of N-channel depletion type FET pipe Q3 will increase, thus the increasing of the electric current in suppression circuit Adding, this is a degenerative process, may eventually reach a balance, and this balanced balanced current is not over N-channel JFET pipe Q1's Drain saturation current I_DSS, thus the N-channel of high-impedance state mainly it is presented more than the voltage segment of positive clamp voltage unit U4 voltage Depletion type FET pipe Q3 is shared；The now drain-source voltage V of N-channel JFET pipe Q2_DSFor-0.7V, grid G 2 saves with the PN of drain D 2 Forward conduction (or stabilivolt CR2 forward conduction), N-channel depletion type FET pipe Q4 is positive voltage due to grid G 4, thus turns on.

In like manner, when occurring occurring more than the high pressure of negative clamp voltage unit U3 voltage, electric current is had successively from negative clamper Voltage cell U3 flows to N-channel depletion type FET pipe Q4, N-channel JFET pipe Q2, N-channel JFET pipe Q1 and N-channel depletion type FET Pipe Q3, now the drain D 41 of N-channel depletion type FET pipe Q4, D42 electrode potential are maintained at (U3-0.7) volt, have more the voltage of part Then fall on N-channel depletion type FET pipe Q4, N-channel JFET pipe Q2, N-channel JFET pipe Q1 and N-channel depletion type FET pipe Q3, this Time N-channel depletion type FET pipe Q4 and N-channel JFET pipe Q2 work, principle is as hereinbefore.

N-channel JFET pipe Q1 and N-channel JFET pipe Q2 acts primarily as metering function, under normal condition, its drain electrode and source electrode it Between the maximum current that can flow through be I_DSS, therefore can select I_DSSSmaller N-channel JFET tube device, such as MMBF4117, Its I_DSSRepresentative value only has 30 μ A, owing to protective current is little, so the power fallen on voltage holding circuit is the least, can select little envelope The device of dress, this can reduce thermo-electromotive force (Thermal EMF) effect of noise and reduce the volume of circuit.

Stabilivolt CR1 and CR2 being connected in parallel between drain electrode and the source electrode of N-channel JFET pipe Q1 and N-channel JFET pipe Q2 uses Not punctured by instantaneous pressure in protection N-channel JFET pipe Q1, the selection of its parameter mainly considers N-channel JFET pipe Q1 and N-channel Pressure scope between JFET pipe Q2 drain electrode and source electrode and the grid cut-off voltage of MOSFET pipe Q3, MOSFET pipe Q4.

Embodiment 2:

Fig. 2 shows the circuit of the embodiment 2 of anti-high tension protection circuit of the present utility model.As in figure 2 it is shown, this embodiment 2 are with the difference of embodiment 1, and the first pressure unit and the second pressure cell position exchange, and the two order in circuit is also Not affecting the pressure effect of circuit, identical with the embodiment 1 in Fig. 1 in circuit role, the operation principle of this circuit is also Same as in Example 1, repeat no more here.

Test below for embodiment 1, to verify the beneficial effects of the utility model.

In the circuit of embodiment 1, the type selecting of each element is as it is shown in figure 5, test instrunment used is oscillograph Tektronix DPO3032, ± 5VA power supply DH1715A, aligner Fluke 5500A and circuit tester Keysight3458A, wherein, aligner Fluke 5500A is connected to the voltage input end VH1 of circuit, it is provided that DC voltage and electric current, alternating voltage and electric current Multiple waveforms and harmonic wave；Oscillograph Tektronix DPO3032 is connected to voltage input end with dual analog passage, VIN passage 1 VH1, VOUT passage 2 is connected to voltage output end OUT1；Circuit tester Keysight3458A is a high accuracy number circuit tester, Can measure DC current and the alternating current of 10Hz～100kHz bandwidth, this circuit tester is serially connected in voltage input end VH1 and basis Between the protection circuit of utility model, for measuring the electric current I flowing through this protection circuit_p。

As it is shown in figure 5, CPC3982 selected by N-channel depletion type FET pipe, the N-channel depletion type FET pipe of this model is the highest resistance to Pressure is 800V；N-channel JFET pipe selects MMBF4117, the maximum current I between the drain electrode of this field effect transistor and source electrode_DSSFor 0.03mA～0.09mA；Voltage-stabilizing device selects Zener diode MMBZ5240, and the voltage stabilizing value of this Zener diode is 10V.

For the test circuit of above-described embodiment 1, carrying out four groups of tests, change the input voltage of circuit respectively, measuring should The output voltage of circuit and by the electric current of this protection circuit, concrete outcome is as shown in table 1.

Table 1 test result

Test 1:

As shown in Figure 6, the range of the passage VIN and passage VOUT of oscillograph Tektronix DPO3032 is all 1.00V, Test 2 aligner Fluke 5500A and be supplied to the direct current that input voltage the is 3V input of this utility model protection circuit, oscillograph The voltage output end VOUT output that Tektronix DPO3032 measures also is maintained at 3V, now input voltage curve and output electricity Line of buckling coincides together, and flows through almost without electric current in described protection circuit.

Test 2:

In order to avoid the curve of output of passage VIN and passage VOUT overlaps, passage VIN and passage VOUT selects different amounts Journey.As it is shown in fig. 7, the range of the passage VIN of oscillograph Tektronix DPO3032 is 5.00V, the range of passage VOUT is all 2.00V, test 2 aligner Fluke 5500A be supplied to the input voltage of this utility model protection circuit be frequency be 20kHz, Amplitude is the exchange input of 3V, and the voltage output end VOUT that oscillograph Tektronix DPO3032 measures is output as frequency and is 20kHz, amplitude are the exchange output of 2.99V, flow through almost without electric current in described protection circuit.

Test 3:

In order to make curve apparent presenting on same oscillograph screen of passage VIN and passage VOUT, by circuit Input voltage decay after access oscillograph, and two passages select different ranges.As shown in Figure 8, oscillograph Tektronix The range of the passage VIN of DPO3032 is 10.0V, and the range of passage VOUT is all 5.00mV, tests 3 aligner Fluke 5500A Be supplied to the input voltage of this utility model protection circuit be amplitude be 30 × 10V (input voltage decay to original ten/ After one access oscilloscope measurement, magnitude of voltage should be 10 times of oscillograph reading) direct current input, oscillograph Tektronix The voltage output end VOUT that DPO3032 measures is output as the direct current output of 3.21mV (1 Ω resistance is shorted to ground), described protection The electric current I flow through in circuit_pIt is only 103 μ A.

Test 4:

In order to make curve apparent presenting on same oscillograph screen of passage VIN and passage VOUT, by circuit Input voltage and output voltage decay after access oscillograph, and two passages select different ranges.As it is shown in figure 9, oscillography The range of the passage VIN of device Tektronix DPO3032 is 10.0V, and the range of passage VOUT is all 200mV, tests 4 aligners Fluke 5500A be supplied to the input voltage of this utility model protection circuit be frequency be 100Hz, amplitude be that the exchange of 200V is defeated Enter, oscillograph Tektronix DPO3032 measure voltage output end VOUT be output as frequency be 100Hz, amplitude be 501mV (output voltage accesses oscilloscope measurement after decaying to original 1/10th to × 10=5V, and magnitude of voltage should be oscillograph reading 10 times) exchange output, the electric current I flow through in described protection circuit_pIt is only 150 μ A.

Above test result understands, and when protection circuit normally works (i.e. input voltage is within normal range), voltage is several Lossless transmission, to outfan, when there being the high input voltage higher than normal voltage range (± 5V), flows through in protection circuit Electric current I_pThe least, only μ A level, circuit loss is the least, and output voltage VO UT was still maintained in normal range.

It is described above specific embodiment of the utility model, for different application scenarios and resistance to pressure request thereof, can To be correspondingly improved this utility model circuit, the first pressure unit and the second pressure unit can be used alone, it is possible to To be applied in combination, as long as the circuit connecting mode in each pressure unit is constant, both can arbitrarily be used in series, its forward pressure voltage Being determined by the pressure voltage sum of the first pressure unit all in voltage holding circuit, its negative sense pressure voltage is by voltage holding circuit all second The pressure voltage sum of that pressure unit determines, regardless of order, only need to be connected by each pressure unit, for example, it is possible to arbitrarily connect one Individual or multiple first pressure unit, meet the resistance to pressure request of higher forward；Can arbitrarily connect one or more second pressure list Unit, meets the lower resistance to pressure request of negative sense.First pressure unit and the second pressure unit also can be connected and be used together, such as, and can So that a first pressure unit is connected with the multiple second pressure unit being cascaded again, meet certain forward pressure want The resistance to pressure request of negative sense suing for peace lower；By multiple first pressure unit series connection, then can connect with a second pressure unit, full Sufficient certain resistance to pressure request of negative sense and the resistance to pressure request of higher forward；Can also be second resistance to multiple by multiple first pressure unit Pressure unit is connected in series, it is preferable that can be by connecting a first pressure unit and a second pressure unit as pressure Unit group, more multiple above-mentioned pressure unit groups are cascaded, pressure to meet higher forward and lower negative sense simultaneously Requirement.

Such as N-channel depletion type FET pipe the highest pressure for 600V, and voltage holding circuit needs resistance to ± 1000V, both can be by Two the first pressure unit strings go here and there two the second pressure unit the most again, it is also possible to by resistance to a first pressure unit and second Pressure unit, as one group, connects two groups, it is noted that when the pressure unit of first in voltage holding circuit or the second pressure unit more than one Time, in order to avoid occurring more than the high pressure of its pressure voltage between the drain electrode of N-channel depletion type FET pipe and source electrode, then this is first pressure Parallel high voltage is answered to protect device between drain electrode and the source electrode of the N-channel depletion type FET pipe in unit and/or the second pressure unit, Optional varistor uses as high voltage protective device, and it is the highest pressure that its pressure sensitive voltage should select near but below metal-oxide-semiconductor Value, the highest pressure for 600V such as N-channel depletion type FET pipe, can be selected for 560V varistor, the second pressure unit is too.

It will be appreciated by those skilled in the art that these embodiments to be merely to illustrate this utility model and be not intended to this practicality newly The scope of type, the various equivalent variations being made this utility model and amendment belong to this utility model disclosure.

Claims

1. for an anti-high tension protection circuit for low voltage voltage measuring circuit, including voltage input end and voltage output end, string It is associated in the voltage holding circuit between described voltage input end and voltage output end, and is connected to the pressure limiting electricity of described voltage output end Road, described voltage output end is connected to low voltage voltage measuring circuit, it is characterised in that it is defeated that described voltage holding circuit includes having first Enter end and the first pressure unit of the first outfan and/or there is the second pressure unit of the second input and the second outfan, Wherein:

First pressure unit is additionally included in the N ditch as resistance to voltage device being sequentially connected with between first input end and the first outfan Road depletion type FET pipe and the N-channel JFET as current limiting device manage, and the drain electrode of N-channel depletion type FET pipe is connected to the first input End, the source electrode of N-channel depletion type FET pipe is connected with the drain electrode of N-channel JFET pipe, the grid of N-channel depletion type FET pipe and N ditch The grid of road JFET pipe connects, and the grid of N-channel depletion type FET pipe is connected to N with the junction of the grid of N-channel JFET pipe The source electrode of raceway groove JFET pipe, the source electrode of N-channel JFET pipe is connected to the first outfan；

Second pressure unit is additionally included in the N ditch as current limiting device being sequentially connected with between the second input and the second outfan Road JFET pipe and N-channel depletion type FET as resistance to voltage device are managed, and the source electrode of N-channel JFET pipe connects the second input, N ditch The drain electrode of road JFET pipe is connected with the source electrode of N-channel depletion type FET pipe, the grid of N-channel JFET pipe and N-channel depletion type FET The grid of pipe connects, and the junction of the grid of N-channel JFET pipe and the grid of N-channel depletion type FET pipe is connected to N-channel The source electrode of JFET pipe, the drain electrode of N-channel depletion type FET pipe is connected to the second outfan；

In described voltage holding circuit, one or more first pressure unit and/or one or more second pressure unit can be any It is connected in series between described voltage input end and voltage output end.

Anti-high tension protection circuit for low voltage voltage measuring circuit the most according to claim 1, it is characterised in that in institute Stating in voltage holding circuit, a first pressure unit and a second pressure unit are composed in series pressure unit group, one or more Pressure unit group is connected in series between described voltage input end and voltage output end.

Anti-high tension protection circuit for low voltage voltage measuring circuit the most according to claim 1 and 2, it is characterised in that Described first pressure unit and the second pressure unit also include the protection circuit being made up of stabilivolt, the anode of stabilivolt and N ditch The source electrode of road JFET pipe is connected with the junction of grid, the negative electrode of stabilivolt and the source electrode of N-channel depletion type FET pipe and N-channel The junction of the drain electrode of JFET pipe is connected, and described mu balanced circuit protection N-channel JFET pipe is not damaged by instantaneous high pressure.

Anti-high tension protection circuit for low voltage voltage measuring circuit the most according to claim 3, it is characterised in that described Pressure limiting circuit includes being connected and the positive pressure limiting circuit that formed and negative pincers by the negative electrode of positive clamp voltage unit and the first diode The negative pressure limiting circuit that position voltage cell is connected with the anode of the second diode and is formed, wherein, the anode of described first diode Linking together with the negative electrode of the second diode, the junction of the anode of the first diode and the negative electrode of the second diode is connected to Described voltage output end.