CN205486048U - Flat -panel display input filter circuit - Google Patents

Flat -panel display input filter circuit Download PDF

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Publication number
CN205486048U
CN205486048U CN201620031120.2U CN201620031120U CN205486048U CN 205486048 U CN205486048 U CN 205486048U CN 201620031120 U CN201620031120 U CN 201620031120U CN 205486048 U CN205486048 U CN 205486048U
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CN
China
Prior art keywords
resistance
electric capacity
amplifier
filter circuit
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201620031120.2U
Other languages
Chinese (zh)
Inventor
张良贵
向贤平
向贤渊
瞿兆飞
尹传华
石雅海
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Maanshan Ruixiang Software Co ltd
Original Assignee
Maanshan Ruixiang Software Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Maanshan Ruixiang Software Co ltd filed Critical Maanshan Ruixiang Software Co ltd
Priority to CN201620031120.2U priority Critical patent/CN205486048U/en
Application granted granted Critical
Publication of CN205486048U publication Critical patent/CN205486048U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model provides a flat -panel display input filter circuit, it includes amplifier, first resistance, second resistance, third resistance, first electric capacity and second electric capacity, input voltage is connected to first resistance one end, one end, the one end of second resistance and the one end of second electric capacity of third resistance are connected to the first resistance other end, second electric capacity other end ground connection, the one end of reverse input end with the first electric capacity of amplifier is connected to the third resistance other end, the other end of first electric capacity with the output is connected respectively to the other end of second resistance, the output of amplifier is the output, not the positive going input termination ground of amplifier. The utility model provides an effectual filtering of flat -panel display input filter circuit incoming signal's harmonic part, avoided the display to show noisy point.

Description

A kind of flat faced display input filter circuit
Technical field
This utility model relates to flat display technology field, particularly a kind of flat faced display input filter electricity Road.
Background technology
The input circuit of the flat faced display that prior art provides has more harmonic, and prior art is not There is the technical scheme solving Similar Problems.
Utility model content
For solving above-mentioned technical problem, this utility model provides a kind of flat faced display input filter circuit, It includes amplifier, the first resistance, the second resistance, the 3rd resistance, the first electric capacity and the second electric capacity, institute State first resistance one end and connect input voltage, the described first resistance other end connect one end of the 3rd resistance, the One end of two resistance and one end of the second electric capacity, described second electric capacity other end ground connection, described 3rd resistance The other end connects reverse input end and one end of the first electric capacity of amplifier, the other end of described first electric capacity and The other end of described second resistance connects outfan respectively, and the outfan of described amplifier is outfan, described The positive input ground connection of amplifier.
It is preferred that the resistance of described first resistance, the second resistance and the 3rd resistance is respectively 1K Ω.
It is preferred that the capacitance of described first electric capacity is 100 μ F, housing of described second electric capacity is 150 μ F.
This utility model has the advantages that
The flat faced display input filter circuit that this utility model provides effectively has filtered the harmonic wave of input signal Part, it is to avoid display display noise.
Certainly, implement arbitrary product of the present utility model to it is not absolutely required to reach all the above simultaneously Advantage.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of this utility model embodiment, institute embodiment will be described below The accompanying drawing used is needed to be briefly described, it should be apparent that, the accompanying drawing in describing below is only this practicality Some novel embodiments, for those of ordinary skill in the art, before not paying creative work Put, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
The flat faced display input filter circuit composition schematic diagram that Fig. 1 provides for this utility model embodiment.
Detailed description of the invention
Below in conjunction with the accompanying drawing in this utility model embodiment, to the technical side in this utility model embodiment Case is clearly and completely described, it is clear that described embodiment is only that this utility model part is real Execute example rather than whole embodiments.Based on the embodiment in this utility model, ordinary skill people All other embodiments that member is obtained under not making creative work premise, broadly fall into this utility model The scope of protection.
This utility model embodiment provides a kind of flat faced display input filter circuit, it include amplifier U1, First resistance R1, the second resistance R2, the 3rd resistance R3, the first electric capacity C1 and the second electric capacity C2, first Resistance R1 one end connect input voltage, first the resistance R1 other end connect one end of the 3rd resistance R3, second One end of resistance R2 and one end of the second electric capacity C2, the second electric capacity C2 other end ground connection, the 3rd resistance R3 The other end connects reverse input end and one end of the first electric capacity C1, the other end of the first electric capacity C1 of amplifier Being connected outfan respectively with the other end of the second resistance R2, the outfan of amplifier U1 is outfan, amplifies The positive input ground connection of device U1.
First resistance R1, the resistance of the second resistance R2 and the 3rd resistance R3 are respectively 1K Ω.
The capacitance of the first electric capacity C1 is 100 μ F, and housing of the second electric capacity C2 is 150 μ F.
The flat faced display input filter circuit that this utility model provides effectively has filtered the harmonic wave of input signal Part, it is to avoid display display noise.
This utility model preferred embodiment disclosed above is only intended to help to illustrate this utility model.Preferred embodiment The not all of details of detailed descriptionthe, is also not intended to the detailed description of the invention that this utility model is only described.
Obviously, according to the content of this specification, can make many modifications and variations.This specification is chosen and has Body describes these embodiments, is to preferably explain principle of the present utility model and actual application, so that Skilled artisan can be best understood by and utilize this utility model.This utility model is only by right Claim and four corner thereof and the restriction of equivalent.

Claims (3)

1. a flat faced display input filter circuit, it is characterised in that include amplifier, the first resistance, Second resistance, the 3rd resistance, the first electric capacity and the second electric capacity, described first resistance one end connects input electricity Pressure, the described first resistance other end connects one end of the 3rd resistance, one end of the second resistance and the second electric capacity One end, described second electric capacity other end ground connection, described 3rd the resistance other end connect amplifier the most defeated Enter the other end of one end of end and the first electric capacity, the other end of described first electric capacity and described second resistance respectively Connecting outfan, the outfan of described amplifier is outfan, the positive input ground connection of described amplifier.
2. flat faced display input filter circuit as claimed in claim 1, it is characterised in that described first The resistance of resistance, the second resistance and the 3rd resistance is respectively 1K Ω.
3. flat faced display input filter circuit as claimed in claim 1, it is characterised in that described first The capacitance of electric capacity is 100 μ F, and housing of described second electric capacity is 150 μ F.
CN201620031120.2U 2016-01-11 2016-01-11 Flat -panel display input filter circuit Expired - Fee Related CN205486048U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620031120.2U CN205486048U (en) 2016-01-11 2016-01-11 Flat -panel display input filter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620031120.2U CN205486048U (en) 2016-01-11 2016-01-11 Flat -panel display input filter circuit

Publications (1)

Publication Number Publication Date
CN205486048U true CN205486048U (en) 2016-08-17

Family

ID=56668538

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620031120.2U Expired - Fee Related CN205486048U (en) 2016-01-11 2016-01-11 Flat -panel display input filter circuit

Country Status (1)

Country Link
CN (1) CN205486048U (en)

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160817

Termination date: 20170111

CF01 Termination of patent right due to non-payment of annual fee