CN205452287U - Image sensor chip package structure - Google Patents
Image sensor chip package structure Download PDFInfo
- Publication number
- CN205452287U CN205452287U CN201521117238.9U CN201521117238U CN205452287U CN 205452287 U CN205452287 U CN 205452287U CN 201521117238 U CN201521117238 U CN 201521117238U CN 205452287 U CN205452287 U CN 205452287U
- Authority
- CN
- China
- Prior art keywords
- image sensing
- sensing chip
- chip
- substrate
- control chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
The utility model provides an image sensor chip package structure, this image sensor chip package structure have the image sensor chip and are used for control the control chip of image sensor chip, image sensor chip package structure still includes: the base plate has first surface relative each other and second surface, image sensor chip electric connection extremely the base plate, and be located the first surface of base plate, the control chip electricity is connected to the base plate, and be located the second surface of base plate, the image sensor chip with control chip is relative each other, the utility model discloses an in integrating into image sensor chip package with range upon range of packaging technique, reduce the packaging structure size of image sensor chip, improved the integrated level of image sensor chip.
Description
Technical field
This utility model relates to semiconductor die package technology, particularly relates to image sensing chip encapsulation technology.
Background technology
Image sensing chip, as the functional chip of image capturing, is usually used in the photographic head of electronic product.Benefiting from the lasting flourish of camera cell phone (CameraPhone), the following demand of image sensing chip market will constantly rise.Meanwhile, popular, the rise in security monitoring market of the networked realtime communication services such as Skype, and the Fast Growth of Global Auto electronics, also create considerable application scale for image sensing chip.Meanwhile, the encapsulation technology of image sensing chip also has tremendous development.
Laminate packaging technology (POP, package-on-package) is that the IC for mobile device such as smart mobile phone, panel computer etc. encapsulates and one of very popular three-dimensional overlay technology that can be used for the system integration of growing up.When the iPhone of Apple when exposing for 2007, even if being presented in face of everybody with being opened, laminate packaging technology enters the visual field of people.The encapsulating structure of its ultrathin has become encapsulation technology focus at present, has complied with the market demand to Highgrade integration.
How complying with the market demand, laminate packaging technology is dissolved into the encapsulation field of image sensing chip to be become those skilled in the art and bites technical problem to be solved.
Utility model content
This utility model is by incorporating in image sensing chip package by laminate packaging technology, it is provided that a kind of new image sensing chip-packaging structure, reduces the encapsulating structure size of image sensing chip, improves the integrated level of image sensing chip.
This utility model provides a kind of image sensing chip-packaging structure, there is image sensing chip and for controlling the control chip of described image sensing chip, described image sensing chip-packaging structure also includes: substrate, has each other relative first surface and the second surface；Described image sensing chip is electrically connected to described substrate, and is positioned at the first surface of described substrate；Described control chip is electrically connected to described substrate, and is positioned at the second surface of described substrate；Described image sensing chip is relative to each other with described control chip.
Preferably, described image sensing chip has relative to each other first and second, first face of described image sensing chip is provided with photosensitive area and the weld pad being positioned at outside photosensitive area, second mask of described image sensing chip has the soldered ball electrically connected with described weld pad, described soldered ball to electrically connect with described substrate.
Preferably, first of described image sensing chip being coated with cover sheet, forms the cavity of sealing between described cover sheet and described image sensing chip, described photosensitive area is positioned at described cavity.
Preferably, described cover sheet is anti reflection glass.
Preferably, the second surface of described substrate is provided with the soldering projection for electrically connecting with external circuit, the height of described soldering projection, more than the height of described control chip, when described soldering projection electrically connects with described external circuit, has spacing between described control chip and described external circuit.
Preferably, described control chip upside-down mounting is on described substrate.
Preferably, described control chip realizes electrically connecting by bonding wire with described substrate.
The beneficial effects of the utility model are by incorporating in image sensing chip package by laminate packaging technology, a kind of new image sensing chip-packaging structure and method for packing are provided, reduce the encapsulating structure size of image sensing chip, improve the integrated level of image sensing chip.
Accompanying drawing explanation
Fig. 1 is the image sensing chip-packaging structure schematic diagram of this utility model preferred embodiment.
Fig. 2 (a)-Fig. 2 (g) is the encapsulation schematic flow sheet of this utility model one embodiment image sensing chip.
Detailed description of the invention
Below with reference to accompanying drawing, detailed description of the invention of the present utility model is described in detail.But these embodiments are not limiting as this utility model, structure, method or conversion functionally that those of ordinary skill in the art is made according to these embodiments are all contained in protection domain of the present utility model.
It should be noted that providing the purpose of these accompanying drawings is to contribute to understanding embodiment of the present utility model, and should not be construed as and limit improperly of the present utility model.For the sake of becoming apparent from, shown in figure, size is not necessarily to scale, may make amplify, reduce or other change.Additionally, the three-dimensional space of length, width and the degree of depth should be comprised in actual fabrication.
Refer to Fig. 1, for the image sensing chip-packaging structure schematic diagram of this utility model preferred embodiment.Image sensing chip-packaging structure 1 includes image sensing chip 10, control chip 20 and substrate 30；Substrate 30 has each other relative first surface 31 and second surface 32；Image sensing chip 10 is electrically connected to substrate 30 and is positioned at the first surface 31 of substrate 30；Control chip 20 is electrically connected to substrate 30 and is positioned at the second surface 31 of substrate 30；Image sensing chip 10 with control chip 20 toward each other, so, defines the package-on-package structure of image sensing chip.
The package-on-package structure of image sensing chip, improves integrated level, reduces package dimension.
Image sensing chip 10 is the semiconductor chip at least with image sensing unit, and image sensing unit can be cmos sensor or ccd sensor, can also have the associated circuit being connected with image sensing unit in image sensing chip 10.
Control chip 20 is used for controlling image sensing chip 10, and this utility model does not limit the concrete function of control chip 20, as long as set up signal of telecommunication transmission between control chip 20 and image sensing chip 10 i.e. meet " control " described in this utility model.
Image sensing chip 10 in the present embodiment is the semiconductor chip with cmos sensor.Image sensing chip 10 has the first face 101 and the second face 102 relative to each other, is provided with photosensitive area 103 and the weld pad 104 being positioned at outside photosensitive area 103 in the first face 101, and weld pad 104 electrically connects (not illustrating in Fig. 1) with photosensitive area 103.
Image sensing chip 10 electrically connects with substrate 30 and is positioned at the first surface 31 of substrate 30.Concrete, form, in the second face 102 of image sensing chip 10, the soldered ball 105 electrically connected with weld pad 104, welded with substrate 30 by soldered ball 105 and realize image sensing chip 10 and electrically connect with substrate 30.
In order to protect image sensing chip 10 and avoid dust etc. to pollute photosensitive area 103; first face 101 of image sensing chip 10 covers cover sheet 106; the cavity 107 of sealing is formed between cover sheet 106 and image sensing chip 10; photosensitive area 103 is positioned at cavity 107, stops dust etc. and pollutes photosensitive area 103.In the present embodiment, being formed with support unit 108 on the surface of cover sheet 106, support unit 108 is between cover sheet 106 and image sensing chip 10, and three surrounds formation cavity 107.
The material of cover sheet 106 is light transmissive material, and in the present embodiment, cover sheet 106 is anti reflection glass, has preferable light transmission and facilitates light to project photosensitive area 103.
In the present embodiment, the material of support unit 108 is photoresists, uses exposure imaging technique to be formed in the wherein one side of cover sheet 106.
Control chip 20 electrically connects with substrate 30 and is positioned at the second surface 32 of substrate 30.There is on control chip 20 multiple electrical connection pad 21, electrical connection pad 21 is formed pedestal 22, the material of pedestal 22 can be gold, tin-lead or other unleaded metal materials, uses reverse installation process to be set up by pedestal 22 to electrically connect between electrical connection pad 21 with substrate 30 and realize control chip 20 and electrically connect with substrate 30.
In another embodiment, control chip 20 uses the mode of wire bonding to realize electrically connecting with substrate 30, and i.e. both realize electrical connection by bonding wire, and the material of bonding wire can be the metal materials such as copper, tungsten, aluminum, gold, silver.Further, in order to protect control chip 20 and bonding wire, control chip 20 and bonding wire are carried out plastic packaging and forms plastic package structure.Repeat here, no longer draw.
In the present embodiment, the material of substrate 30 is plastic cement material.In order to eliminate stress influence, underfill process can be introduced during image sensing chip 10 and control chip 20 electrically connect with substrate 30.As it is shown in figure 1, be enclosed with underfill 23 around the gap location electrically connected with substrate 30 at control chip 10 and control chip 20.
Electrically connect with other external circuits to realize image sensing chip-packaging structure, second surface 32 in substrate 30 is provided with the soldering projection 33 for electrically connecting with external circuit, the height of soldering projection 33 is more than the height of control chip 20, the height of soldering projection 33 meets when soldering projection 33 electrically connects with external circuit, has spacing between control chip 20 and external circuit.
Substrate 30 is provided with electricity interconnection architecture 34, between image sensing chip 10, control chip 20 and soldering projection 33, sets up circuit turn-on by electricity interconnection architecture 34.
Refer to the encapsulation schematic flow sheet that Fig. 2 (a)-Fig. 2 (f) is this utility model one embodiment image sensing chip.
Refer to Fig. 2 (a), it is provided that image sensing chip 10 and for controlling the control chip 20 of image sensing chip 10；Also include: providing substrate 30, substrate 30 has each other relative first surface 31 and second surface 32.
Refer to Fig. 2 (b), control chip 20 is electrically connected to the second surface 32 of substrate 30.Concrete, there is on control chip 20 multiple electrical connection pad 21, electrical connection pad 21 is formed pedestal 22, the material of pedestal 22 can be gold, tin-lead or other unleaded metal materials, uses reverse installation process to be set up by pedestal 22 to electrically connect between electrical connection pad 21 with substrate 30 and realize control chip 20 and electrically connect with substrate 30.
Refer to Fig. 2 (c), use and be enclosed with underfill 23 around the gap location and control chip 20 that underfill process electrically connects with substrate 30 at control chip 10.
In another embodiment, control chip 20 uses the mode of wire bonding to realize electrically connecting with substrate 30, and i.e. both realize electrical connection by bonding wire, and the material of bonding wire can be the metal materials such as copper, tungsten, aluminum, gold, silver.Further, in order to protect control chip 20 and bonding wire, control chip 20 and bonding wire are carried out plastic packaging and forms plastic package structure.
Refer to Fig. 2 (d), use and plant the soldering projection 33 that ball technique is provided at the second surface 32 of substrate 30 electrically connecting with external circuit, the height of soldering projection 33 is more than the height of control chip 20, the height of soldering projection 33 meets when soldering projection 33 electrically connects with external circuit, has spacing between control chip 20 and external circuit.
Refer to Fig. 2 (e), image sensing chip 10 covers cover sheet 106.
Image sensing chip 10 in the present embodiment is the semiconductor chip with cmos sensor, image sensing chip 10 has the first face 101 and the second face 102 relative to each other, be provided with photosensitive area 103 and the weld pad 104 being positioned at outside photosensitive area 103 in the first face 101, weld pad 104 electrically connects with photosensitive area 103.
Concrete, including:
Wafer is provided, wafer has the image sensing chip 10 of array arrangement；
The cover sheet 106 consistent with wafer size is provided, the wherein one side of cover sheet is formed the support unit 108 of array arrangement, the corresponding image sensing chip 10 of each support unit 108；
Cover sheet 106 para-position being pressure bonded on the first face 101 of image sensing chip 10, support unit 108 is between cover sheet 106 and image sensing chip 10.Thus, between cover sheet 106 and each image sensing chip 10, forming the cavity 107 of sealing, photosensitive area 103 is positioned at cavity 107, stops dust etc. and pollutes photosensitive area 103.
The material of cover sheet 106 is light transmissive material, and in the present embodiment, cover sheet 106 is anti reflection glass, has preferable light transmission and facilitates light to project photosensitive area 103.
The material of support unit 108 can be photoresists.
Refer to Fig. 2 (f), form, in the second face 102 of image sensing chip 10, the soldered ball 105 electrically connected with weld pad 104.Concrete, use silicon via process to form multiple silicon through hole in the second face 102 of image sensing chip 10, the corresponding weld pad 104 of each silicon through hole, the bottom-exposed weld pad 104 of described silicon through hole；Forming metal wiring layer 100 in described silicon through hole, metal wiring layer 100 electrically connects with weld pad 104；Metal wiring layer 100 extends to the second face 102 of image sensing chip 10, forms soldered ball 105 in the second face 102 of image sensing chip 10, and soldered ball 105 electrically connects with metal wiring layer 100；
Cut described wafer and described cover sheet, make the multiple image sensing chips 10 being connected with each other separate.
Refer to Fig. 2 (g), image sensing chip 10 is electrically connected to the first surface 31 of substrate 30, welded with substrate 30 by soldered ball 105 and realize image sensing chip 10 and electrically connect with substrate 30.And image sensing chip 10 is relative to each other with control chip 20.
The beneficial effects of the utility model are by incorporating in image sensing chip package by laminate packaging technology, a kind of new image sensing chip-packaging structure and method for packing are provided, reduce the encapsulating structure size of image sensing chip, improve the integrated level of image sensing chip.
It is to be understood that, although this specification is been described by according to embodiment, but the most each embodiment only comprises an independent technical scheme, this narrating mode of description is only for clarity sake, those skilled in the art should be using description as an entirety, technical scheme in each embodiment can also form, through appropriately combined, other embodiments that it will be appreciated by those skilled in the art that.
The a series of detailed description of those listed above is only for illustrating of feasibility embodiment of the present utility model; they are also not used to limit protection domain of the present utility model, within all equivalent implementations made without departing from this utility model skill spirit or change should be included in protection domain of the present utility model.
Claims (7)
1. an image sensing chip-packaging structure, has image sensing chip and for controlling the control chip of described image sensing chip, it is characterised in that described image sensing chip-packaging structure also includes:
Substrate, has each other relative first surface and the second surface；
Described image sensing chip is electrically connected to described substrate, and is positioned at the first surface of described substrate；
Described control chip is electrically connected to described substrate, and is positioned at the second surface of described substrate；
Described image sensing chip is relative to each other with described control chip.
Image sensing chip-packaging structure the most according to claim 1, it is characterized in that, described image sensing chip has relative to each other first and second, first face of described image sensing chip is provided with photosensitive area and the weld pad being positioned at outside photosensitive area, second mask of described image sensing chip has the soldered ball electrically connected with described weld pad, described soldered ball to electrically connect with described substrate.
Image sensing chip-packaging structure the most according to claim 2; it is characterized in that; being coated with cover sheet on first of described image sensing chip, form the cavity of sealing between described cover sheet and described image sensing chip, described photosensitive area is positioned at described cavity.
Image sensing chip-packaging structure the most according to claim 3, it is characterised in that described cover sheet is anti reflection glass.
Image sensing chip-packaging structure the most according to claim 1, it is characterized in that, the second surface of described substrate is provided with the soldering projection for electrically connecting with external circuit, the height of described soldering projection is more than the height of described control chip, when described soldering projection electrically connects with described external circuit, between described control chip and described external circuit, there is spacing.
Image sensing chip-packaging structure the most according to claim 1, it is characterised in that described control chip upside-down mounting is on described substrate.
Image sensing chip-packaging structure the most according to claim 1, it is characterised in that described control chip realizes electrically connecting by bonding wire with described substrate.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521117238.9U CN205452287U (en) | 2015-12-29 | 2015-12-29 | Image sensor chip package structure |
| KR1020187011950A KR20180061293A (en) | 2015-12-29 | 2016-12-26 | Image sensing chip packaging structure and packaging method thereof |
| PCT/CN2016/112080 WO2017114353A1 (en) | 2015-12-29 | 2016-12-26 | Image sensing chip packaging structure and packaging method therefor |
| JP2018540203A JP2018531525A (en) | 2015-12-29 | 2016-12-26 | Image sensing chip package structure and packaging method thereof |
| US15/767,623 US20180308890A1 (en) | 2015-12-29 | 2016-12-26 | Image sensing chip packaging structure and packaging method therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521117238.9U CN205452287U (en) | 2015-12-29 | 2015-12-29 | Image sensor chip package structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205452287U true CN205452287U (en) | 2016-08-10 |
Family
ID=56572927
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201521117238.9U Active CN205452287U (en) | 2015-12-29 | 2015-12-29 | Image sensor chip package structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205452287U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105448944A (en) * | 2015-12-29 | 2016-03-30 | 苏州晶方半导体科技股份有限公司 | Image sensing chip packaging structure and packaging method |
| WO2017114353A1 (en) * | 2015-12-29 | 2017-07-06 | 苏州晶方半导体科技股份有限公司 | Image sensing chip packaging structure and packaging method therefor |
| CN107580170A (en) * | 2017-11-02 | 2018-01-12 | 信利光电股份有限公司 | A kind of camera module and its method for packing |
-
2015
- 2015-12-29 CN CN201521117238.9U patent/CN205452287U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105448944A (en) * | 2015-12-29 | 2016-03-30 | 苏州晶方半导体科技股份有限公司 | Image sensing chip packaging structure and packaging method |
| WO2017114353A1 (en) * | 2015-12-29 | 2017-07-06 | 苏州晶方半导体科技股份有限公司 | Image sensing chip packaging structure and packaging method therefor |
| CN105448944B (en) * | 2015-12-29 | 2019-09-17 | 苏州晶方半导体科技股份有限公司 | Image sensing chip-packaging structure and its packaging method |
| CN107580170A (en) * | 2017-11-02 | 2018-01-12 | 信利光电股份有限公司 | A kind of camera module and its method for packing |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN205248278U (en) | Image sensor encapsulation | |
| US8981511B2 (en) | Multi-chip package for imaging systems | |
| US7675131B2 (en) | Flip-chip image sensor packages and methods of fabricating the same | |
| US20090256222A1 (en) | Packaging method of image sensing device | |
| US20160284570A1 (en) | Encapsulated dies with enhanced thermal performance | |
| WO2019090935A1 (en) | Optical module and processing method therefor, and terminal device | |
| JP2009049348A (en) | Image sensor package and method for forming its package | |
| JP2017515306A (en) | Stacked semiconductor die assembly having support members and associated systems and methods | |
| CN105448944A (en) | Image sensing chip packaging structure and packaging method | |
| CN205452287U (en) | Image sensor chip package structure | |
| CN103985723A (en) | Packaging method and packaging structures | |
| US20090224344A1 (en) | Packaging method of image sensing device | |
| JP6939561B2 (en) | Manufacturing method of image sensor package, image sensor and image sensor package | |
| US20180308890A1 (en) | Image sensing chip packaging structure and packaging method therefor | |
| CN105428378A (en) | Image sensor chip package structure and package method thereof | |
| KR20170073796A (en) | Semiconductor package and Method of manufacturing package | |
| JP2018531525A6 (en) | Image sensing chip package structure and packaging method thereof | |
| CN204144259U (en) | A kind of encapsulating structure | |
| CN205248276U (en) | Image sensor chip package structure | |
| US20190371755A1 (en) | Semiconductor devices with underfill control features, and associated systems and methods | |
| WO2017088729A1 (en) | Image sensing chip packaging structure and method | |
| US20080303111A1 (en) | Sensor package and method for fabricating the same | |
| KR20050120142A (en) | Camera module and method of fabricating the same using epoxy | |
| CN100405563C (en) | Wafer level package structure of image sensing element and its package method | |
| US20090315130A1 (en) | Solid-state imaging apparatus and method for manufacturing the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |