CN205353662U - Industrial control examines core plate based on SPIFlash starts i. MX6 - Google Patents
Industrial control examines core plate based on SPIFlash starts i. MX6 Download PDFInfo
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- CN205353662U CN205353662U CN201521124997.8U CN201521124997U CN205353662U CN 205353662 U CN205353662 U CN 205353662U CN 201521124997 U CN201521124997 U CN 201521124997U CN 205353662 U CN205353662 U CN 205353662U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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Abstract
The utility model aims at providing a can effective industrial control examines core plate based on SPIFlash starts i. MX6 who guarantees to start the data completeness of medium. The utility model discloses a I. MX6 nuclear core plate main part, be provided with the starting circuit based on SPI flash in nuclear core plate main part, this circuit includes SPI flash chip, the 1st foot of this chip is inputed for the level, the 2nd foot is the output pin, the 3rd foot is connected with the power through the 5th resistance R5, the 4th foot altogether, the 5th foot is the input foot, clock device is connected to the 6th foot, the 7th foot is linked with the power through the 6th resistance R6, the 8th foot is connected with the power, be connected with first electric capacity C1 between the 6th resistance R6 and power, first electric capacity C1's the other end altogether, pass through the tenth resistance R10 altogether between the 3rd foot of the 5th resistance R5 and SPI flash chip. The utility model discloses can be applied to integrated circuit product design field.
Description
Technical field
This utility model relates to IC products design field, particularly relates to a kind of Industry Control core board starting i.MX6 based on SPIFlash.
Background technology
SD/MMC startup there is two ways in which: one is to use pluggable storage (such as SD card, TF card) medium.A kind of is storage (such as the eMMC) medium of paster.
Using pluggable storage medium starting device: one, data integrity issues, SD/TF card is movable storage medium, and namely this medium can be read and write on other equipment (such as PC), it is easy to cause startup data to be capped.Its two, safety problem, the protection to storage medium is a problem, and the loss of storage medium may result in loss of data or divulges a secret.
Use the storage medium starting device of the paster of SD interface: the memory capacity of this kind of storage medium is minimum in 4G byte.If only being used for doing starts, it is clear that cost is too high, and takies no small one piece of circuit board space.If being used for doing starts+system, starting and system is on same storage medium, the maloperation under system may result in boot data and is destroyed, and in Industry Control, this is not desired to see.
NandFlash Starting mode: use NandFlash to start the problem that there is extensibility, the usual life cycle of product of industrial circle is long, and the life cycle of this kind of chip of NandFlash is uncertain, when NandFlash NandFlash stopping production or product occur needs to upgrade, at this time it is required for new NandFlash upgrade-system again.This has resulted in the problem that product not easily extends and safeguards.
SATA Starting mode: SATA startup generally uses solid state hard disc to realize at industrial circle, and solid state hard disc cost height is a problem at present.Additionally the volume of solid state hard disc determines it and cannot be used on small-sized product.
Utility model content
Technical problem to be solved in the utility model is to overcome the deficiencies in the prior art, it is provided that a kind of Industry Control core board starting i.MX6 based on SPIFlash that can be effectively ensured the data integrity starting medium.
This utility model be the technical scheme is that this core board includes i.MX6 core board main body, described i.MX6 core board main body is provided with the start-up circuit based on SPIFlash, the described start-up circuit based on SPIFlash includes SPIFlash chip, 1st foot of described SPIFlash chip is level input, 2nd foot is output pin, 3rd foot is connected with power supply by the 5th resistance, 4th foot is altogether, 5th foot is input pin, 6th foot connects clock apparatus, 7th foot is linked with power supply by the 6th resistance, 8th foot is connected with power supply, it is connected to the first electric capacity between the 6th resistance and power supply, the other end of described first electric capacity is altogether, between described 5th resistance and the 3rd foot of described SPIFlash chip by the tenth resistance altogether.
Such scheme is visible, by core board use SPIFlash as and be only used as starting device, by system storage with start medium separate, be effectively guaranteed start medium data integrity;Further, since SPIFlash is surface-mounted device, effectively ensure the core board application in dither scene;Under this use scene, it is good that the stability of SPIFlash storage chip starts storage medium than other.As can be seen here, the independent start-up circuit of this utility model design is guaranteeing data integrity and is all being guaranteed in safety problem.
Specifically, the model of described SPIFlash chip is SST25VF016B504IS2AF.The program is visible, and this utility model adopts this surface-mounted device of SPIFlash chip, is effectively guaranteed the application under dither scene again.
One preferred scheme is, described power supply is 3.3V power supply.The selection of conventional voltage so that this utility model can be applicable to multiple occasion.
Accompanying drawing explanation
Fig. 1 is circuit theory schematic diagram of the present utility model.
Detailed description of the invention
As shown in Figure 1, in the present embodiment, this utility model includes i.MX6 core board main body, described i.MX6 core board main body is provided with the start-up circuit based on SPIFlash, the described start-up circuit based on SPIFlash includes SPIFlash chip, and the model of described SPIFlash chip is SST25VF016B504IS2AF.1st foot of described SPIFlash chip is level input, and the 2nd foot is output pin, and the 3rd foot is connected with power supply by the 5th resistance R5, altogether, the 5th foot is input pin to 4th foot, and the 6th foot connects clock apparatus, 7th foot is linked with power supply by the 6th resistance R6, and described power supply is 3.3V power supply.8th foot is connected with power supply, is connected to the first electric capacity C1 between the 6th resistance R6 and power supply, and the other end of described first electric capacity C1 altogether, passes through the tenth resistance R10 altogether between described 5th resistance R5 and the 3rd foot of described SPIFlash chip.
By the circuit that Integrated design SPI on core board is relevant, use SPIFlash as and be only used as starting device.It has a characteristic that separates system storage with starting medium, the effective data integrity ensureing to start medium;Owing to SPIFlash is surface-mounted device, effective guarantee core board is in the application of dither scene;It is good that SPIFlash storage chip stability under this use scene starts storage medium than other.
This utility model can be applicable to IC products design field.
Claims (3)
1. the Industry Control core board starting i.MX6 based on SPIFlash, including i.MX6 core board main body, it is characterized in that: in described i.MX6 core board main body, be provided with the start-up circuit based on SPIFlash, the described start-up circuit based on SPIFlash includes SPIFlash chip, 1st foot of described SPIFlash chip is level input, 2nd foot is output pin, 3rd foot is connected with power supply by the 5th resistance (R5), 4th foot is altogether, 5th foot is input pin, 6th foot connects clock apparatus, 7th foot is linked with power supply by the 6th resistance (R6), 8th foot is connected with power supply, it is connected to the first electric capacity (C1) between the 6th resistance (R6) and power supply, the other end of described first electric capacity (C1) is altogether, between described 5th resistance (R5) and the 3rd foot of described SPIFlash chip by the tenth resistance (R10) altogether.
2. the Industry Control core board starting i.MX6 based on SPIFlash according to claim 1, it is characterised in that: the model of described SPIFlash chip is SST25VF016B504IS2AF.
3. the Industry Control core board starting i.MX6 based on SPIFlash according to claim 1, it is characterised in that: described power supply is 3.3V power supply.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201521124997.8U CN205353662U (en) | 2015-12-31 | 2015-12-31 | Industrial control examines core plate based on SPIFlash starts i. MX6 |
Applications Claiming Priority (1)
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CN201521124997.8U CN205353662U (en) | 2015-12-31 | 2015-12-31 | Industrial control examines core plate based on SPIFlash starts i. MX6 |
Publications (1)
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CN205353662U true CN205353662U (en) | 2016-06-29 |
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CN201521124997.8U Expired - Fee Related CN205353662U (en) | 2015-12-31 | 2015-12-31 | Industrial control examines core plate based on SPIFlash starts i. MX6 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11338333B2 (en) | 2017-05-09 | 2022-05-24 | Institute Of Semiconductors, Chinese Academy Of Sciences | Laser cleaning system |
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2015
- 2015-12-31 CN CN201521124997.8U patent/CN205353662U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11338333B2 (en) | 2017-05-09 | 2022-05-24 | Institute Of Semiconductors, Chinese Academy Of Sciences | Laser cleaning system |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160629 Termination date: 20211231 |
|
CF01 | Termination of patent right due to non-payment of annual fee |