CN205334837U - Singlechip development device - Google Patents

Singlechip development device Download PDF

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Publication number
CN205334837U
CN205334837U CN201620064745.9U CN201620064745U CN205334837U CN 205334837 U CN205334837 U CN 205334837U CN 201620064745 U CN201620064745 U CN 201620064745U CN 205334837 U CN205334837 U CN 205334837U
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CN
China
Prior art keywords
board
fpga
development
microcomputer
singlechip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201620064745.9U
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Chinese (zh)
Inventor
曾臣
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Individual
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Individual
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Publication date
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Priority to CN201620064745.9U priority Critical patent/CN205334837U/en
Application granted granted Critical
Publication of CN205334837U publication Critical patent/CN205334837U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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  • Battery Mounting, Suspending (AREA)

Abstract

The utility model discloses a singlechip development device. Invent for solving among the prior art easily the nature learned subalternation problem. The utility model discloses a singlechip development device, include a box and articulate case lid on the box, the bottom half set up the battery chamber, but the battery chamber in be equipped with a switching power supply and charging source, the battery chamber on be provided with the layer board that articulates in box one side the layer board on be provided with singlechip development board, the FPGA development board wrapper sheet of kneading dough, the case lid on articulated have a demonstration screen board, the bread board on be provided with the expansion module, adopt above -mentioned structure the utility model discloses, it puts together to knead dough the wrapper sheet organic with singlechip and FPGA board to with modularizations such as power, display screen, expansion circuit, and connect with the winding displacement, overall structure is simple, and study is easy, and the ability that can temper student hands -on ability, put up, debug the circuit, makes things convenient for singlechip and FPGA's study and development.

Description

Single Chip Computer Developing Set
Technical field
This utility model relates to Single Chip Computer Developing Set。
Background technology
The migration path that singlechip technology has been passed by nearly 20 years since development。Nowadays single-chip microcomputer has been widely used in all trades and professions, little of remote control electronic toy, the big shadow having single chip application to electron trades such as aeronautical and space technologies。Grasp the needs of this gate technique of single-chip microcomputer and teaching for helping numerous students, fan and product development person to learn rapidly, various singlechip experimental facilities are born。
The function of existing singlechip experimental facility is each variant, and form is varied。But these singlechip experimental facilities to students ' practical ability, build, debug circuit Capability Requirement all higher。Between various modules, the long period is spent in assembling, welding etc., is unfavorable for student's study to circuit theory, thus this mode is not suitable in classroom instruction。
Utility model content
For overcoming drawbacks described above, this utility model provide a kind of not only learnt easily, conveniently build experimental circuit and but also can exercise student ' manipulative ability, build, debug the ability Single Chip Computer Developing Set of circuit。
For reaching above-mentioned purpose, Single Chip Computer Developing Set of the present utility model, including a casing and the case lid being hinged on described casing;
Battery chamber is set at described box bottom, in described battery chamber, is provided with a Switching Power Supply and rechargable power supplies;
Described battery chamber is provided with the supporting plate being hinged on casing side, described supporting plate is provided with microcomputer development plate, FPGA development board and bread board;
Described microcomputer development plate at least presets single-chip microcomputer, clock circuit and reset circuit, I/O mouth;
Described FPGA development board at least presets FPGA, clock circuit and reset circuit, I/O mouth;
Described case lid is hinged with display panel, described display panel is provided with 7 segment numeral pipes, 1602 LCDs, color LCD screen, LED dot matrix display screen;
Described bread board is provided with expansion module;
Wherein, described Switching Power Supply and rechargable power supplies provide power supply by attaching plug to microcomputer development plate and/or FPGA development board;
The I/O mouth of described microcomputer development plate and FPGA development board leads to bread board and/or display screen by winding displacement。
Preferably, described microcomputer development plate and FPGA development board are positioned at bread board both sides。
Preferably, described rechargable power supplies is lithium battery, and the charging circuit at described lithium battery is serially connected with and overcharges thermoswitch, and the described thermoswitch that overcharges is arranged in lithium battery。
Preferably, being serially connected with overheated thermoswitch at described lithium battery in the supply line of microcomputer development plate and FPGA development board, the nearly lithium battery of described overheated thermoswitch is arranged。
Adopt this utility model of said structure, single-chip microcomputer is organically combined with FPGA plate and bread board, and by modularitys such as power supply, display screen, expansion circuit, and connect with winding displacement, overall structure is simple, both can learn and build the various basic experiment on textbook relatively easily, it is also possible to utilize bread board and expansion circuit to build other experimental circuit various, with exercise student ' manipulative ability, the ability building, debugging circuit, facilitate study and the exploitation of SCM&FPGA。
Accompanying drawing explanation
Fig. 1 is the schematic diagram of single chip part in this utility model。
Fig. 2 is schematic diagram of the present utility model。
Detailed description of the invention
Below in conjunction with drawings and Examples, this utility model is further described。
As depicted in figs. 1 and 2, Single Chip Computer Developing Set of the present utility model, including a casing and the case lid being hinged on described casing;This structure easily arranges and builds various experimental circuit。
Battery chamber is set at described box bottom, in described battery chamber, is provided with a Switching Power Supply and rechargable power supplies;Utilize both power supplys, it is possible to achieve the circuit demonstration under classroom and class
Described battery chamber is provided with the supporting plate being hinged on casing side, described supporting plate is provided with microcomputer development plate, FPGA development board and bread board;
Described microcomputer development plate at least presets single-chip microcomputer, clock circuit and reset circuit, I/O mouth;
Described FPGA development board at least presets FPGA, clock circuit and reset circuit, I/O mouth;
Described case lid is hinged with display panel, described display panel is provided with 7 segment numeral pipes, 1602 LCDs, color LCD screen, LED dot matrix display screen;These display screens are fixed on display panel, not only improve and show to study, be conducive to again building circuit;
Described bread board is provided with expansion module;Wherein, expanding module can be ds1302 digital clock, ds18b20 temperature detection, SD card module, USB module, ultrasonic ranging, radio, mp3 decoder module etc.。
Wherein, described Switching Power Supply and rechargable power supplies provide power supply by attaching plug to microcomputer development plate and/or FPGA development board;
The I/O mouth of described microcomputer development plate and FPGA development board leads to bread board and/or display screen by winding displacement。
In order to better utilize bread board, microcomputer development plate and FPGA development board should be positioned at bread board both sides, as shown in Figure 2。
As further improvement of the utility model, rechargable power supplies should elect lithium battery as, but the battery caused to prevent lithium battery from overcharging or excessively to put is overheated, to produce blast, charging circuit at described lithium battery is serially connected with and overcharges thermoswitch, and the described thermoswitch that overcharges is arranged in lithium battery;Being serially connected with overheated thermoswitch at described lithium battery in the supply line of microcomputer development plate and FPGA development board, the nearly lithium battery of described overheated thermoswitch is arranged。
Above; being only preferred embodiment of the present utility model, but protection scope of the present invention is not limited thereto, any those familiar with the art is in the technical scope that the invention discloses; the change that can readily occur in or replacement, all should be encompassed within protection domain of the present utility model。Therefore, protection domain of the present utility model should be as the criterion with the protection domain that claim defines。

Claims (4)

1. a Single Chip Computer Developing Set, it is characterised in that include a casing and the case lid being hinged on described casing;
Battery chamber is set at described box bottom, in described battery chamber, is provided with a Switching Power Supply and rechargable power supplies;
Described battery chamber is provided with the supporting plate being hinged on casing side, described supporting plate is provided with microcomputer development plate, FPGA development board and bread board;
Described microcomputer development plate at least presets single-chip microcomputer, clock circuit and reset circuit, I/O mouth;
Described FPGA development board at least presets FPGA, clock circuit and reset circuit, I/O mouth;
Described case lid is hinged with display panel, described display panel is provided with 7 segment numeral pipes, 1602 LCDs, color LCD screen, LED dot matrix display screen;
Described bread board is provided with expansion module;
Wherein, described Switching Power Supply and rechargable power supplies provide power supply by attaching plug to microcomputer development plate and/or FPGA development board;
The I/O mouth of described microcomputer development plate and FPGA development board leads to bread board and/or display screen by winding displacement。
2. Single Chip Computer Developing Set as claimed in claim 1, it is characterised in that described microcomputer development plate and FPGA development board are positioned at bread board both sides。
3. Single Chip Computer Developing Set as claimed in claim 1, it is characterised in that described rechargable power supplies is lithium battery, and the charging circuit at described lithium battery is serially connected with and overcharges thermoswitch, and the described thermoswitch that overcharges is arranged in lithium battery。
4. Single Chip Computer Developing Set as claimed in claim 3, it is characterised in that be serially connected with overheated thermoswitch in the supply line of microcomputer development plate and FPGA development board at described lithium battery, the nearly lithium battery of described overheated thermoswitch is arranged。
CN201620064745.9U 2016-01-22 2016-01-22 Singlechip development device Expired - Fee Related CN205334837U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620064745.9U CN205334837U (en) 2016-01-22 2016-01-22 Singlechip development device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620064745.9U CN205334837U (en) 2016-01-22 2016-01-22 Singlechip development device

Publications (1)

Publication Number Publication Date
CN205334837U true CN205334837U (en) 2016-06-22

Family

ID=56319043

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620064745.9U Expired - Fee Related CN205334837U (en) 2016-01-22 2016-01-22 Singlechip development device

Country Status (1)

Country Link
CN (1) CN205334837U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160622

Termination date: 20170122