CN205317924U - Three -phase smart meter carrier wave port testing arrangement - Google Patents

Three -phase smart meter carrier wave port testing arrangement Download PDF

Info

Publication number
CN205317924U
CN205317924U CN201521106544.2U CN201521106544U CN205317924U CN 205317924 U CN205317924 U CN 205317924U CN 201521106544 U CN201521106544 U CN 201521106544U CN 205317924 U CN205317924 U CN 205317924U
Authority
CN
China
Prior art keywords
control unit
test
instruction
carrier wave
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201521106544.2U
Other languages
Chinese (zh)
Inventor
李宁
韩振东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BEIJING YUPONT ELECTRIC POWER TECHNOLOGY Co Ltd
Original Assignee
BEIJING YUPONT ELECTRIC POWER TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BEIJING YUPONT ELECTRIC POWER TECHNOLOGY Co Ltd filed Critical BEIJING YUPONT ELECTRIC POWER TECHNOLOGY Co Ltd
Priority to CN201521106544.2U priority Critical patent/CN205317924U/en
Application granted granted Critical
Publication of CN205317924U publication Critical patent/CN205317924U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

The utility model discloses a three -phase smart meter carrier wave port testing arrangement, include: little the control unit, functional test unit, electrical unit, port linkage unit and human -computer interaction unit, the functional test unit respectively with the port linkage unit and little the control unit connects, is used for the follow the incoming signal that three -phase smart meter carrier wave port acquireed transmits and gives little the control unit receives little the control unit's output signal and transmission are given three -phase smart meter carrier wave port, little the control unit is used for receiving the human -computer interaction unit acquires the test instruction combines to follow the functional test unit acquires incoming signal generates output signal feeds back to the functional test unit generates correspondingly the show instruction feeds back to the human -computer interaction unit. Three -phase smart meter carrier wave port testing arrangement realizes the function test to three -phase smart meter carrier wave port, and effectively improves efficiency of software testing and reliability.

Description

A kind of three-phase intelligent table carrier wave port testing device
Technical field
This utility model embodiment relates to carrier communication measuring technology, particularly relates to a kind of three-phase intelligent table carrier wave port testing device.
Background technology
In recent years, intelligent grid pace of construction is accelerated, and original stem-winder is replaced by intelligent meter, in the three-phase intelligent electric-energy meter technical specification of state's net, proposes detailed requirement for carrier communication module. Accordingly, it would be desirable to the detection carrying out being correlated with is to ensure that electric energy meter carrier interface meets the requirement of state's net.
Under existing technical conditions, research staff needs from the carrier wave port pins of electric energy meter out, and accesses circuit tester or oscillograph carries out observing and detecting, preliminary preparation is loaded down with trivial details, and the situation that wire contacts is bad easily occurs, testing efficiency is low, and reliability is low.
Utility model content
This utility model provides a kind of three-phase intelligent table carrier wave port testing device, to realize the Function detection to three-phase intelligent table carrier wave port, and is effectively improved testing efficiency and reliability.
This utility model embodiment provides a kind of three-phase intelligent table carrier wave port testing device, including:
Micro-control unit, functional test unit, power subsystem, port junction unit and man-machine interaction unit;
Described port junction unit is for being connected with described three-phase intelligent table carrier wave port;
Described functional test unit is connected with described port junction unit and described micro-control unit respectively, for the input signal obtained from described three-phase intelligent table carrier wave port is transferred to described micro-control unit, receives the output signal of described micro-control unit and be transferred to described three-phase intelligent table carrier wave port;
Described man-machine interaction unit and described micro-control unit connect, and for the test instruction of user is transferred to described micro-control unit, and according to the displaying instruction obtained from described micro-control unit, test result are showed user;
Described micro-control unit, for receiving the described test instruction that described man-machine interaction unit obtains, in conjunction with the described input signal obtained from described functional test unit, generate described output signal and feed back to described functional test unit, generate corresponding described displaying instruction feedback to described man-machine interaction unit;
Described power subsystem is connected with described port junction unit, power supply is obtained from the power supply interface of described three-phase intelligent table carrier wave port by described port junction unit, and be connected with described micro-control unit, described functional test unit and described man-machine interaction unit respectively, for its power supply.
Further, described functional test unit, including:
Carrier wave port test subelement, band load test subelement and negative phase sequence test subelement;
Described carrier wave port test subelement is connected by the described port junction unit communication interface with described three-phase intelligent table carrier wave port and state interface, and be connected with described micro-control unit, for connecting described micro-control unit and described communication interface, realize described micro-control unit and the communication of described three-phase intelligent table, the output of described micro-control unit is arranged instruction export to described state interface debugging export pin is set, the level signal of the State-output pin of described state interface is fed back to described micro-control unit;
Described it is connected with the power supply interface of described three-phase intelligent table carrier wave port by described port junction unit with load test subelement, the described load with load test subelement controls end and is connected with the load control terminal of described micro-control unit, realize according to the load control instruction obtained from described load control terminal described with the break-make of load in load test subelement, and the voltage that described power supply interface exports is transferred to the analog and digital signal Converting terminal of described micro-control unit;
Described negative phase sequence test subelement is connected by the three-phase electricity interface of described port junction unit with described three-phase intelligent table carrier wave port, and is transferred to the negative phase sequence detection terminal of described micro-control unit after the forceful electric power signal of described three-phase electricity interface output is converted to weak electric signal.
Further, described micro-control unit is single-chip minimum system, described single-chip microcomputer is for receiving the described test instruction that described man-machine interaction unit obtains, in conjunction with the described input signal obtained from described functional test unit, generate described output signal and feed back to described functional test unit, generate corresponding described displaying instruction feedback to described man-machine interaction unit.
Further, described port junction unit, including:
Being distributed in 20 contact pins at the described three-phase intelligent table carrier wave port testing device back side, described functional test unit is connected with described three-phase intelligent table carrier wave port by described contact pin.
Further, described band load test subelement, including:
Two grades of subelements of dividing potential drop, the voltage for being exported by described power supply interface exports the analog and digital signal Converting terminal to described micro-control unit after passing through impedor dividing potential drop; And
Two grades of subelements of load break-make, control described with the break-make of load in load test subelement for the described load control instruction sent according to described micro-control unit by switch element.
Further, described negative phase sequence test subelement, including:
First dividing potential drop rectification branch road, the second dividing potential drop rectification branch road, the 3rd dividing potential drop rectification branch road, double D trigger, electric capacity, the first diode, the second diode, the first audion and relay;
The input of described first dividing potential drop rectification branch road, the input of described second dividing potential drop rectification branch road and the input of described 3rd dividing potential drop rectification branch road connect respectively through the A phase electric terminal in described port junction unit and described three-phase electricity interface, B phase electric terminal and C phase electric terminal;
The input of described first to the 3rd dividing potential drop rectification branch road connects neutral terminal respectively through the first divider resistance and second divider resistance of series connection, the positive pole of described commutation diode and the connection node of the first divider resistance and the second divider resistance connect, the negative pole of described commutation diode connects the negative pole of described Zener diode by described current-limiting resistance, the plus earth of described Zener diode, the connection node of the negative pole of described current-limiting resistance and described Zener diode is as the outfan of described first to the 3rd dividing potential drop rectification branch road;
The outfan of described first dividing potential drop rectification branch road connects the first input end of clock of described double D trigger, the outfan of described second dividing potential drop rectification branch road connects the second clock input of described double D trigger, the outfan of described 3rd dividing potential drop rectification branch road connects the positive pole of described first diode by described electric capacity, the negative pole of described first diode is simultaneously connected with the first directreset terminal and second directreset terminal of described double D trigger, and the positive pole of described first diode and negative pole are respectively through ground resistance earth;
First directset terminal of described double D trigger and the second directset terminal ground connection, first data input pin of described double D trigger connects the+12VA power supply terminal of described power subsystem, and the second true form outfan of described double D trigger connects the base stage of described first audion;
The grounded emitter of described first audion, the colelctor electrode of described first audion connects the drive end of described relay, another drive end of described relay and described power subsystem connect, described second diodes in parallel is at two drive ends of relay, the public terminal ground connection of described relay, the normally opened contact of described relay is connected with described power subsystem, and the outfan as described negative phase sequence test subelement is connected with the negative phase sequence detection terminal of described micro-control unit.
Further, described man-machine interaction unit, including:
Instruction input subelement and result show subelement;
Described instruction input subelement, for transmitting described test instruction to described micro-control unit;
Described result shows subelement, for showing corresponding test result according to the displaying instruction obtained from described micro-control unit.
Further, described instruction input subelement, including:
First to fourth button and double-point double-throw switch, and be connected with described micro-control unit respectively;
Described double-point double-throw switch, for described micro-control unit test transmission mode instruction, selecting automatic test pattern or debugging mode;
Described first button, for, under debugging mode, testing instruction to described micro-control unit transmission state output pin;
Accordingly, described micro-control unit, it is additionally operable to, after the described State-output pin test instruction receiving described first button transmission, obtain the level signal of described State-output pin, generate the first displaying instruction;
Described second button, for, under debugging mode, arranging pin test instruction to the transmission debugging output of described micro-control unit;
Accordingly, described micro-control unit, is additionally operable to after the described debugging output receiving described second button transmission arranges pin test instruction, arranges pin transmission debugging output to described debugging output and arranges instruction, and with described three-phase intelligent table communication after, generate second displaying instruction;
Described 3rd button, under debugging mode, to described micro-control unit traffic load aptitude tests instruction;
Accordingly, described micro-control unit, it is additionally operable to, after the described load capacity test instruction receiving described 3rd button transmission, by the described voltage obtaining the output of described power supply interface with load test subelement, and generate the 3rd displaying instruction;
Described 4th button, for, under debugging mode, transmitting negative phase sequence test instruction to described micro-control unit;
Accordingly, described micro-control unit, it is additionally operable to after the described negative phase sequence test instruction receiving described 4th button transmission, tests subelement by described negative phase sequence and obtain described weak electric signal, and generate the 4th displaying instruction.
Further, described result shows subelement, including:
First to the 6th light emitting diode, the first dichromatic LED, the second dichromatic LED and buzzer, and be connected with described micro-control unit respectively;
Described first dichromatic LED and described second dichromatic LED, for under automatic test pattern, the result receiving described micro-control unit shows instruction, represents that functional test is normal by glow green, represents that at least one functional test is wrong by burn red;
Described buzzer, under automatic test pattern, when at least one functional test is wrong, the result receiving described micro-control unit shows instruction, sends sound;
Described first light emitting diode, for described first show instruction under controlling luminous or extinguish, represent that the test of reporting events pin in described State-output pin is normal or mistake respectively;
Described second light emitting diode, for described first show instruction under controlling luminous or extinguish, represent that the test of carrier wave reset pin in described State-output pin is normal or mistake respectively;
Described 3rd light emitting diode, for described first show instruction under controlling luminous or extinguish, represent that the test of communication setting pin in described State-output pin is normal or mistake respectively;
Described 4th light emitting diode, for described second show instruction under controlling luminous or extinguish, represent that test that described debugging output arranges pin is normal or mistake respectively;
Described 5th light emitting diode, is used for showing luminous under instruction control the described 3rd or extinguishing, represents that described load capacity tests normal or mistake respectively;
Described 6th light emitting diode, is used for showing luminous under instruction control the described 4th or extinguishing, represents that described negative phase sequence tests normal or mistake respectively.
Further, described three-phase intelligent table carrier wave port testing device, also include:
Communication unit, and described micro-control unit connects, and is used for connecting host computer, it is achieved the communication of described host computer and described three-phase intelligent table carrier wave port testing device, and by described host computer, described three-phase intelligent table carrier wave port testing device is debugged.
The three-phase intelligent table carrier wave port testing device that this utility model provides is connected with three-phase intelligent table carrier wave port, and test the function of carrier wave port, solve three-phase intelligent table carrier wave port test wiring loaded down with trivial details, testing efficiency is low, the problem of poor reliability, it is achieved improve the effect of three-phase intelligent table carrier wave port test efficiency and testing reliability.
Accompanying drawing explanation
Fig. 1 is the structural representation of a kind of three-phase intelligent table carrier wave port testing device in this utility model embodiment one;
Fig. 2 is the structural representation of a kind of three-phase intelligent table carrier wave port testing device in this utility model embodiment two;
Fig. 3 is the circuit diagram of the micro-control unit in this utility model embodiment three;
Fig. 4 is the structural representation of the port junction unit in this utility model embodiment three;
Fig. 5 is the structural representation of a kind of three-phase intelligent table carrier wave port testing device in this utility model embodiment three;
Fig. 6 is the circuit diagram with load test subelement in this utility model embodiment three;
Fig. 7 is the circuit diagram of the negative phase sequence test subelement in this utility model embodiment three;
Fig. 8 is the circuit diagram of the carrier wave port test subelement in this utility model embodiment three;
Fig. 9 is the circuit diagram of the power subsystem in this utility model embodiment three;
Figure 10 is the circuit diagram of the man-machine interaction unit in this utility model embodiment three;
Figure 11 is the structural representation of the another kind of three-phase intelligent table carrier wave port testing device in this utility model embodiment three.
Detailed description of the invention
Below in conjunction with drawings and Examples, the utility model is described in further detail. It is understood that specific embodiment described herein is used only for explaining this utility model, but not to restriction of the present utility model. It also should be noted that, for the ease of describing, accompanying drawing illustrate only the part relevant to this utility model but not entire infrastructure.
Embodiment one
The structural representation of a kind of three-phase intelligent table carrier wave port testing device that Fig. 1 provides for this utility model embodiment one, this device includes:
Micro-control unit 11, functional test unit 12, power subsystem 13, port junction unit 14 and man-machine interaction unit 15.
Port junction unit 14 is for being connected with three-phase intelligent table carrier wave port.
Functional test unit 12 is connected with port junction unit 14 and micro-control unit 11 respectively, for the input signal obtained from three-phase intelligent table carrier wave port being transferred to micro-control unit 11, receiving the output signal of micro-control unit 11 and being transferred to three-phase intelligent table carrier wave port.
Man-machine interaction unit 15 and micro-control unit 11 connect, and for the test instruction of user is transferred to micro-control unit 11, and according to the displaying instruction obtained from micro-control unit 11, test result are showed user;
Micro-control unit 11, for receiving the test instruction that man-machine interaction unit 15 obtains, in conjunction with the input signal obtained from functional test unit 12, generates output signal and feeds back to functional test unit 12, and generation is corresponding shows that instruction feedback is to man-machine interaction unit 15.
Power subsystem 13 is connected with port junction unit 14, obtains power supply by port junction unit 14 from the power supply interface of three-phase intelligent table carrier wave port, and is connected with micro-control unit 11, functional test unit 12 and man-machine interaction unit 15 respectively, for its power supply.
Wherein, three-phase intelligent table carrier wave port includes: light current interface and forceful electric power interface, light current interface includes: 1 road transistor-transistor logic level TTL communication interface, 4 state interface and power supply interface, forceful electric power interface includes: the A phase of three-phase electricity interface, B phase, C phase and the neutral conductor. Functional test unit 12 is connected with light current interface and the forceful electric power interface of three-phase intelligent table carrier wave port by port junction unit 14, the signal of three-phase intelligent table carrier wave port output is transferred to microprocessing unit 11 after functional test unit 12 processes, the signal of microprocessing unit 11 output feeds back to three-phase intelligent table carrier wave port through functional test unit 12, the signal obtained is processed by microprocessing unit 11, and judge that whether the function tested is normal, test result is exported and is shown to man-machine interaction unit 15.In test process, test instruction is transferred to microprocessing unit 11 by man-machine interaction unit 15 by user, selects the test pattern of three-phase intelligent table carrier wave port testing device, and carries out the functional test being correlated with. Power subsystem 13 is the unit needing power supply of three-phase intelligent table carrier wave port testing device, it is provided that the regulated power supply of relevant voltage.
The three-phase intelligent table carrier wave port testing device that the technical scheme of the present embodiment provides is connected with three-phase intelligent table carrier wave port, and test the function of carrier wave port, solve three-phase intelligent table carrier wave port test wiring loaded down with trivial details, testing efficiency is low, the problem of poor reliability, it is achieved improve the effect of three-phase intelligent table carrier wave port test efficiency and testing reliability.
Embodiment two
The technical scheme that the present embodiment provides is on the basis of the technical scheme of above-described embodiment, refines further, it is preferred that as in figure 2 it is shown, functional test unit 12, including:
Carrier wave port test subelement 121, band load test subelement 122 and negative phase sequence test subelement 123.
Carrier wave port test subelement 121 is connected with communication interface and the state interface of three-phase intelligent table carrier wave port by port junction unit 14, and be connected with micro-control unit 11, for connecting micro-control unit 11 and communication interface, realize micro-control unit 11 and the communication of three-phase intelligent table, the output of micro-control unit 11 is arranged instruction export to state interface debugging export pin is set, the level signal of the State-output pin of state interface is fed back to micro-control unit 11.
It is connected with the power supply interface of three-phase intelligent table carrier wave port by port junction unit 14 with load test subelement 122, load with load test subelement 122 controls end and is connected with the load control terminal of micro-control unit 11, realize with the break-make of load in load test subelement 122 according to the load control instruction obtained from load control terminal, and the voltage that power supply interface exports is transferred to the analog and digital signal Converting terminal of micro-control unit 11.
Negative phase sequence test subelement 123 is connected with the three-phase electricity interface of three-phase intelligent table carrier wave port by port junction unit 14, and is transferred to the negative phase sequence detection terminal of micro-control unit 11 after the forceful electric power signal of three-phase electricity interface output is converted to weak electric signal.
Wherein, carrier wave port test subelement 121 and micro-control unit 11 have coordinated the communication interface of three-phase intelligent table carrier wave port and the test of state interface, coordinated the load capacity test of the power supply interface of three-phase intelligent table carrier wave port with load test subelement 122 micro-control unit 11, negative phase sequence test subelement 123 and micro-control unit 11 have coordinated the negative phase sequence test of the three-phase electricity interface of three-phase intelligent table carrier wave port.
The technical scheme of the present embodiment, the load capacity of communication interface and the test of state interface, power supply interface that three-phase intelligent table carrier wave port testing device can realize three-phase intelligent table carrier wave port tests and the negative phase sequence of three-phase electricity interface is tested, the wiring on each interface of three-phase intelligent table carrier wave port need not be changed during test, improve testing efficiency.
Embodiment three
The present embodiment above-described embodiment provide technical scheme basis on, refinement further, micro-control unit 11 is single-chip minimum system, single-chip microcomputer is for receiving the test instruction that man-machine interaction unit 15 obtains, in conjunction with the input signal obtained from functional test unit 12, generate output signal and feed back to functional test unit 12, generate corresponding displaying instruction feedback to man-machine interaction unit 15.Preferably, single-chip microcomputer is the STM32 series monolithic of ST Microelectronics. Example, singlechip minimum system circuit figure is as shown in Figure 3, single-chip microcomputer U3 is the single-chip microcomputer of STM32F101 series 48 pins, its 19 pin is Analog-digital Converter pin, can will enter into the analog voltage signal of 19 pins and be converted to digital voltage signal, the load capacity for three-phase intelligent table carrier wave port is tested.
Further, as shown in Figure 4, port junction unit 14, including:
Being distributed in 20 contact pins 141 at three-phase intelligent table carrier wave port testing device 10 back side, functional test unit 12 is connected with three-phase intelligent table carrier wave port by contact pin 141.
As shown in Figure 4, the position distribution correspondence three-phase intelligent table carrier wave port of 20 contact pins, wherein the light current interface of 12 contact pin correspondence three-phase intelligent table carrier wave ports, the forceful electric power interface of other 8 contact pin correspondence three-phase intelligent table carrier wave ports. When testing, insert three-phase intelligent table carrier wave port by corresponding for contact pin 141, it is achieved the connection of port junction unit 14 and three-phase intelligent table carrier wave port.
Further, as it is shown in figure 5, band load test subelement 122, including:
Two grades of subelements 1221 of dividing potential drop, export the analog and digital signal Converting terminal to micro-control unit 11 for the voltage exported by power supply interface by after impedor dividing potential drop; And two grades of subelements 1222 of load break-make, controlled with the break-make of load in load test subelement 122 by switch element for the load control instruction sent according to micro-control unit 11.
Example, Fig. 6 is the circuit diagram with load test subelement, wherein, two grades of subelements 1221 of dividing potential drop include: divider resistance R1 and R2, R1 resistance is 120K Ω, R2 resistance is 15K Ω, series arm one end of divider resistance R1 and R2 connects the power supply interface of three-phase intelligent table carrier wave port, other end ground connection, 19 pins connecting single-chip microcomputer U3 in node and Fig. 3 of divider resistance R1 and R2 connect, and the analog voltage signal that 19 pins obtain is converted to digital voltage signal by single-chip microcomputer U3. Two grades of subelements 1222 of load break-make include: the first switch triode Q1 and second switch audion Q2, and the first switch triode Q1 is PNP type triode, and second switch audion Q2 is NPN type triode. The emitter stage of the first switch triode Q1 connects the power supply interface of three-phase intelligent table carrier wave port, colelctor electrode passes through ground resistance earth, base stage is connected with the colelctor electrode of second switch audion Q2, the grounded emitter of second switch audion Q2,20 pins of the single-chip microcomputer U3 in the base stage of second switch audion Q2 and Fig. 3 connect, 20 pins of single-chip microcomputer U3 are I/O interface, and 20 pin configuration are output pin, it is achieved single-chip microcomputer U3 controls the break-make of load.
Further, as it is shown in fig. 7, negative phase sequence test subelement 123, including:
First dividing potential drop rectification branch road, the second dividing potential drop rectification branch road, the 3rd dividing potential drop rectification branch road, double D trigger U1, electric capacity C5, the first diode D7, the second diode D8, the first audion Q3 and relay J 1, it is preferred that the model of double D trigger U1 is CD4013.
The input VA of the first dividing potential drop rectification branch road, the second dividing potential drop rectification branch road input VB and the three dividing potential drop rectification branch road input VC respectively through the A phase electric terminal in port junction unit 14 and three-phase electricity interface, B phase electric terminal and C phase electric terminal connect.
The input VA of the first dividing potential drop rectification branch road connects neutral terminal VN by the first divider resistance R10, R11, R12 and the second divider resistance R19 connected, the positive pole of commutation diode D1 and the connection node of the first divider resistance R12 and the second divider resistance R19 connect, the negative pole of commutation diode D1 connects the negative pole of Zener diode D4 by current-limiting resistance R23, the plus earth of Zener diode D4, the connection node of the negative pole of current-limiting resistance R23 and Zener diode D4 is as the outfan of the first dividing potential drop rectification branch road.
As it is shown in fig. 7, second and the 3rd dividing potential drop rectification branch road and the first dividing potential drop rectification branch road there is identical structure.
The outfan of the first dividing potential drop rectification branch road connects first input end of clock of double D trigger U1, i.e. 3 pins of double D trigger U1, the outfan of the second dividing potential drop rectification branch road connects the second clock input of double D trigger U1, i.e. 11 pins of double D trigger U1, the outfan of the 3rd dividing potential drop rectification branch road connects the positive pole of the first diode D7 by electric capacity C5, the negative pole of the first diode D7 is simultaneously connected with the first directreset terminal and second directreset terminal of double D trigger, i.e. 4 pins of double D trigger U1 and 10 pins, the positive pole of the first diode D7 and negative pole are respectively through earth resistance R26 and R27 ground connection.
First directset terminal of double D trigger U1 and the second directset terminal ground connection, i.e. 6 pins of double D trigger U1 and 8 pin ground connection, first data input pin of double D trigger U1, i.e. 5 pins of double D trigger U1, connect+12VA the power supply terminal of power subsystem, the second true form outfan of double D trigger U1, i.e. 13 pins of double D trigger U1, connect the base stage of the first audion Q3.
The grounded emitter of the first audion Q3, the drive end of the collector connection relay J1 of the first audion Q3, another drive end of relay J 1 and power subsystem connect, namely another drive end of relay J 1 connects+12VA power supply terminal, second diode D8 is connected in parallel on two drive ends of relay J 1, the public terminal ground connection of relay J 1, the normally opened contact of relay J 1 is connected with power subsystem, namely the normally opened contact of relay J 1 connects+3.3V power supply terminal by earth resistance R29, and the outfan as negative phase sequence test subelement 123 is connected with the negative phase sequence detection terminal of micro-control unit 11.
Further, as shown in Figure 8, carrier wave port test subelement 121, including: current-limiting resistance R32 to R39. 6*2 in Fig. 8 arranges 12 contact pins that contact pin XS is the light current interface connecting three-phase intelligent table carrier wave port in port junction unit 14 for correspondence. Current-limiting resistance R33, R35, R36 and R38 are used for by contact pin successively by the data receiver pin PLCRXD of the reporting events pin EVENTOUT of three-phase intelligent table carrier wave port, carrier wave reset pin PLCRST, communication setting pin PLCSET and communication interface 42 pins of single-chip microcomputer U3,43 pins, 46 pins and 31 pins being connected in Fig. 3, wherein, 42 pins of single-chip microcomputer U3,43 pins and 46 pins are I/O pin, and are configured to input pattern. The communication debugging output of three-phase intelligent table carrier wave port arranges pin STA 45 pins being connected single-chip microcomputer U3 in Fig. 3 by contact pin, and 45 pins of single-chip microcomputer U3 are I/O pin, and are configured to output mode. The data of the communication interface of three-phase intelligent table carrier wave port send pin PLCTXD 30 pins connecting single-chip microcomputer U3 in Fig. 3 by contact pin, 30 pins of single-chip microcomputer U3 and the communication pin that 31 pins are single-chip microcomputer U3, for and three-phase intelligent table communication. Current-limiting resistance R32, R34, R37 and R39 one end connect power subsystem 13+3.3V power supply terminal.
Further, as it is shown in figure 9, power subsystem 13, including:
Scalable 3 rectifies Voltagre regulator U2, magnetic bead L1, monolithic bipolar Linear integrated circuit U201, magnet ring T201, transistor output photoelectric bonder U202 and controllable accurate source of stable pressure U203. Preferably, it is LM317 that scalable 3 rectifies the model of Voltagre regulator U2, for+12V voltage pressure regulation output+3.3V the voltage that the power supply interface of three-phase intelligent table carrier wave port is exported, wherein magnetic bead L1 is used for filtering noise, ensureing the stability of+3.3V voltage of output ,+3.3V power supply terminal is for powering for carrier wave port test subelement 121, negative phase sequence test subelement 123, man-machine interaction unit 15 and micro-control unit 11.The model of monolithic bipolar Linear integrated circuit U201 is MC34063, the model of transistor output photoelectric bonder U202 is TLP421, the model of controllable accurate source of stable pressure U203 is TP431, as shown in Figure 9, monolithic bipolar Linear integrated circuit U201, controllable accurate source of stable pressure U202, controllable accurate source of stable pressure U203, magnet ring T201 and peripheral electric capacity, resistance, diode and inductance composition mu balanced circuit, for+12V voltage voltage stabilizing the output that the power supply interface of three-phase intelligent table carrier wave port is exported, exported by+12VA terminal, power for band load test subelement 122.
Further, as shown in Figure 10, man-machine interaction unit 15, including:
Instruction input subelement 151 and result show subelement 152;
Instruction input subelement 151, is used for micro-control unit test transmission instruction;
Result shows subelement 152, for showing corresponding test result according to the displaying instruction obtained from micro-control unit.
Further, instruction input subelement 151, including:
First button K1, the second button K2, the 3rd button K3, the 4th button K4 and double-point double-throw switch S1, and be connected with micro-control unit 11 respectively. Concrete, first button K1, the second button K2, the 3rd button K3, the 4th button K4 and double-point double-throw switch S1 are connected with 28 pins of the single-chip microcomputer U3 in Fig. 3,27 pins, 26 pins, 25 pins and 32 pins respectively, wherein, 28 pins of single-chip microcomputer U3,27 pins, 26 pins, 25 pins and 32 pins are I/O pin, and are configured to input pattern.
Double-point double-throw switch S1, for micro-control unit 11 test transmission mode instruction, selecting automatic test pattern or debugging mode.
First button K1, for, under debugging mode, testing instruction to micro-control unit 11 transmission state output pin.
Accordingly, micro-control unit 11, it is additionally operable to, after the State-output pin test instruction receiving the first button K1 transmission, obtain the level signal of State-output pin, generate the first displaying instruction.
Second button K2, for, under debugging mode, arranging pin test instruction to micro-control unit 11 transmission debugging output.
Accordingly, micro-control unit 11, be additionally operable to after the debugging output receiving the second button K2 transmission arranges pin test instruction, pin be set to debugging output and send debugging output instruction is set, and with three-phase intelligent table communication after, generate the second displaying instruction.
3rd button K3, under debugging mode, to micro-control unit 11 traffic load aptitude tests instruction.
Accordingly, micro-control unit 11, it is additionally operable to after the load capacity test instruction receiving the 3rd button K3 transmission, by obtaining the voltage of power supply interface output with load test subelement 122, and generates the 3rd displaying instruction.
4th button K4, for, under debugging mode, transmitting negative phase sequence test instruction to micro-control unit 11.
Accordingly, micro-control unit 11, it is additionally operable to after the negative phase sequence test instruction receiving the 4th button K4 transmission, tests subelement 123 by negative phase sequence and obtain weak electric signal, and generate the 4th displaying instruction.
Further, result shows subelement 152, including:
First light emitting diode D11, the second light emitting diode D12, the 3rd light emitting diode D13, the 4th light emitting diode D14, the 5th light emitting diode D15, the 6th light emitting diode D16, the first dichromatic LED D21, the second dichromatic LED D22 and buzzer BZ1, and be connected with micro-control unit 11 respectively.Concrete, the first light emitting diode D11, the second light emitting diode D12, the 3rd light emitting diode D13, the 4th light emitting diode D14, the 5th light emitting diode D15 and the six light emitting diode D16 are corresponding with 10 pins of the single-chip microcomputer U3 in Fig. 3,11 pins, 12 pins, 13 pins, 14 pins and 15 pins respectively to be connected. first dichromatic LED D21 and the second dichromatic LED D22 example for positive pole red and green color light emitting diode altogether, and public positive pole connects+3.3V power supply terminal, the red-light LED pin of the first dichromatic LED D21 and green light LED pin are connected with 16 pins of single-chip microcomputer U3 in Fig. 3 and 17 pins, the red-light LED pin of the second dichromatic LED D22 and green light LED pin are connected with 30 pins and 31 pins of single-chip microcomputer U3, 16 pins of single-chip microcomputer U3, 17 pins are I/O pin, and it is configured as output to pattern, 30 pins and 31 pins can be multiplexed with I/O pin, and it is configured as output to pattern. buzzer BZ1 is connected by 2 pins of the single-chip microcomputer U3 in audion Q4 and Fig. 3, and 2 pins of single-chip microcomputer U3 are I/O pin, and are configured as output to pattern.
First dichromatic LED D21 and the second dichromatic LED D22, for under automatic test pattern, the result receiving micro-control unit 11 shows instruction, represents that functional test is normal by glow green, represents that at least one functional test is wrong by burn red;
Buzzer BZ1, under automatic test pattern, when at least one functional test is wrong, the result receiving micro-control unit 11 shows instruction, sends sound;
First light emitting diode D11, for first show instruction under controlling luminous or extinguish, represent that the test of reporting events pin in State-output pin is normal or mistake respectively;
Second light emitting diode D12, for first show instruction under controlling luminous or extinguish, represent that the test of carrier wave reset pin in State-output pin is normal or mistake respectively;
3rd light emitting diode D13, for first show instruction under controlling luminous or extinguish, represent that the test of communication setting pin in State-output pin is normal or mistake respectively;
4th light emitting diode D14, for second show instruction under controlling luminous or extinguish, represent that debugging output arranges that the test of pin is normal or mistake respectively;
5th light emitting diode D15, for luminous or extinguishing under controlling in the 3rd displaying instruction, represents that load capacity tests normal or mistake respectively;
6th light emitting diode D16, for luminous or extinguishing under controlling in the 4th displaying instruction, represents that negative phase sequence tests normal or mistake respectively.
Further, as shown in figure 11, three-phase intelligent table carrier wave port testing device, also include:
Communication unit 16, and micro-control unit 11 connects, and is used for connecting host computer, it is achieved the communication of host computer and three-phase intelligent table carrier wave port testing device 10, and by host computer, three-phase intelligent table carrier wave port testing device 10 is debugged.
Note, above are only preferred embodiment of the present utility model and institute's application technology principle. It will be appreciated by those skilled in the art that this utility model is not limited to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute without departing from protection domain of the present utility model. Therefore, although this utility model being described in further detail by above example, but this utility model is not limited only to above example, when conceiving without departing from this utility model, other Equivalent embodiments more can also be included, and scope of the present utility model is determined by appended right.

Claims (10)

1. a three-phase intelligent table carrier wave port testing device, it is characterised in that including:
Micro-control unit, functional test unit, power subsystem, port junction unit and man-machine interaction unit;
Described port junction unit is for being connected with described three-phase intelligent table carrier wave port;
Described functional test unit is connected with described port junction unit and described micro-control unit respectively, for the input signal obtained from described three-phase intelligent table carrier wave port is transferred to described micro-control unit, receives the output signal of described micro-control unit and be transferred to described three-phase intelligent table carrier wave port;
Described man-machine interaction unit and described micro-control unit connect, and for the test instruction of user is transferred to described micro-control unit, and according to the displaying instruction obtained from described micro-control unit, test result are showed user;
Described micro-control unit, for receiving the described test instruction that described man-machine interaction unit obtains, in conjunction with the described input signal obtained from described functional test unit, generate described output signal and feed back to described functional test unit, generate corresponding described displaying instruction feedback to described man-machine interaction unit;
Described power subsystem is connected with described port junction unit, power supply is obtained from the power supply interface of described three-phase intelligent table carrier wave port by described port junction unit, and be connected with described micro-control unit, described functional test unit and described man-machine interaction unit respectively, for its power supply.
2. three-phase intelligent table carrier wave port testing device according to claim 1, it is characterised in that described functional test unit, including:
Carrier wave port test subelement, band load test subelement and negative phase sequence test subelement;
Described carrier wave port test subelement is connected by the described port junction unit communication interface with described three-phase intelligent table carrier wave port and state interface, and be connected with described micro-control unit, for connecting described micro-control unit and described communication interface, realize described micro-control unit and the communication of described three-phase intelligent table, the output of described micro-control unit is arranged instruction export to described state interface debugging export pin is set, the level signal of the State-output pin of described state interface is fed back to described micro-control unit;
Described it is connected with the power supply interface of described three-phase intelligent table carrier wave port by described port junction unit with load test subelement, the described load with load test subelement controls end and is connected with the load control terminal of described micro-control unit, realize according to the load control instruction obtained from described load control terminal described with the break-make of load in load test subelement, and the voltage that described power supply interface exports is transferred to the analog and digital signal Converting terminal of described micro-control unit;
Described negative phase sequence test subelement is connected by the three-phase electricity interface of described port junction unit with described three-phase intelligent table carrier wave port, and is transferred to the negative phase sequence detection terminal of described micro-control unit after the forceful electric power signal of described three-phase electricity interface output is converted to weak electric signal.
3. three-phase intelligent table carrier wave port testing device according to claim 1, it is characterised in that:
Described micro-control unit is single-chip minimum system, described single-chip microcomputer is for receiving the described test instruction that described man-machine interaction unit obtains, in conjunction with the described input signal obtained from described functional test unit, generate described output signal and feed back to described functional test unit, generate corresponding described displaying instruction feedback to described man-machine interaction unit.
4. three-phase intelligent table carrier wave port testing device according to claim 1, it is characterised in that described port junction unit, including:
Being distributed in 20 contact pins at the described three-phase intelligent table carrier wave port testing device back side, described functional test unit is connected with described three-phase intelligent table carrier wave port by described contact pin.
5. three-phase intelligent table carrier wave port testing device according to claim 2, it is characterised in that described band load test subelement, including:
Two grades of subelements of dividing potential drop, the voltage for being exported by described power supply interface exports the analog and digital signal Converting terminal to described micro-control unit after passing through impedor dividing potential drop; And
Two grades of subelements of load break-make, control described with the break-make of load in load test subelement for the described load control instruction sent according to described micro-control unit by switch element.
6. three-phase intelligent table carrier wave port testing device according to claim 2, it is characterised in that described negative phase sequence test subelement, including:
First dividing potential drop rectification branch road, the second dividing potential drop rectification branch road, the 3rd dividing potential drop rectification branch road, double D trigger, electric capacity, the first diode, the second diode, the first audion and relay;
The input of described first dividing potential drop rectification branch road, the input of described second dividing potential drop rectification branch road and the input of described 3rd dividing potential drop rectification branch road connect respectively through the A phase electric terminal in described port junction unit and described three-phase electricity interface, B phase electric terminal and C phase electric terminal;
The input of described first to the 3rd dividing potential drop rectification branch road connects neutral terminal respectively through the first divider resistance and second divider resistance of series connection, the positive pole of described commutation diode and the connection node of the first divider resistance and the second divider resistance connect, the negative pole of described commutation diode connects the negative pole of Zener diode by current-limiting resistance, the plus earth of described Zener diode, the connection node of the negative pole of described current-limiting resistance and described Zener diode is as the outfan of described first to the 3rd dividing potential drop rectification branch road;
The outfan of described first dividing potential drop rectification branch road connects the first input end of clock of described double D trigger, the outfan of described second dividing potential drop rectification branch road connects the second clock input of described double D trigger, the outfan of described 3rd dividing potential drop rectification branch road connects the positive pole of described first diode by described electric capacity, the negative pole of described first diode is simultaneously connected with the first directreset terminal and second directreset terminal of described double D trigger, and the positive pole of described first diode and negative pole are respectively through ground resistance earth;
First directset terminal of described double D trigger and the second directset terminal ground connection, first data input pin of described double D trigger connects the+12VA power supply terminal of described power subsystem, and the second true form outfan of described double D trigger connects the base stage of described first audion;
The grounded emitter of described first audion, the colelctor electrode of described first audion connects the drive end of described relay, another drive end of described relay and described power subsystem connect, described second diodes in parallel is at two drive ends of relay, the public terminal ground connection of described relay, the normally opened contact of described relay is connected with described power subsystem, and the outfan as described negative phase sequence test subelement is connected with the negative phase sequence detection terminal of described micro-control unit.
7. three-phase intelligent table carrier wave port testing device according to claim 2, it is characterised in that described man-machine interaction unit, including:
Instruction input subelement and result show subelement;
Described instruction input subelement, for transmitting described test instruction to described micro-control unit;
Described result shows subelement, for showing corresponding test result according to the displaying instruction obtained from described micro-control unit.
8. three-phase intelligent table carrier wave port testing device according to claim 7, it is characterised in that described instruction input subelement, including:
First to fourth button and double-point double-throw switch, and be connected with described micro-control unit respectively;
Described double-point double-throw switch, for described micro-control unit test transmission mode instruction, selecting automatic test pattern or debugging mode;
Described first button, for, under debugging mode, testing instruction to described micro-control unit transmission state output pin;
Accordingly, described micro-control unit, it is additionally operable to, after the described State-output pin test instruction receiving described first button transmission, obtain the level signal of described State-output pin, generate the first displaying instruction;
Described second button, for, under debugging mode, arranging pin test instruction to the transmission debugging output of described micro-control unit;
Accordingly, described micro-control unit, is additionally operable to after the described debugging output receiving described second button transmission arranges pin test instruction, arranges pin transmission debugging output to described debugging output and arranges instruction, and with described three-phase intelligent table communication after, generate second displaying instruction;
Described 3rd button, under debugging mode, to described micro-control unit traffic load aptitude tests instruction;
Accordingly, described micro-control unit, it is additionally operable to, after the described load capacity test instruction receiving described 3rd button transmission, by the described voltage obtaining the output of described power supply interface with load test subelement, and generate the 3rd displaying instruction;
Described 4th button, for, under debugging mode, transmitting negative phase sequence test instruction to described micro-control unit;
Accordingly, described micro-control unit, it is additionally operable to after the described negative phase sequence test instruction receiving described 4th button transmission, tests subelement by described negative phase sequence and obtain described weak electric signal, and generate the 4th displaying instruction.
9. three-phase intelligent table carrier wave port testing device according to claim 8, it is characterised in that described result shows subelement, including:
First to the 6th light emitting diode, the first dichromatic LED, the second dichromatic LED and buzzer, and be connected with described micro-control unit respectively;
Described first dichromatic LED and described second dichromatic LED, for under automatic test pattern, the result receiving described micro-control unit shows instruction, normal by green color development light representations functional test, represents that at least one functional test is wrong by burn red;
Described buzzer, under automatic test pattern, when at least one functional test is wrong, the result receiving described micro-control unit shows instruction, sends sound;
Described first light emitting diode, for described first show instruction under controlling luminous or extinguish, represent that the test of reporting events pin in described State-output pin is normal or mistake respectively;
Described second light emitting diode, for described first show instruction under controlling luminous or extinguish, represent that the test of carrier wave reset pin in described State-output pin is normal or mistake respectively;
Described 3rd light emitting diode, for described first show instruction under controlling luminous or extinguish, represent that the test of communication setting pin in described State-output pin is normal or mistake respectively;
Described 4th light emitting diode, for described second show instruction under controlling luminous or extinguish, represent that test that described debugging output arranges pin is normal or mistake respectively;
Described 5th light emitting diode, is used for showing luminous under instruction control the described 3rd or extinguishing, represents that described load capacity tests normal or mistake respectively;
Described 6th light emitting diode, is used for showing luminous under instruction control the described 4th or extinguishing, represents that described negative phase sequence tests normal or mistake respectively.
10. three-phase intelligent table carrier wave port testing device according to claim 1, it is characterised in that also include:
Communication unit, and described micro-control unit connects, and is used for connecting host computer, it is achieved the communication of described host computer and described three-phase intelligent table carrier wave port testing device, and by described host computer, described three-phase intelligent table carrier wave port testing device is debugged.
CN201521106544.2U 2015-12-28 2015-12-28 Three -phase smart meter carrier wave port testing arrangement Active CN205317924U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201521106544.2U CN205317924U (en) 2015-12-28 2015-12-28 Three -phase smart meter carrier wave port testing arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201521106544.2U CN205317924U (en) 2015-12-28 2015-12-28 Three -phase smart meter carrier wave port testing arrangement

Publications (1)

Publication Number Publication Date
CN205317924U true CN205317924U (en) 2016-06-15

Family

ID=56199571

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201521106544.2U Active CN205317924U (en) 2015-12-28 2015-12-28 Three -phase smart meter carrier wave port testing arrangement

Country Status (1)

Country Link
CN (1) CN205317924U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109753100A (en) * 2019-02-18 2019-05-14 普联技术有限公司 A kind of current limliting output dynamic regulating circuit
CN113210462A (en) * 2021-05-25 2021-08-06 珠海格力智能装备有限公司 Method and device for monitoring working abnormity of pipe expander

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109753100A (en) * 2019-02-18 2019-05-14 普联技术有限公司 A kind of current limliting output dynamic regulating circuit
CN113210462A (en) * 2021-05-25 2021-08-06 珠海格力智能装备有限公司 Method and device for monitoring working abnormity of pipe expander
CN113210462B (en) * 2021-05-25 2023-02-17 珠海格力智能装备有限公司 Method and device for monitoring working abnormity of pipe expander

Similar Documents

Publication Publication Date Title
CN103063979B (en) Load open-circuit detection circuit
CN105372480A (en) Over voltage, under voltage and phase failure detection circuit for charging pile
CN205665317U (en) Cable is to ground parameter testing appearance
CN105245126A (en) Teaching inverter system module
CN205317924U (en) Three -phase smart meter carrier wave port testing arrangement
CN2826445Y (en) Intelligent line-checking machine
CN107426853A (en) A kind of the LED Solar Light circuit
CN205265658U (en) Switching signal input circuit
CN107255766A (en) The break detection circuit and its connection circuit of a kind of incremental encoder
CN202058289U (en) Inspection device for electricity utilization information acquisition terminal
CN101887099A (en) Rapid cable checking instrument
CN201724997U (en) Quick cable corrector
CN204154860U (en) A kind of circuit board detection device
CN207557357U (en) A kind of three-phase input power phase shortage detection circuit
CN206743602U (en) A kind of the LED Solar Light circuit
CN209313720U (en) A kind of frequency converter electrification circuit
CN209016796U (en) A kind of direct current cabinet with fault cues function
CN103236689A (en) Power quality diagnosis and management simulating device
CN202586752U (en) Low-voltage protection linear power supply circuit and television set
CN208752429U (en) A kind of system based on silicon controlled speed regulator
CN208999502U (en) A kind of intelligence adjustable battery group voltage analog device
CN209282854U (en) A kind of grid-connected full-bridge inverting driving chip of automatic synchronization
CN105119490A (en) Voltage-current dual output control circuit, constant-voltage constant-current power supply and display device
CN207424605U (en) For the DC voltage measurement of diesel generating set and output expansion module
CN207232249U (en) Subscribers' line checking device

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant