CN205302256U - Time synchronization system's apparent accuse terminal - Google Patents
Time synchronization system's apparent accuse terminal Download PDFInfo
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- CN205302256U CN205302256U CN201520985615.4U CN201520985615U CN205302256U CN 205302256 U CN205302256 U CN 205302256U CN 201520985615 U CN201520985615 U CN 201520985615U CN 205302256 U CN205302256 U CN 205302256U
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Abstract
The utility model relates to a time synchronization system's apparent accuse terminal, including data processing unit, display element, input unit, electrical unit, input unit comprises the several button, and display element comprises display screen and pilot lamp, and electrical unit is connected with data processing unit, display element, input unit respectively. The technique effect is that data processing has adopted TNKernel ARM embedded real -time operating system, has guaranteed that apparent accuse terminal has the high unity of time when processing time synchronization system data, display element carries out the real time output of state through display screen and pilot lamp dual mode, input unit can carry out input operation to time synchronization system through the button. Time synchronization system shows the accuse terminal and shows time synchronization system's function is more audio -visual, and convenience of customers operates more simultaneously.
Description
Technical field
This utility model relates to a kind of clock synchronization system, particularly to the aobvious control terminal of a kind of clock synchronization system.
Background technology
Clock synchronization system has the features such as high accuracy, working stability, Consumer's Experience diversification. This system is applicable to communications applications industry, such as fields such as power system, financial sector, industrial systems. The aobvious control terminal of clock synchronization system has the advantage such as real-time, visualized operation, it is integrated with TNKernelARM embedded real-time operating system most advanced, most widely used at present, the input-output equipment such as button, OLED display screen and display lamp it are equipped with at user interface, breach the limitation of original single dependence display lamp instruction, suffer from being widely applied in visualization field. Clock synchronization system is the time service equipment in the integrated Big Dipper, GPS, optical fiber B code, many kinds of time service sources of 2M, processes time service source information by reception, exports the information such as PPS, time. Therefore clock synchronization system need by the aobvious control terminal of clock synchronization system, it to be displayed, the operation such as control.
Summary of the invention
In view of prior art Problems existing, this utility model provides the aobvious control terminal of a kind of clock synchronization system, provides the aobvious of controllable visualization input and output to look unit to clock synchronization system. concrete technical scheme is: the aobvious control terminal of a kind of clock synchronization system, including input block, data processing unit, display unit, power subsystem, it is characterized in that: input equipment is several button composition, display unit is made up of display screen and display lamp, input block, data processing unit, the button one end that is linked as of display unit connects high level voltage, the other end is connected with the core processor I/O port in data processing unit respectively, when button is pressed, connect I/O pin display high level, data will be processed by core processor, it is contrary to button is upspring, it is connected to the I/O pin display low level on core processor, core processor will not be made a response, display lamp one end connects high level voltage, and the other end is connected with the I/O port of core processor respectively, and when the I/O pin on core processor sets low level, display lamp is bright, and when setting high level on the contrary, display lamp goes out,Display screen is connected with core processor I/O port, and power subsystem is connected power supply with data processing unit, display unit, input block respectively.
Described data processing unit have employed TNKernelARM embedded real-time operating system, can multi-threaded parallel work at normal Data processing.
Of the present utility model have the technical effect that, process data time and system high degree of uniformity, it is possible to intuitively system being carried out model selection by button and display screen, systemic-function shows more intuitively, and convenient user is operated.
Accompanying drawing explanation
Fig. 1 is that this utility model circuit connects block diagram.
Detailed description of the invention
As shown in Figure 1, a kind of aobvious control terminal of clock synchronization system, including input block, data processing unit, display unit, power subsystem, input block is several button composition, display unit is made up of display screen and display lamp, input block, data processing unit, connection between display unit is that button one end connects high level voltage, the other end is connected with the core processor I/O port in data processing unit respectively, when button is pressed, connect I/O pin display high level, data will be processed by core processor, it is contrary to button is upspring, it is connected to the I/O pin display low level on core processor, core processor will not be made a response, display lamp one end connects high level voltage, and the other end is connected with the I/O port of core processor respectively, and when the I/O pin on core processor sets low level, display lamp is bright, and when setting high level on the contrary, display lamp goes out, display screen is connected with core processor I/O port, and power subsystem is connected power supply with data processing unit, display unit, input block respectively.
Operation principle: the aobvious control terminal of clock synchronization system functionally can be divided into data processing unit, display unit, input block and power subsystem, data processing unit is the core of whole aobvious control terminal, have employed TNKernelARM embedded real-time operating system, can work by multi-threaded parallel at normal Data processing, mainly there is following work: 1, per second satellite navigation message data is received, is processed, it is ensured that the real-time of data; 2, data being displayed by OLED display screen and six display lamps when PPS rising edge, OLED display screen and core arm processor have employed employing rising edge triggering display mode can ensure that precision is at 50us, improves the precision of display; Display lamp is outut device, and one end connects high level voltage, and the other end is connected with the I/O port of core arm processor respectively, and when the I/O pin on ARM sets low level, display lamp is bright, and when setting high level on the contrary, display lamp goes out; 3, key-input operation, including model selection, ownship information inquiry etc., have employed Key dithering algorithm in the process of recognition by pressing keys, can avoid the interference of extraneous factor; Button is input equipment, one end connects high level voltage, the other end is connected with the I/O port of core arm processor respectively, when button is pressed, being connected to the I/O pin display high level on ARM, data will be processed by core processor, on the contrary when button is upspring, being connected to the I/O pin display low level on ARM, core processor will not be made a response; 4 and main frame carry out real-time Communication for Power, it is ensured that the efficient response of input and output.
Claims (2)
1. the aobvious control terminal of a clock synchronization system, including input block, data processing unit, display unit, power subsystem, it is characterized in that: input equipment is several button composition, display unit is made up of display screen and display lamp, input block, data processing unit, the button one end that is linked as of display unit connects high level voltage, the other end is connected with the core processor I/O port in data processing unit respectively, when button is pressed, connect I/O pin display high level, data will be processed by core processor, it is contrary to button is upspring, it is connected to the I/O pin display low level on core processor, core processor will not be made a response,Display lamp one end connects high level voltage, and the other end is connected with the I/O port of core processor respectively, and when the I/O pin on core processor sets low level, display lamp is bright, and when setting high level on the contrary, display lamp goes out; Display screen is connected with core processor I/O port, and power subsystem is connected power supply with data processing unit, display unit, input block respectively.
2. the aobvious control terminal of a kind of clock synchronization system as claimed in claim 1, it is characterised in that: described data processing unit have employed TNKernelARM embedded real-time operating system, can multi-threaded parallel work at normal Data processing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520985615.4U CN205302256U (en) | 2015-12-02 | 2015-12-02 | Time synchronization system's apparent accuse terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520985615.4U CN205302256U (en) | 2015-12-02 | 2015-12-02 | Time synchronization system's apparent accuse terminal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205302256U true CN205302256U (en) | 2016-06-08 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520985615.4U Active CN205302256U (en) | 2015-12-02 | 2015-12-02 | Time synchronization system's apparent accuse terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205302256U (en) |
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2015
- 2015-12-02 CN CN201520985615.4U patent/CN205302256U/en active Active
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |