CN205263796U - A debugging intervention device for flush bonding processor - Google Patents
A debugging intervention device for flush bonding processor Download PDFInfo
- Publication number
- CN205263796U CN205263796U CN201521079625.8U CN201521079625U CN205263796U CN 205263796 U CN205263796 U CN 205263796U CN 201521079625 U CN201521079625 U CN 201521079625U CN 205263796 U CN205263796 U CN 205263796U
- Authority
- CN
- China
- Prior art keywords
- module
- flush bonding
- debugging
- bonding processor
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The utility model provides a debugging intervention device for flush bonding processor, including interface module (11), encapsulation module (12), drive module (13), central processing unit CPU (14), data transceiver module (15), storage module (16) and clock (17), encapsulation module (12) is connected in interface module (11), and drive module (13) and central processing unit CPU (14) are connected respectively to encapsulation module (12), and central processing unit CPU (14) and data transceiver module (15) are connected respectively in drive module (13), data transceiver module (15) connection central processing unit CPU (14), central processing unit CPU (14) are all connected in storage module (16) and clock (17), use this device development treater, need not to pay close attention to the interface of the operating system that uses and treater, and improvement that can be by a wide margin telescopes the short -cycle based on flush bonding processor's development cost.
Description
Technical field
The utility model relates to processor debugging field, relates in particular to a kind of debugging intervention device for flush bonding processor.
Background technology
In embedded-type software architecture, the hardware interface of different processor and programmed method can be variant, the interface that different operating system provides also can be variant, therefore in the time that operating system or processor change, device drives and application program all must be made amendment thereupon, there is following several problem in embedded-type software architecture: has reduced the portability of device drives and application program, increased repeated labor; Application developer need to pay close attention to the details of operating system and processor, and in the time that operating system is changed, also needs to be again familiar with new operating system and exploitation debugging acid, has increased development cost; Between module or equipment based on above-mentioned framework, the communication mode of its customized type has increased exploitation and the operation management cost of many equipment.
Summary of the invention
In order to address the above problem, the utility model is provided for the debugging intervention device of flush bonding processor, the hardware interface that is flush bonding processor mates with operating system interface, without paying close attention to the operating system of use and the interface of processor, can significantly improve the development cost based on flush bonding processor and shorten the cycle.
A kind of debugging intervention device for flush bonding processor of the utility model is achieved through the following technical solutions:
For the debugging intervention device of flush bonding processor, comprise interface module (11), package module (12), driver module (13), central processor CPU (14), data transmit-receive module (15), memory module (16), clock (17) and indicator lamp (18), it is characterized in that: described interface module (11) connection encapsulation module (12), package module (12) connects respectively driver module (13) and central processor CPU (14), driver module (13) connects respectively central processor CPU (14) and data transmit-receive module (15), data transmit-receive module (15) connects central processor CPU (14), described memory module (16), clock (17) is all connected central processor CPU (14) with indicator lamp (18).
Described interface module (11) is connected with flush bonding processor (2).
Described data transmit-receive module (15) is connected with PC (3).
The beneficial effect the utlity model has: the debugging intervention device that the utility model provides, flush bonding processor connects computer by debugging intervention device, without consider embedded processing hardware interface whether with the Interface Matching of operating system, greatly shortened the processor construction cycle.
Brief description of the drawings
Below in conjunction with the detailed description of the invention of accompanying drawing illustrated embodiment, foregoing of the present utility model is described in further detail again.
Fig. 1 is system construction drawing of the present utility model.
Mark in figure: debugging and management devices 1, flush bonding processor 2, PC 3, interface module 11, package module 12, driver module 13, central processor CPU 14, data transmit-receive module 15, memory module 16, clock 17 and indicator lamp 18.
Detailed description of the invention
The utility model is provided for the debugging intervention device of flush bonding processor, the hardware interface that is flush bonding processor mates with operating system interface, without paying close attention to the operating system of use and the interface of processor, can significantly improve the development cost based on flush bonding processor and shorten the cycle, as shown in Figure 1, described debugging and management devices 1 comprise interface module 11, package module 12, driver module 13, central processor CPU 14, data transmit-receive module 15, memory module 16, clock 17 and indicator lamp 18.
Described interface module 11 is by the conversion between different operating system interface programs, and pass through package module 12 by all Resource Encapsulations of operating system, the standard interface that driver module 13 provides the hardware interface of flush bonding processor 2 and the interactive interfacing of operating system to be connected, data transmit-receive module 15 connects PC 3, in PC 3, be provided with page operation interface, unified package module 12, driver module 13, data transmit-receive module 15, memory module 16, clock 17 and the indicator lamp 18 controlled of central processor CPU 14, described interface module 11 is connected with flush bonding processor 2.
Flush bonding processor 2 comprises the processors such as DSP, ARM, PPC, MIPS, various processors all can be connected PC with 1 li of management devices by debugging to be debugged and manages, without paying close attention to the operating system of use and the interface of processor, can significantly improve the development cost based on flush bonding processor and shorten the cycle.
The utility model further describes the object, technical solutions and advantages of the present invention for embodiment or embodiment; institute is understood that; above lifted embodiment or embodiment are only the preferred embodiment of the present invention; not in order to limit the present invention; all any amendments made for the present invention within the spirit and principles in the present invention, be equal to replacement, improvement etc., within protection scope of the present invention all should be included in.
Claims (3)
1. for the debugging intervention device of flush bonding processor, comprise interface module (11), package module (12), driver module (13), central processor CPU (14), data transmit-receive module (15), memory module (16), clock (17) and indicator lamp (18), it is characterized in that: described interface module (11) connection encapsulation module (12), package module (12) connects respectively driver module (13) and central processor CPU (14), driver module (13) connects respectively central processor CPU (14) and data transmit-receive module (15), data transmit-receive module (15) connects central processor CPU (14), described memory module (16), clock (17) is all connected central processor CPU (14) with indicator lamp (18).
2. the debugging intervention device for flush bonding processor according to claim 1, is characterized in that: described interface module (11) is connected with flush bonding processor (2).
3. the debugging intervention device for flush bonding processor according to claim 1, is characterized in that: described data transmit-receive module (15) is connected with PC (3).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521079625.8U CN205263796U (en) | 2015-12-23 | 2015-12-23 | A debugging intervention device for flush bonding processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521079625.8U CN205263796U (en) | 2015-12-23 | 2015-12-23 | A debugging intervention device for flush bonding processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205263796U true CN205263796U (en) | 2016-05-25 |
Family
ID=56005312
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201521079625.8U Active CN205263796U (en) | 2015-12-23 | 2015-12-23 | A debugging intervention device for flush bonding processor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205263796U (en) |
-
2015
- 2015-12-23 CN CN201521079625.8U patent/CN205263796U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103150279B (en) | Method allowing host and baseboard management controller to share device | |
| CN103377157B (en) | A kind of double-core data communications method for built-in digital control system | |
| CN110532212A (en) | System, the method and apparatus of DVSEC for effective peripheral assembly management | |
| CN103207771B (en) | A kind of PLC program actuator IP kernel | |
| CN105740139B (en) | A kind of debugging embedded software method based on virtual environment | |
| CN102520961B (en) | Off-chip online programmable SOC (system on a chip) and control method for same | |
| Parai et al. | An overview of microcontroller unit: from proper selection to specific application | |
| CN109074341A (en) | Reduce pin-count interface | |
| CN105320531A (en) | Online FPGA software upgrading method based on MicroBlaze soft core | |
| CN109643299A (en) | Long-time memory on the PCIE defined with existing TLP is written semantic | |
| CN104571333A (en) | Control computer based on 1553B bus | |
| CN102104508B (en) | M module low-level (LL) driver layer realization method for M module-based local area network (LAN)-based extensions for instrumentation (LXI) equipment | |
| CN104850516A (en) | DDR frequency conversion design method and device | |
| WO2016209427A1 (en) | Adaptive hardware acceleration based on runtime power efficiency determinations | |
| CN205103599U (en) | Cross -border trade BPO uses cloud terminating set | |
| CN109507991B (en) | Double-shaft servo control platform debugging system and method | |
| CN101763324A (en) | Method for realizing equipment simulating and device thereof | |
| CN105556461A (en) | Techniques for pre-OS image rewriting to provide cross-architecture support, security introspection, and performance optimization | |
| CN205263796U (en) | A debugging intervention device for flush bonding processor | |
| CN105068962A (en) | I2C controller access method and I2C controller access system | |
| CN104038551A (en) | Local and remote management system based on Loongson 2H and management method thereof | |
| CN105573759A (en) | STM32 processor based medical injection pump software structure | |
| CN103150952A (en) | Reconfigurable electronic design automation (EDA) experimental platform | |
| CN204009892U (en) | Embedded overall treatment platform based on X86 and the general-purpose operating system | |
| CN105243040A (en) | Instrument programmed control system and method supporting USBTMC protocol based on PCIe bus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |