CN205249050U - DC power supply circuit is kept apart to buffering - Google Patents

DC power supply circuit is kept apart to buffering Download PDF

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Publication number
CN205249050U
CN205249050U CN201520921914.1U CN201520921914U CN205249050U CN 205249050 U CN205249050 U CN 205249050U CN 201520921914 U CN201520921914 U CN 201520921914U CN 205249050 U CN205249050 U CN 205249050U
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CN
China
Prior art keywords
signal
phase inverter
input
capacitor
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201520921914.1U
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Chinese (zh)
Inventor
白伟
张春生
黄建明
张明达
雷晓娟
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Xi'an Space Flight Metrology And Measurement Research Institute
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Xi'an Space Flight Metrology And Measurement Research Institute
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Priority to CN201520921914.1U priority Critical patent/CN205249050U/en
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Publication of CN205249050U publication Critical patent/CN205249050U/en
Expired - Fee Related legal-status Critical Current
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Abstract

The utility model provides a power supply circuit is kept apart to the buffering, can be used to the electric isolation between the circuit board of two different functions of interconnect. This circuit adopts buffering isolation technique, adopts special buffer and electric capacity to cushion input, output respectively at input and output to ensure input/output's stability. Still adopt the transformer to carry out the electric isolation to it between second grade input and one -level are exported, reduced the mutual interference and to the susceptibility of noise. Keep apart conversion integrated circuit comparatively speaking with special DC -DC, the utility model has the characteristics of sexual valence relative altitude, switch small in noise, conversion efficiency are high, but the wide application is in provide steadily, drive reliably the energy for various electronic equipment.

Description

A kind of buffer compartment is from DC power supply circuit
Technical field
The utility model relates to a kind of buffer compartment from power circuit.
Background technology
As the energy source of electronic product, the quality of power quality is directly connected to a electronic productQuality, especially for the electronic product that is applied in the extremely complicated various industry spot of environment, rightPower supply has higher requirement. In the design process of the electronic product towards industrial environment, logicalOften the module of difference in functionality or wiring board can be carried out to electrical isolation, to reduce phase mutual interference. If twoThe supply voltage amplitude of individual module or wiring board is different, selects so band buffering isolation featuresDC-DC conversion chip be undoubtedly best solution (because DC-DC turns chip or realization is boosted,Realize step-down). If the required supply voltage amplitude of two modules or wiring board is the same, soDC-DC conversion chip will face the awkward situation that no scope for displaying one's abilities. Given this, the utility model is carriedSupply a kind of buffer compartment from power circuit, for two identical functional modules of the amplitude of powering or wiring boardBetween electrical isolation.
Summary of the invention
For solve prior art cannot provide two functional modules that power supply amplitude is identical or wiring board itBetween the technical problem of electrical isolation technology, the utility model provides a kind of buffer compartment from power circuit,Mainly can be used for two the power identical disparate modules of amplitude or the electrical isolation of wiring board.
Technical solution of the present utility model:
A kind of buffer compartment is from DC power supply circuit, and its special character is: comprise the excitation connecting successivelySignal input unit, buffer input signal unit, signal isolation voltage transformation unit, energy storage and counnter attack chargingRoad, wide input voltage adjuster and signal output apparatus;
Described pumping signal input block is for producing one of module identical two supply voltage amplitudesSquare wave excitation signal input to signal isolating transformer;
To encouraging, square wave cushions, paraphase in described buffer input signal unit, obtains stable square wavePumping signal;
Described signal isolation voltage transformation unit, for stable pumping signal is isolated, obtains isolation letterNumber;
Described energy storage and anti-reverse charging circuit are used for carrying out stored energy in the time of the high level of isolation signals,On the one hand for wide input voltage adjuster provides AC signal, anti-on the one hand when the low level of isolation signalsOnly energy-storage travelling wave tube carries out reverse charging to its front end;
The DC voltage of described wide input voltage adjuster for AC signal is changed into;
Described signal output apparatus is for using DC signal output for subsequent conditioning circuit.
Above-mentioned buffer input signal unit comprises six phase inverter U2A, phase inverter U2B, phase inverterU2C, phase inverter U2D, phase inverter U2E, phase inverter U2F, square wave excitation signal first passes through insteadAfter inverting buffer of phase device U2D, phase inverter U2E and phase inverter U2F through phase inverter U2A,After bis-inverting buffers of phase inverter U2B and phase inverter U2C, export to signal isolating transformer.
Above-mentioned signal isolation voltage transformation unit comprises capacitor C 1 and isolating transformer T1, described phase inverterU2D, phase inverter U2E and phase inverter U2F output process capacitor C 1 are with at the beginning of isolating transformer T1One end of level coil connects, the output of described phase inverter U2A, phase inverter U2B and phase inverter U2CEnd is connected with the other end of isolating transformer T1 primary coil,
One termination VSS of described isolating transformer T1 secondary coil, T1 level of described isolating transformerThe other end of coil is connected with energy storage and anti-reverse charging circuit.
Above-mentioned energy storage and anti-reverse charging circuit comprise diode D1, polar capacitor C4 and polarity free capacitor C2,One end of described diode D1 is connected with the other end of isolating transformer T1 secondary coil, described two utmost pointsThe other end of pipe D1 is connected with the positive pole of polar capacitor C4, the negative pole of described polar capacitor C4 and wideIn succession, the negative pole of described polar capacitor C4 meets VSS to the input of input voltage regulation device, described electricityHold the negative pole of C4 and be connected with one end of polarity free capacitor C2, the described polarity free capacitor C2 other end andThe input of wide input voltage adjuster in succession.
Above-mentioned wide input voltage adjuster comprises voltage regulator U1.
Above-mentioned signal output apparatus comprises polar capacitor C3, polarity free capacitor CD1 and polarity free capacitorCD2, the positive pole of described polar capacitor C3, one end of polarity free capacitor CD1 and polarity free capacitor CD2One end be all connected with voltage regulator U1, be connected with VDD simultaneously, described polar capacitor C3'sThe other end of the other end of negative pole, polarity free capacitor CD1 and polarity free capacitor CD2 all meets VSS.
Above-mentioned voltage regulator U1 is MAX666.
Advantage that the utility model has:
1, the utility model, by adopting secondary paraphase, is realized the Hyblid Buffer Amplifier of signal.
2, the utility model adopts 1:1 isolating transformer to realize electrical isolation truly; IsolationThe signal of transformer and secondary coil is isolated completely on electric, and both sides signal onlyBe coupled by alternating magnetic field, do not have any electrical connection.
3, the utility model adopts voltage regulator and the capacitance energy storage technology of wide voltage input, makes electricityPressure stable output is reliable.
Brief description of the drawings
Fig. 1 is overall structure figure of the present utility model;
Fig. 2 is circuit theory diagrams of the present utility model.
Detailed description of the invention
This main circuit is pumping signal input block, buffer input signal unit, signal as shown in Figure 1Isolation voltage transformation unit, energy storage and anti-reverse charging circuit, wide input voltage adjuster and signal output apparatusComposition; Wherein pumping signal input block is that module 1 (is 5V at this with two supply voltage amplitudesModule 1 and the electrical isolation of module 2 be that example is illustrated) under the effect of its 5V power supply, produceThe square wave of certain frequency, for encouraging subsequent module; Buffer input signal unit plays module1 square wave producing cushions, paraphase, makes its stable effect; Signal isolation voltage transformation unit risesTo electrical isolation effect truly; Energy storage and anti-reverse charging circuit are in the high period of input signalBetween carry out stored energy, between the low period of input signal on the one hand for subsequent conditioning circuit is powered, a sideFace prevents that energy-storage travelling wave tube from carrying out reverse charging to its front end; Wide input voltage adjuster is mainly used in storageOn energy element, the larger voltage signal of fluctuation is adjusted to the DC voltage comparatively stable, ripple is less; LetterNumber output circuit, by stable DC signal output, uses for subsequent conditioning circuit.
Circuit theory diagrams of the present utility model as shown in Figure 2. Specific works process is as described below:
One, buffer input signal unit. As shown in Figure 2, the input that network label is INPUTIt is the square wave that the certain frequency amplitude that produces under the 5V of module 1 power drives is 5V. 4049For a 6 inverter buffers, the square-wave signal of input is slow through D, E, a paraphase of tri-phase inverters of FPunching and after A, B, tri-phase inverter secondary inverting buffers of C, act on respectively isolating transformer at the beginning ofLevel coil two ends, the signal that makes to connect at the primary coil of isolating transformer T1 two ends is stable and widthValue is the square-wave signal of 10V.
Two, signal isolation voltage transformation unit. The primary coil two ends institute plus signal of isolating transformer T1 is widthValue is the square wave of 10V, the operation principle from isolating transformer: in the secondary wire of isolating transformerCircle two ends also can map out the same frequency square-wave signal that amplitude is 10V. But transformer and secondaryThe signal of coil is isolated completely on electric, and both sides signal is only coupled by alternating magnetic field, noThere is any electrical connection.
Three, energy storage and anti-reverse charging circuit. Between the high period of signal, the secondary wire of isolating transformerCircle, is returned voltage simultaneously and is adjusted to polar capacitor C4 and polarity free capacitor C2 charging via diode D1Joint device U1 power supply; Between the low period of signal, diode D1 cannot conducting, transformer secondary output lineCircle also cannot be to voltage regulator U1 power supply, and now externally electric discharge of polar capacitor C4, adjusts to voltageJoint device provides power supply. Due at the external interdischarge interval of polar capacitor C4, diode D1 oppositely ends,So can prevent the secondary coil reverse charging of polar capacitor C4 to isolating transformer T1. As long as sideThe input voltage model of the frequency of ripple INPUT, the capacitance of polar capacitor C4 and voltage regulator U1Enclose coupling better, so just can guarantee that voltage regulator can normally work, obtain stable output.
Four, wide input voltage adjuster. Because the signal on isolating transformer secondary coil is for exchanging letterNumber, and we needed be d. c. voltage signal, consider cost factor, the utility model is notAdopt AC-DC chip, but adopted voltage regulator U1. The input voltage range of this device is2V-16.5V, is output as direct current 5V. In the utility model, choose the square wave INPUT of appropriate frequencyWith the polar capacitor C4 of suitable capacitance, make the input terminal voltage of voltage regulator at 7.5V to 10VBetween fluctuation. Voltage regulator U1 just can normally work so, the 5V DC voltage of stable output.The capacitance of the frequency of square wave INPUT, polar capacitor C4 and voltage regulator input voltage justExact matching, has just realized the conversion of AC-to DC dexterously.
Five, signal output apparatus. The output of voltage regulator U1 is again via carrying out capacitor C 3 and electrodelessAfter the buffering of property capacitor C D1, CD2 and filtering, can produce more stable 5V power supply, with backwardContinuous circuit provides precise and stable voltage.

Claims (7)

1. buffer compartment, from a DC power supply circuit, is characterized in that: comprise the excitation letter connecting successivelyNumber input block, buffer input signal unit, signal isolation voltage transformation unit, energy storage and anti-reverse charging circuit,Wide input voltage adjuster and signal output apparatus;
Described pumping signal input block is for producing one of module identical two supply voltage amplitudesSquare wave excitation signal input to signal isolating transformer;
To encouraging, square wave cushions, paraphase in described buffer input signal unit, obtains stable square wavePumping signal;
Described signal isolation voltage transformation unit, for stable pumping signal is isolated, obtains isolation letterNumber;
Described energy storage and anti-reverse charging circuit are used for carrying out stored energy in the time of the high level of isolation signals,On the one hand for wide input voltage adjuster provides AC signal, anti-on the one hand when the low level of isolation signalsOnly energy-storage travelling wave tube carries out reverse charging to its front end;
The DC voltage of described wide input voltage adjuster for AC signal is changed into;
Described signal output apparatus is for using DC signal output for subsequent conditioning circuit.
2. buffer compartment according to claim 1, from DC power supply circuit, is characterized in that: described inBuffer input signal unit comprises six phase inverter U2A, phase inverter U2B, phase inverter U2C, anti-Phase device U2D, phase inverter U2E, phase inverter U2F, square wave excitation signal first pass through phase inverter U2D,After inverting buffer of phase inverter U2E and phase inverter U2F through phase inverter U2A, phase inverter U2BWith after bis-inverting buffers of phase inverter U2C, export to signal isolating transformer.
3. buffer compartment according to claim 2, from DC power supply circuit, is characterized in that: described inSignal isolation voltage transformation unit comprises capacitor C 1 and isolating transformer T1, described phase inverter U2D, anti-phaseDevice U2E and phase inverter U2F output are through capacitor C 1 and one of isolating transformer T1 primary coilEnd connects, and the output of described phase inverter U2A, phase inverter U2B and phase inverter U2C becomes with isolationThe other end of depressor T1 primary coil connects,
One termination VSS of described isolating transformer T1 secondary coil, T1 level of described isolating transformerThe other end of coil is connected with energy storage and anti-reverse charging circuit.
4. buffer compartment according to claim 3, from DC power supply circuit, is characterized in that: described inEnergy storage and anti-reverse charging circuit comprise diode D1, polar capacitor C4 and polarity free capacitor C2, described twoOne end of utmost point pipe D1 is connected with the other end of isolating transformer T1 secondary coil, described diode D1The other end be connected with the positive pole of polar capacitor C4, the negative pole of described polar capacitor C4 and wide input electricityIn succession, the negative pole of described polar capacitor C4 meets VSS to the input of voltage regulator, described capacitor C 4Negative pole is connected with one end of polarity free capacitor C2, the described polarity free capacitor C2 other end and wide input electricityThe input of voltage regulator in succession.
5. buffer compartment according to claim 4, from DC power supply circuit, is characterized in that: described inWide input voltage adjuster comprises voltage regulator U1.
6. buffer compartment according to claim 5, from DC power supply circuit, is characterized in that: described inSignal output apparatus comprises polar capacitor C3, polarity free capacitor CD1 and polarity free capacitor CD2, instituteState positive pole, one end of polarity free capacitor CD1 and one end of polarity free capacitor CD2 of polar capacitor C3All be connected with voltage regulator U1, be connected with VDD simultaneously, the negative pole of described polar capacitor C3,The other end of the other end of polarity free capacitor CD1 and polarity free capacitor CD2 all meets VSS.
7. buffer compartment according to claim 5, from DC power supply circuit, is characterized in that: described inVoltage regulator U1 is MAX666.
CN201520921914.1U 2015-11-18 2015-11-18 DC power supply circuit is kept apart to buffering Expired - Fee Related CN205249050U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520921914.1U CN205249050U (en) 2015-11-18 2015-11-18 DC power supply circuit is kept apart to buffering

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520921914.1U CN205249050U (en) 2015-11-18 2015-11-18 DC power supply circuit is kept apart to buffering

Publications (1)

Publication Number Publication Date
CN205249050U true CN205249050U (en) 2016-05-18

Family

ID=55948119

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520921914.1U Expired - Fee Related CN205249050U (en) 2015-11-18 2015-11-18 DC power supply circuit is kept apart to buffering

Country Status (1)

Country Link
CN (1) CN205249050U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160518

Termination date: 20161118

CF01 Termination of patent right due to non-payment of annual fee