CN205246742U - Converter output PWM voltage detecting system - Google Patents
Converter output PWM voltage detecting system Download PDFInfo
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- CN205246742U CN205246742U CN201521015730.5U CN201521015730U CN205246742U CN 205246742 U CN205246742 U CN 205246742U CN 201521015730 U CN201521015730 U CN 201521015730U CN 205246742 U CN205246742 U CN 205246742U
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Abstract
The utility model discloses a converter output PWM voltage detecting system, amplify module, proportion partial pressure module, control gating module and simulation integrator block including the decay module, the difference that connect gradually. The decay module becomes three -phase output the high pressrue into low pressure through the series resistance partial pressure, the difference is amplified the module and is carried out a certain proportion of operation with deamplification through difference operational amplifier, and three -phase output voltage holds direct current busbar voltage's N respectively, proportion partial pressure module can fall into the signal voltage signal of the different amplitudes of four ways in proportion, control gating module is selected the voltage signal of the different amplitudes of four ways which signal to be sent to simulation integrator block with according to current converter switching frequency's size, the integrating circuit that simulation integrator block adopted resistance and total mark chip to form converts pulse signal to horse saddle -type analog signal and is sent to the treater. Simple, the implementation of being convenient for of circuit structure converts converter three -phase output PWM pulse ripples to collectable shape of a saddle continuous signal.
Description
Technical field
The utility model relates to a kind of voltage detecting system, is specifically related to a kind of frequency converter outputPWM voltage detecting system.
Background technology
AC Drive field at home, vector control type frequency converter with its excellent performance more and moreBe subject to the favor in market, especially higher to speed governing performance requirement occasion, as row such as liftingsIndustry. In vector control algorithm, the accurate estimation of stator flux of motor need to depend on motor threePhase voltage, i.e. the PWM voltage of frequency converter output. In conventional vector control algolithm, motor threePhase voltage often adopts the dutycycle of busbar voltage and the calculating of last control cycle by formula meterObtain, but this method because can making estimation precision, the factors such as the dead time effect of IGBT reduces.Therefore, how to detect that to obtain high-precision frequency converter output voltage aobvious to improving vector controlled performanceObtain extremely important. In order to improve voltage utilization, the pulse modulation technology of frequency converter is general at presentAdopt SVPWM modulation, the three-phase voltage of frequency converter output is pwm pulse ripple, these arteries and veinsRush ripple and be added on the asynchronous machine with inductive load characteristic, the phase voltage waveform that motor obtains etc.Imitated into saddle-shape waveform, in addition, the pwm pulse ripple of frequency converter output also can be along with frequency conversionThe variation of device switching frequency and changing. Therefore how converting pwm pulse ripple to processor canThe saddle-shape continuous signal gathering, and the sampling coefficient how to confirm of frequency converter output voltage isNeed the problem solving.
Summary of the invention:
The purpose of this utility model is to provide a kind of frequency converter output PWM voltage detecting system,Can obtain high-precision frequency converter output voltage.
To achieve these goals, the technical solution of the utility model is:
A kind of frequency converter output PWM voltage detecting system, comprises and is connected in successively frequency converter threeExport mutually attenuation module, differential amplification module and the analog integration module of PWM voltage, simulationThe output of integration module is connected in processor, also comprises proportion divider module and controls gating mouldPiece, the input of proportion divider module connects the output of differential amplification module, controls gating mouldThe input of piece connects the output of proportion divider module, and the output of controlling gating module connectsThe input of analog integration module.
Preferably, attenuation module comprises No. three attenuator circuits, is connected to frequency converter three-phase defeatedGo out end, each road attenuator circuit comprises the resistance of several series connection.
Preferably, differential amplification module comprises three differential amplifier circuits, three differential amplification electricityRoad respectively has an input to be connected to three outputs of attenuation module, three differential amplificationsAnother input of circuit is all connected in dc bus, the output of three differential amplifier circuitsAs the three-phase output end V of differential amplification modulea0、Vb0、Vc0。
Preferably, proportion divider module comprises nine operational amplification circuits, each operation amplifier electricityRoad comprises an operational amplifier, and the in-phase input end of operational amplifier connects one of the first resistanceEnd, the other end of the first resistance is as the input of operational amplification circuit, operational amplifier anti-Phase input is connected the output as operational amplification circuit with output; Nine operation amplifier electricityRoad is equally divided into three groups, and the input of three operational amplification circuits of every group connects respectively difference and putsThe three-phase output end V of large modulea0、Vb0、Vc0；
Control gating module and comprise three gating chips, six letters of the first gating chip U15Six voltage signal inputs of number voltage input end and the second gating chip U16 are for being connectedProportion divider module, the three-phase output end of differential amplification module and first group of operational amplification circuitThree outputs are connected in six voltage signal inputs of the first gating chip U15, secondThree signal output parts of group operational amplification circuit and the 3rd group of operational amplification circuit three are defeatedGo out six voltage signal inputs that end is connected in the second gating chip U16;
Six voltage input ends controlling the 3rd gating chip U17 of gating module connect respectivelyIn three outputs of three outputs and the second gating chip U16 of the first gating chip U15End, three outputs of the 3rd gating chip U17 are as the three-phase output of controlling gating moduleEnd Va_INTin、Vb_INTin、Vc_INTin；
The control signal input of the first gating chip U15 and the second gating chip U16 passes throughThe first gating control algorithm amplifier connects processor, the control letter of the 3rd gating chip U17Number input connects processor by the second gating control algorithm amplifier.
Preferably, analog integration module comprises two analog integration chips, will control gating moduleThe three-phase pulse signal that conveying is come is converted to three-phase saddle-shape analog signal output to processor.
The beneficial effects of the utility model are: attenuation module is connected dividing potential drop by three-phase by resistanceOutput high pressure becomes low pressure; Differential amplification module is that deamplification is passed through to differential operational amplifierCarry out a certain proportion of computing, three-phase output voltage is the N end to DC bus-bar voltage respectively;Proportion divider module can be divided into signal the voltage signal of the different amplitudes in four tunnels in proportion; Control choosingThe voltage signal of the different amplitudes in logical module Jiang Si road is according to the size of current frequency converter switching frequencySelect which signal is sent to analog integration module; Analog integration module adopts resistance and integrationThe integrating circuit of chip composition, converts pulse signal to saddle-shape analog signal and is sent to processingDevice. Circuit structure is simple, be convenient to implement, and cost of manufacture is low, by frequency converter three-phase output PWMImpulse wave converts collectable shape of a saddle continuous signal to.
Brief description of the drawings
Fig. 1 is the electrical block diagram of the utility model embodiment,
Fig. 2 is the attenuation module electrical block diagram of the utility model embodiment,
Fig. 3 is the differential amplification modular circuit structural representation of the utility model embodiment,
Fig. 4 is the proportion divider modular circuit structural representation of the utility model embodiment,
Fig. 5 is the control gating modular circuit structural representation of the utility model embodiment,
Fig. 6 is the analog integration modular circuit structural representation of the utility model embodiment.
In figure: 1-attenuation module, 2-differential amplification module, 3-proportion divider module, 4-controlsGating module, 5-analog integration module, 6-processor.
Detailed description of the invention
Below in conjunction with drawings and Examples, the utility model is described further.
A kind of frequency converter output PWM voltage detecting system (Fig. 1), comprises and is connected in successively changeAttenuation module 1, differential amplification module 2, the proportion divider of the PWM of device three-phase output frequently voltageModule 3, control gating module 4 and analog integration module 6, the output of analog integration module 6End is connected in processor.
Attenuation module 1 (Fig. 2) comprises No. three attenuator circuits, is connected to frequency converter three-phaseOutput Va，Vb，Vc, each road attenuator circuit comprises the resistance of several series connection, the present embodimentZhong Mei road attenuator circuit comprises the resistance of five series connection, by the resistance dividing potential drop of connecting, three-phase is exportedHigh pressure becomes low pressure.
Differential amplification module 2 (Fig. 3) comprises three differential amplifier circuits, three differential amplificationsCircuit respectively has an input to be connected to three outputs of attenuation module 1, three differenceAnother input of amplifying circuit is all connected in dc bus, three differential amplifier circuits defeatedGo out the three-phase output end V of end as differential amplification module 2a0，Vb0，Vc0. By deamplification,Three-phase output voltage is the N end to DC bus-bar voltage respectively, by differential operational amplifier U1,U2, U3 carry out a certain proportion of computing
Proportion divider module 3 (Fig. 4) comprises nine operational amplification circuits, each operation amplifierCircuit comprises an operational amplifier, and the in-phase input end of operational amplifier connects the first resistanceOne end, the other end of the first resistance is as the input of operational amplification circuit, operational amplifierInverting input is connected the output as operational amplification circuit with output, and in-phase input endBy the second resistance eutral grounding; Nine operational amplification circuits are equally divided into three groups, three fortune of every groupThe input of calculating amplifying circuit connects respectively the three-phase output end of differential amplification module 2; Nine fortuneCalculate amplifying circuit and be designated as respectively U4, U5, U6, U7, U8, U9, U10, U11 and U12.
Control gating module 4 (Fig. 5) and comprise three gating chips, the first gating chip U15Six signal voltage inputs and six voltage signal inputs of the second gating chip U16Be used for connecting proportion divider module 3, the three-phase output end of differential amplification module 2 and first group of fortuneThree outputs calculating amplifying circuit are connected in six voltage signals of the first gating chip U15Input, three signal output parts and the 3rd group of operation amplifier electricity of second group of operational amplification circuitThree outputs on road are connected in six voltage signal inputs of the second gating chip U16.
As shown in Figure 4 and Figure 5, U4, U7, U10 are first group, and U5, U8, U11 areSecond group, U6, U9, U12 are the 3rd group; The input of U4, U7, U10 connects Va0，The input of U5, U8, U11 connects Vb0, the input of U6, U9, U12 connects Vc0；The output of U4 is designated as Va1, the output of U7 is designated as Va2, the output of U10 is designated as Va3；The output of U5 is designated as Vb1, the output of U8 is designated as Vb2, the output of U11 is designated as Vb3；The output of U6 is designated as Vc1, the output of U9 is designated as Vc2, the output of U12 is designated as Vc3；
Va0And Va1、Vb0And Vb1、Vc0And Vc1Corresponding six of the first gating chip U15 that connectsIndividual signal input part, Va2And Va3、Vb2And Vb3、Vc2And Vc3The corresponding second gating core that connectsSix signal input parts of sheet U16;
Six inputs controlling the 3rd gating chip U17 of gating module 4 are connected toThree outputs of the first gating chip U15 and three outputs of the second gating chip U16,Three outputs of the 3rd gating chip U17 are as the three-phase output end of controlling gating module 4Va_INTin、Vb_INTin、Vc_INTin. The first gating chip U15 and the second gating chipThe control signal input of U16 is connected and is processed by the first gating control algorithm amplifier U13Device, the control signal input of the 3rd gating chip U17 is put by the second gating control algorithmLarge device U14 connects processor.
Proportion divider module 3 is divided into signal the voltage signal of the different amplitudes in four tunnels in proportion, defeatedGo out with the no-load voltage ratio of input and be followed successively by 1,0.75,0.5,0.25; Control gating module 4 Jiang Si roadsThe voltage signal of different amplitudes is selected which according to the size of current frequency converter switching frequencySignal is sent to analog integrator circuit, needs software algorithm to provide signal and removes to control gating circuit.
Analog integration module 6 (Fig. 6) comprises two analog integration chips, adopts resistance and long-pendingDivide the integrating circuit of chip composition to carry the three-phase pulse signal of coming by controlling gating module 4 Va_INTin、Vb_INTin、Vc_INTinBe converted to three-phase saddle-shape analog signal output to processingDevice.
According to the switching frequency output two-way logic control signal of Set For Current, two-way logic controlSignal combination becomes four kinds of states, for controlling the circuit Jiang Si road different amplitudes of gating module 4Analog integration module 6 is sent on a wherein road of voltage signal, and sampling coefficient is according to whole hardware electricityThe sampling resistor on road and switching frequency are determined.
Frequency converter three-phase output end (U, V, W) respectively with the negative terminal of DC bus-bar voltage(N) form three-phase output voltage, through attenuation module 1, differential amplification module 2, ratioDivision module 3 obtains the three-phase voltage signal of four groups of different amplitudes, controls the control of gating module 4Signal processed is combined into four kinds of states by processor output two-way logical signal (sel0, sel1) and entersRow gating. Table one has illustrated the control signal of gating circuit and has been sent to analog integrator circuit Si roadRelation between the voltage signal of different amplitudes.
Table one
The integration core of processor first control simulation integration module 6 in the time that each control cycle arrivesSheet stops integration, then obtains the frequency converter output phase voltage value of last control cycle, then againControl integration chip reset, start integration, so that next control cycle calculates frequency converter output phaseMagnitude of voltage.
Integration chip internal integrating capacitor is that 100PF and sampling resistor are 2M Europe, when integrationBetween constant be RC=200us, output voltage is Vo＝(Ts/200us)*Vi, byCan obtain correspondingAfter each road proportion divider circuit, calculate the minimal switching frequency of frequency converterVo_max_ADIt is the highest electricity that integration chip outputs to processor A D mouthPress Vo_max_AD=3V, the ratio of whole modulate circuit is 0.015/5.1, now can obtainBy the first via, without proportion divider circuit, whole hardware is nursed one's healthThe maximal phase voltage magnitude that circuit can support frequency converter output is 1020V, in order to ensure rightWithin the scope of the switching frequency of answering, the safe clearance of whole hardware modulate circuit, chooses Vi_min＝850V. Because the AD of processor is 12, corresponding A D maximum is 4096, and hardware circuit adds1.5V biasing, therefore corresponding A D maximum is 2048, associative list one, makes in software algorithmWith sampling coefficient and switching frequency scope configure by table two. The switch that software is set according to userFrequency, judges according to table two switching frequency is in which interval, as user sets opening of frequency converterPass frequency is fs=3.5K, the sampling coefficient using in software algorithm isLocate simultaneouslyReason device output sel1=0, sel0=1, controls gating module 4 gating the second road signals and is sent to integration coreSheet. Switching frequency scope corresponding to the first via is to be more than or equal to 4.2K; What the second tunnel was corresponding opensClosing frequency range is to be more than or equal to 3.2K and to be less than 4.2K; The switching frequency model that Third Road is correspondingEnclose is to be more than or equal to 2.1K and to be less than 3.2K; Switching frequency scope corresponding to Si road is to be greater thanEqual 1K and be less than 2.1K; Switching frequencies corresponding different in software algorithm use different adoptingSpline coefficient, actual phase voltage is that sampling coefficient is multiplied by the processor AD value obtaining of sampling.
Table two
Should be understood that, for those of ordinary skills, can according on stateBrightly improved or convert, and that all these improvement and conversion all should belong to the utility model is appendedThe protection domain of claim. It is special that the part not being described in detail in this description belongs to this areaThe known prior art of industry technical staff.
Claims (5)
1. a frequency converter output PWM voltage detecting system, comprises and is connected in successively frequency conversionAttenuation module (1), differential amplification module (2) and the analog integration of device three-phase output PWM voltageModule (5), the output of described analog integration module (5) is connected in processor (6), and its feature existsIn: also comprise proportion divider module (3) and control gating module (4), described proportion divider module(3) input connects the output of described differential amplification module (2), described control gating module(4) input connects the output of described proportion divider module (3), described control gating module(4) output connects the input of described analog integration module (5).
2. a kind of frequency converter output PWM voltage detecting system according to claim 1,It is characterized in that: described attenuation module (1) comprises No. three attenuator circuits, described in being connected toFrequency converter three-phase output end, each road attenuator circuit comprises the resistance of several series connection.
3. a kind of frequency converter output PWM voltage detecting system according to claim 1,It is characterized in that: described differential amplification module (2) comprises three differential amplifier circuits three institutesStating differential amplifier circuit respectively has an input to be connected to three of described attenuation module (1)Output, another input of three described differential amplifier circuits is all connected in dc bus,The output of three described differential amplifier circuits is defeated as the three-phase of described differential amplification module (2)Go out to hold Va0、Vb0、Vc0。
4. a kind of frequency converter output PWM voltage detecting system according to claim 1,It is characterized in that: described proportion divider module (3) comprises nine operational amplification circuits, described fortuneCalculate amplifying circuit and comprise an operational amplifier, the in-phase input end of described operational amplifier connectsOne end of the first resistance, the other end of described the first resistance is defeated as described operational amplification circuitEnter end, the inverting input of described operational amplifier is connected as described operation amplifier with outputThe output of circuit; Nine described operational amplification circuits are equally divided into three groups, three institutes of every groupThe input of stating operational amplification circuit connects respectively the three-phase output of described differential amplification module (2)End Va0、Vb0、Vc0；
Described control gating module (4) comprises three gating chips, the first gating chip U15'sSix voltage signal inputs of six signal voltage inputs and the second gating chip U16 are usedIn connect described proportion divider module (3), the three-phase output end of described differential amplification module (2) andThree outputs of first group of operational amplification circuit are connected in six of the first gating chip U15Voltage signal input, three signal output parts and the 3rd group of fortune of second group of operational amplification circuitThree outputs calculating amplifying circuit are connected in six voltage signals of the second gating chip U16Input;
Six voltage input ends of the 3rd gating chip U17 of described control gating module (4) divideBe not connected in three outputs and the second gating chip U16 of described the first gating chip U15Three outputs, three outputs of described the 3rd gating chip U17 are as described controlThe three-phase output end V of gating module (4)a_INTin、Vb_INTin、Vc_INTin；
The control signal input of the first gating chip U15 and the second gating chip U16 passes throughThe first gating control algorithm amplifier connects processor (6), the control of the 3rd gating chip U17Signal input part connects processor (6) by the second gating control algorithm amplifier.
5. a kind of frequency converter output PWM voltage detecting system according to claim 1,It is characterized in that: described analog integration module (5) comprises two analog integration chips, described in inciting somebody to actionControlling gating module (4) carries the three-phase pulse signal of coming to be converted to three-phase saddle-shape simulation letterNumber export described processor (6) to.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106970260A (en) * | 2017-05-23 | 2017-07-21 | 核工业理化工程研究院 | A kind of phase voltage Acquisition Circuit of frequency converter output and the measuring method of amplitude |
| CN107340420A (en) * | 2017-07-19 | 2017-11-10 | 广东美的暖通设备有限公司 | Detecting voltage by three phase circuit and air conditioner |
-
2015
- 2015-12-08 CN CN201521015730.5U patent/CN205246742U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106970260A (en) * | 2017-05-23 | 2017-07-21 | 核工业理化工程研究院 | A kind of phase voltage Acquisition Circuit of frequency converter output and the measuring method of amplitude |
| CN106970260B (en) * | 2017-05-23 | 2023-08-18 | 核工业理化工程研究院 | Phase voltage acquisition circuit output by frequency converter and amplitude measuring and calculating method |
| CN107340420A (en) * | 2017-07-19 | 2017-11-10 | 广东美的暖通设备有限公司 | Detecting voltage by three phase circuit and air conditioner |
| CN107340420B (en) * | 2017-07-19 | 2023-11-28 | 广东美的暖通设备有限公司 | Three-phase voltage detection circuit and air conditioner |
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Assignee: Wuhan Guide Electric Co., Ltd. Assignor: WUHAN GUIDE ELECTRIC DRIVE TECHNOLOGY CO., LTD. Contract record no.: 2017420000012 Denomination of utility model: Converter output PWM voltage detecting system Granted publication date: 20160518 License type: Common License Record date: 20170419 |
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Assignee: Wuhan Guide Electric Co., Ltd. Assignor: WUHAN GUIDE ELECTRIC DRIVE TECHNOLOGY CO., LTD. Contract record no.: 2017420000012 Date of cancellation: 20170612 |
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| EC01 | Cancellation of recordation of patent licensing contract | ||
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Assignee: Wuhan Guide Electric Co., Ltd. Assignor: WUHAN GUIDE ELECTRIC DRIVE TECHNOLOGY CO., LTD. Contract record no.: 2017420000019 Denomination of utility model: Converter output PWM voltage detecting system Granted publication date: 20160518 License type: Common License Record date: 20170714 |
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Address after: 430040 workshop D, no.6, ligongyuan Road, Science Park, Wuhan University of technology, Donghu Development Zone, Wuhan City, Hubei Province Patentee after: Wuhan Gangdi Technology Co.,Ltd. Address before: 430223 No. 6, Ligong Road, science and Technology Park, Donghu New Technology Development Zone, Wuhan City, Hubei Province Patentee before: WUHAN GUIDE ELECTRIC DRIVE TECHNOLOGY Co.,Ltd. |
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