CN205179035U - F28335DSP and W5100 ethernet module communication system - Google Patents
F28335DSP and W5100 ethernet module communication system Download PDFInfo
- Publication number
- CN205179035U CN205179035U CN201520947100.5U CN201520947100U CN205179035U CN 205179035 U CN205179035 U CN 205179035U CN 201520947100 U CN201520947100 U CN 201520947100U CN 205179035 U CN205179035 U CN 205179035U
- Authority
- CN
- China
- Prior art keywords
- dsp
- f28335dsp
- signal line
- address bus
- ethernet module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Abstract
The utility model discloses a F28335DSP and W5100 ethernet module communication system, it relates to the DSP communication technology field, address bus ADDR14~the ADDR0 of W5100 ethernet module is connected with address bus XA14~XA0 of DSP respectively, data bus DATA7~DATA0 is connected with data bus XD5~XD0 of DSP respectively, chip selection signal line and DSP's TCPIPCS is connected, the EXINT1 who suspends output signal line and DSP is connected, write being connected of enable signal line and DSP, SPI clock signal line SPICLK and DSP's SPICLKA are connected, SPI primary output / follow incoming signal line MOSI and DSP's SPISOMIA are connected, SPI primary input / follow output signal line MISO and DSP's SPISOMIA are connected, SPI is connected from the SPISTEA of model selection signal line with DSP, the utility model discloses can realize the communication of F28335DSP and W5100 ethernet module, the communication is reliable and stable, and convenient to use is easy and simple to handle.
Description
Technical field
The utility model relates to F28335DSP and W5100 ethernet module communication system, belongs to DSP communication technique field.
Background technology
Along with the fast development of DSP, the range of application of DSP is also more and more extensive, especially in civil area development rapidly, comprises the fields such as digitlization mobile phone, data modem unit, automobile electronic system and television telephone system.Meanwhile, along with the fast development of the Internet cause, the connection of DSP and network seems particularly important, greatly can expand the range of application of DSP.
W5100 is a multi-functional monolithic network interface chip, and inside is integrated with 10/100 ethernet controller, is mainly used in the embedded system of high integrated, high stable, high-performance and low cost.Use W5100 can realize not having Internet to connect.W5100 inside be integrated with complete edition hardware and through the ICP/IP protocol stack of checking, ethernet medium transport layer (MAC) and physical layer (PHY).Hardware ICP/IP protocol stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE, and these agreements have passed through checking for many years in a lot of field.W5100 inside is also integrated with 16KB memory for transfer of data.Use W5100 not need to consider the control of Ethernet, only need to carry out simple program to ports.W5100 provides 3 kinds of interfaces: directly parallel bus, indirectly parallel bus and spi bus.
Summary of the invention
For the problems referred to above, the technical problems to be solved in the utility model is to provide a kind of F28335DSP and W5100 ethernet module communication system.
The utility model is F28335DSP and W5100 ethernet module communication Design, it comprises F28335DSP chip, W5100 Ethernet chip, address bus ADDR14 ~ the ADDR0 of W5100 ethernet module is connected with the address bus XA14 ~ XA0 of DSP respectively, data/address bus DATA7 ~ DATA0 is connected with the data/address bus XD5 ~ XD0 of DSP respectively, chip selection signal line is connected with the TCPIPCS of DSP, interrupt signal output line is connected with the EXINT1 of DSP, the connection of write enable signal line and DSP, the SPICLKA of SPI clock cable SPICLK and DSP connects, the main output of SPI/connect from the SPISOMIA of input signal cable MOSI and DSP, SPI primary input/connect from the SPISOMIA of output signal line MISO and DSP, SPI is connected from mode select signal line with the SPISTEA of DSP.
As preferably, described communication system is made up of F25665DSP chip and W5100 Ethernet chip.
As preferably, the address bus of W5100 ethernet module is connected with the address bus of F28335DSP respectively.
The beneficial effects of the utility model are: the communication that can realize F28335DSP and W5100 ethernet module, and communication robust is reliable, easy to use, easy and simple to handle.
accompanying drawing illustrates:
For ease of illustrating, the utility model is described in detail by following concrete enforcement and accompanying drawing.
Fig. 1 is structural representation of the present utility model;
Fig. 1 comprises: F28335DSP chip, W5100 Ethernet chip.
embodiment:
For making the purpose of this utility model, technical scheme and advantage clearly understand, below by the specific embodiment shown in accompanying drawing, the utility model is described.But should be appreciated that, these describe just exemplary, and do not really want to limit scope of the present utility model.In addition, in the following description, the description to known features and technology is eliminated, to avoid unnecessarily obscuring concept of the present utility model.
As shown in Figure 1, this embodiment is by the following technical solutions: it comprises F28335DSP chip, W5100 Ethernet chip, address bus ADDR14 ~ the ADDR0 of W5100 ethernet module is connected with the address bus XA14 ~ XA0 of DSP respectively, data/address bus DATA7 ~ DATA0 is connected with the data/address bus XD5 ~ XD0 of DSP respectively, chip selection signal line is connected with the TCPIPCS of DSP, interrupt signal output line is connected with the EXINT1 of DSP, the connection of write enable signal line and DSP, the SPICLKA of SPI clock cable SPICLK and DSP connects, the main output of SPI/connect from the SPISOMIA of input signal cable MOSI and DSP, SPI primary input/connect from the SPISOMIA of output signal line MISO and DSP, SPI is connected from mode select signal line with the SPISTEA of DSP.
Further, described communication system is made up of F25665DSP chip and W5100 Ethernet chip.
Further, the address bus of W5100 ethernet module is connected with the address bus of F28335DSP respectively.
The operation principle of this embodiment is: 15 address buss of DSP and data/address bus are directly connected with W5100, and spi bus connects with the SPI port of W5100.So DSP can pass through parallel bus or SPI interface management W5100, realize exchanges data.
The register of control bus RD, WR, TCPIPCS control W5100 of DSP or the read-write of the data of send and receive buffers.The interrupt input line INT of external interrupt input line XINT1 and the W5100 of DSP is connected, and can interrupt when needing to DSP application.
DSP uses parallel and interrupt mode management W5100 chip, can realize ethernet communication at a high speed.DSP is 0x100000--0x107FFF 32K altogether to the mapped address space of W5100, wherein register space is 0x100000--0x1007FF, retaining space is 0x100800--1x103FFF, transmission storage space is 0x104000--0x105FFF, and reception memorizer space is 0x106000--0x107FFF.
More than show and describe general principle of the present utility model and principal character and advantage of the present utility model.The technical staff of the industry should understand; the utility model is not restricted to the described embodiments; what describe in above-described embodiment and specification just illustrates principle of the present utility model; under the prerequisite not departing from the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.The claimed scope of the utility model is defined by appending claims and equivalent thereof.
Claims (4)
1.F28335DSP with W5100 ethernet module communication system, it is characterized in that: it comprises F28335DSP chip, W5100 Ethernet chip, address bus ADDR14 ~ the ADDR0 of W5100 ethernet module is connected with the address bus XA14 ~ XA0 of DSP respectively, data/address bus DATA7 ~ DATA0 is connected with the data/address bus XD5 ~ XD0 of DSP respectively, chip selection signal line is connected with the TCPIPCS of DSP, interrupt signal output line is connected with the EXINT1 of DSP, the connection of write enable signal line and DSP, the SPICLKA of SPI clock cable SPICLK and DSP connects, the main output of SPI/connect from the SPISOMIA of input signal cable MOSI and DSP, SPI primary input/connect from the SPISOMIA of output signal line MISO and DSP, SPI is connected from mode select signal line with the SPISTEA of DSP.
2. F28335DSP and W5100 ethernet module communication system according to claim 1, is characterized in that: described communication system is made up of F25665DSP chip and W5100 Ethernet chip.
3. F28335DSP and W5100 ethernet module communication system according to claim 1, is characterized in that: the address bus of W5100 ethernet module is connected with the address bus of F28335DSP respectively.
4. F28335DSP and W5100 ethernet module communication system according to claim 1, is characterized in that: the data/address bus of W5100 ethernet module is connected with the data/address bus of F28335DSP respectively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520947100.5U CN205179035U (en) | 2015-11-25 | 2015-11-25 | F28335DSP and W5100 ethernet module communication system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520947100.5U CN205179035U (en) | 2015-11-25 | 2015-11-25 | F28335DSP and W5100 ethernet module communication system |
Publications (1)
Publication Number | Publication Date |
---|---|
CN205179035U true CN205179035U (en) | 2016-04-20 |
Family
ID=55742962
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201520947100.5U Expired - Fee Related CN205179035U (en) | 2015-11-25 | 2015-11-25 | F28335DSP and W5100 ethernet module communication system |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN205179035U (en) |
-
2015
- 2015-11-25 CN CN201520947100.5U patent/CN205179035U/en not_active Expired - Fee Related
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103616927B (en) | A kind of data communication server | |
CN204204010U (en) | A kind of TF card with communication function | |
CN109828941A (en) | AXI2WB bus bridge implementation method, device, equipment and storage medium | |
CN101087235A (en) | A FPGA-based multi-functional communication interface conversion device and method | |
CN103077148A (en) | PCIE (Peripheral Component Interconnect Express)-based host communication method and host | |
CN203812236U (en) | Data exchange system based on processor and field programmable gate array | |
CN103051716A (en) | Method and system for redirecting network-oriented serial device | |
CN103425611A (en) | Serial communication method for field of metering | |
CN202929470U (en) | Remote data transmission system of industrial equipment | |
CN204256732U (en) | The high-speed data transmission apparatus of Based PC I-Express interface | |
CN202043124U (en) | Intelligent gateway based on ZIGBEE network | |
CN205179035U (en) | F28335DSP and W5100 ethernet module communication system | |
CN203535551U (en) | Data communication server | |
CN202058139U (en) | Serial port conversion module based on universal asynchronous receiver/transmitter (UART) serial port expansion chip | |
CN202406141U (en) | Fire wall | |
CN202995719U (en) | USB (universal serial bus) interface extension equipment and electronic terminal | |
CN106789464A (en) | Ethernet device and control method based on FPGA and W5100 | |
CN103647728B (en) | A kind of STM32 micro-chip and Linux system high-speed serial ports Anti-jamming Communication method | |
CN209345193U (en) | A kind of multi-protocol interface turns Ethernet interface engineering device technique field | |
CN203490496U (en) | CAN bus controller based on SIP packaging technology | |
CN201837923U (en) | Main board with function of switch | |
CN201853230U (en) | USB (Universal Serial Bus) to IO (Input Output) module | |
CN201869208U (en) | Embedded serial port-to-Ethernet converter | |
CN207543130U (en) | A kind of gateway system | |
CN102364452A (en) | Realization method for thermal plugging use of PS2 interface keyboard and mouse |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160420 Termination date: 20171125 |