CN205160483U - Passive frequency -selecting filter attenuation receiving circuit - Google Patents
Passive frequency -selecting filter attenuation receiving circuit Download PDFInfo
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- CN205160483U CN205160483U CN201520737329.6U CN201520737329U CN205160483U CN 205160483 U CN205160483 U CN 205160483U CN 201520737329 U CN201520737329 U CN 201520737329U CN 205160483 U CN205160483 U CN 205160483U
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Abstract
The utility model is suitable for a circuit field provides a passive frequency -selecting filter attenuation receiving circuit, the circuit includes: electric capacity C1, carrier wave coupling coil T1, electric capacity C7, inductance L4, electric capacity C4, inductance L5, electric capacity C5, inductance L6, electric capacity C6, resistance R2, field effect transistor Q1, resistance R1, resistance R3, electric capacity C9, inductance L4 with electric capacity C4 is parallelly connected, establishes ties with C7, and for a LC wave filter, a LC wave filter concatenate in in the circuit, inductance L5 with parallelly connected the 2nd LC wave filter that is of electric capacity C5, the 2nd LC wave filter concatenate in in the circuit, inductance L6 with electric capacity C6 is parallelly connected, establishes ties with C8, and for the 3rd LC wave filter, the 3rd LC wave filter concatenate in in the circuit, resistance R3, resistance R2 and field effect transistor Q1 constitution attenuator circuit, attenuator circuit concatenate in in the circuit.
Description
Technical field
The utility model belongs to circuit field, particularly relates to a kind of passive frequency selective algorithm receiving circuit.
Background technology
What use in available circuit is generally active filter, and namely filter must be connected on electric power and just can use, and which not only adds the cost of circuit, and adds the volume of circuit, bring loaded down with trivial details to the use of user.
Utility model content
The object of the utility model embodiment is to provide a kind of passive frequency selective algorithm receiving circuit, uses loaded down with trivial details problem to solve prior art active filter.
The utility model embodiment realizes like this, a kind of passive frequency selective algorithm receiving circuit, described circuit comprises: electric capacity C1, carrier wave coupling coil T1, electric capacity C7, inductance L 4, electric capacity C4, inductance L 5, electric capacity C5, inductance L 6, electric capacity C6, resistance R2, field effect transistor Q1, resistance R1, resistance R3, electric capacity C9, it is characterized in that, described inductance L 4 is in parallel with described electric capacity C4, connect with electric capacity C7 is a LC filter, a described LC filter is serially connected with in described circuit, described inductance L 5 is in parallel with described electric capacity C5 is the 2nd LC filter, described 2nd LC filter is serially connected with in described circuit, described inductance L 6 is in parallel with described electric capacity C6, connect with electric capacity C8 is the 3rd LC filter, described 3rd LC filter is serially connected with in described circuit, described resistance R3, resistance R2 and field effect transistor Q1 forms attenuator circuit, described attenuator circuit is serially connected with in described circuit.
Further, described electric capacity C1 connects with described coupling coil T1, and is linked between the zero line of power line and live wire.
Further, described attenuator circuit is used for carrying out dividing potential drop to high-frequency signal after filtering, reaches decay to make described high-frequency signal.
Further, described circuit also comprises: diode D1, diode D2, and described diode D1 and diode D2 is combined as resistance width resistance.
Further, described resistance width resistance is used for carrying out amplitude limit to the high-frequency signal through dividing potential drop.
The utility model embodiment, passive frequency selective algorithm receiving circuit adopts the design of passive filter, high-frequency signal is by after coupling, completely by three rank filtering, the high-frequency signal of characteristic frequency is extracted, specific high-frequency signal is input in carrier communication chip, ensure that the stability of circuit.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The passive frequency selective algorithm receiving circuit that Fig. 1 provides for the utility model embodiment circuit diagram.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
In order to technical scheme described in the utility model is described, be described below by specific embodiment.
Be illustrated in figure 1 the passive frequency selective algorithm receiving circuit that the utility model embodiment provides circuit diagram, described circuit comprises: electric capacity C1, carrier wave coupling coil T1, electric capacity C7, inductance L 4, electric capacity C4, inductance L 5, electric capacity C5, inductance L 6, electric capacity C6, resistance R2, field effect transistor Q1, resistance R1, resistance R3, electric capacity C9.
Wherein, electric capacity C1 and coupling coil T1 is for being connected in series, and access between the zero line of power line and live wire, the effect of electric capacity C1 is to isolate alternating current, coupling coil T1 as being the output stage high-frequency signal on power line being coupled to coupling coil T1, high-pressure side and low-pressure side are isolated simultaneously.
As an embodiment of the present utility model, electric capacity C1 can isolate the alternating current of 50Hz.
Inductance L 4 is in parallel with electric capacity C4, connecting with C7 is a LC filter, one LC filter is serially connected with in circuit, the high-frequency signal that coupling coil T1 exports carries out the first rank bandpass filtering through a LC filter, the resonance frequency of the one LC filter is 125KHz, be 125KHz by LC optimum configurations, then frequency can be that the high-frequency signal of below 125KHz ends by a LC filter.
Inductance L 5 is in parallel with electric capacity C5 is the 2nd LC filter, 2nd LC filter is serially connected with in circuit, the resonance frequency of the 2nd LC filter is 140KHz, high-frequency signal through a LC filter filtering can output to the 2nd LC filter, then the 2nd LC filter meeting filtering goes out the high-frequency signal of more than 140KHz.
Inductance L 6 is in parallel with electric capacity C6 is the 3rd LC filter, 3rd LC filter is serially connected with in circuit, it is high-frequency signal near 125KHz that 3rd LC filter is used for rejection frequency, and the high-frequency signal namely extracted through the 2nd LC filter can be high-frequency signal near 125KHz by the 3rd LC filter rejection frequency.
After above-mentioned three rank bandpass filterings, be that the high-frequency signal of frequency centered by 132KHz is input in circuit by only having frequency.Now, resistance R3, resistance R2 and field effect transistor Q1 can form attenuator circuit, when high-frequency signal is after filtering input to this attenuator circuit, field effect transistor Q1 conducting, high-frequency signal is by resistance R3 and resistance R2 dividing potential drop, high-frequency signal is attenuated, the interference signal in high-frequency signal can be suppressed.
The utility model embodiment, passive frequency selective algorithm receiving circuit adopts the design of passive filter, high-frequency signal is by after coupling, completely by three rank filtering, the high-frequency signal of characteristic frequency is extracted, specific high-frequency signal is input in carrier communication chip, ensure that the stability of circuit.
As an embodiment of the present utility model, described circuit also comprises:
Diode D1 and diode D2, described diode D1 and diode D2 is combined into amplitude limit resistance.This amplitude limit resistance is used for carrying out amplitude limit to the high-frequency signal through dividing potential drop, optional: the high-frequency signal amplitude limit through dividing potential drop is 0.7V by this amplitude limit resistance.
Those of ordinary skill in the art it is also understood that, the all or part of step realized in above-described embodiment method is that the hardware that can carry out instruction relevant by program has come, described program can be stored in a computer read/write memory medium, described storage medium, comprises ROM/RAM, disk, CD etc.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all do within spirit of the present utility model and principle any amendment, equivalent to replace and improvement etc., all should be included within protection range of the present utility model.
Claims (5)
1. a passive frequency selective algorithm receiving circuit, described circuit comprises: electric capacity C1, carrier wave coupling coil T1, electric capacity C7, inductance L 4, electric capacity C4, inductance L 5, electric capacity C5, inductance L 6, electric capacity C6, resistance R2, field effect transistor Q1, resistance R1, resistance R3, electric capacity C9, it is characterized in that, described inductance L 4 is in parallel with described electric capacity C4, connecting with C7 is a LC filter, a described LC filter is serially connected with in described circuit, described inductance L 5 is in parallel with described electric capacity C5 is the 2nd LC filter, described 2nd LC filter is serially connected with in described circuit, described inductance L 6 is in parallel with described electric capacity C6, connect with electric capacity C8 is the 3rd LC filter, described 3rd LC filter is serially connected with in described circuit, described resistance R3, resistance R2 and field effect transistor Q1 forms attenuator circuit, described attenuator circuit is serially connected with in described circuit.
2. circuit as claimed in claim 1, it is characterized in that, described electric capacity C1 connects with described coupling coil T1, and is linked between the zero line of power line and live wire.
3. circuit as claimed in claim 1, is characterized in that, described attenuator circuit is used for carrying out dividing potential drop to high-frequency signal after filtering, reaches decay to make described high-frequency signal.
4. the circuit as described in any one of claims 1 to 3, is characterized in that, described circuit also comprises: diode D1, diode D2, and described diode D1 and diode D2 is combined as resistance width resistance.
5. circuit as claimed in claim 4, is characterized in that, described resistance width resistance is used for carrying out amplitude limit to the high-frequency signal through dividing potential drop.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520737329.6U CN205160483U (en) | 2015-09-22 | 2015-09-22 | Passive frequency -selecting filter attenuation receiving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520737329.6U CN205160483U (en) | 2015-09-22 | 2015-09-22 | Passive frequency -selecting filter attenuation receiving circuit |
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| Publication Number | Publication Date |
|---|---|
| CN205160483U true CN205160483U (en) | 2016-04-13 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201520737329.6U Active CN205160483U (en) | 2015-09-22 | 2015-09-22 | Passive frequency -selecting filter attenuation receiving circuit |
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| CN (1) | CN205160483U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105071781A (en) * | 2015-09-22 | 2015-11-18 | 浙江方大智控科技有限公司 | Passive selective-frequency filter attenuation receiving circuit |
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2015
- 2015-09-22 CN CN201520737329.6U patent/CN205160483U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105071781A (en) * | 2015-09-22 | 2015-11-18 | 浙江方大智控科技有限公司 | Passive selective-frequency filter attenuation receiving circuit |
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