CN205141650U - Interface protection circuit - Google Patents
Interface protection circuit Download PDFInfo
- Publication number
- CN205141650U CN205141650U CN201520996977.3U CN201520996977U CN205141650U CN 205141650 U CN205141650 U CN 205141650U CN 201520996977 U CN201520996977 U CN 201520996977U CN 205141650 U CN205141650 U CN 205141650U
- Authority
- CN
- China
- Prior art keywords
- circuit
- voltage
- diode
- pin
- electrically connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 10
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 102000005591 NIMA-Interacting Peptidylprolyl Isomerase Human genes 0.000 description 1
- 108010059419 NIMA-Interacting Peptidylprolyl Isomerase Proteins 0.000 description 1
- 101150087393 PIN3 gene Proteins 0.000 description 1
Landscapes
- Emergency Protection Circuit Devices (AREA)
Abstract
The application provides an interface protection circuit includes: the circuit comprises a first voltage division circuit, a second voltage division circuit and a clamping circuit; the first end of the first voltage division circuit is electrically connected with the analog output pin, and the second end of the first voltage division circuit is electrically connected with the input end of the clamping circuit; the output end of the clamping circuit is electrically connected with the first end of the second voltage division circuit, and the second end of the second voltage division circuit is grounded; the common end of the clamping circuit and the second voltage division circuit is electrically connected with the pin to be protected, and the voltage of the output end of the clamping circuit is the voltage required by the normal work of the pin to be protected. The application provides an interface protection circuit, based on the required voltage of clamp circuit with the voltage clamp of treating the protection pin of inputing to treating the normal work of protection pin, avoid the maloperation to make the pin insert the large voltage and burn out the pin.
Description
Technical Field
The utility model relates to an interface protection technical field, more specifically say, relate to an interface protection circuit.
Background
In some household appliances (such as an air conditioner), many analog quantity signals are collected frequently. The collected signals are transmitted to an analog-to-digital conversion pin of the main control chip for analog-to-digital conversion, the pin of the main control chip requires two voltages, namely 3.3V and 5V, and if the voltage of the analog-to-digital conversion pin of the main control chip exceeds the voltage required by the normal operation of the pin (for example, a large voltage is accessed due to misoperation), the pin of the chip is dangerous to burn out, so that an interface protection circuit is necessary to be used at the analog-to-digital conversion pin of the main control chip to protect the pin.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing an interface protection circuit to prevent that the maloperation from making the pin insert the large voltage and burning out the pin.
In order to achieve the above object, the utility model provides a following technical scheme:
an interface protection circuit, comprising: the circuit comprises a first voltage division circuit, a second voltage division circuit and a clamping circuit; wherein,
the first end of the first voltage division circuit is used for being electrically connected with an analog output pin, and the second end of the first voltage division circuit is electrically connected with the input end of the clamping circuit;
the output end of the clamping circuit is electrically connected with the first end of the second voltage division circuit, and the second end of the second voltage division circuit is grounded;
the common end of the clamping circuit and the second voltage division circuit is electrically connected with a pin to be protected, and the voltage of the output end of the clamping circuit is the voltage required by the normal work of the pin to be protected.
In the interface protection circuit, preferably, the clamp circuit includes: a first diode, a second diode and a power supply; wherein,
the cathode of the second diode is connected with the power supply;
the anode of the first diode is electrically connected with the anode of the second diode, and the common end of the first diode and the second diode forms the input end of the clamping circuit;
and the cathode of the first diode is the output end of the clamping circuit.
In the interface protection circuit, preferably, the clamp circuit includes:
the power supply comprises a power supply, a first diode group and a second diode group, wherein the first diode group is formed by connecting a plurality of diodes in series; wherein,
the cathode of the second diode group is connected with the power supply;
the anode of the first diode group is electrically connected with the anode of the second diode group, and the common end of the first diode group and the second diode group forms the input end of the clamping circuit;
and the cathode of the first diode group is the output end of the clamping circuit.
In the interface protection circuit, preferably, the diodes involved in the clamp circuit are all germanium tubes.
In the interface protection circuit, preferably, the diodes involved in the clamp circuit are all silicon tubes.
In the interface protection circuit, preferably, the first voltage dividing circuit is a package resistor, and a size of the package resistor is greater than a preset size.
In the interface protection circuit, the first voltage dividing circuit is preferably a packaged resistor with a size greater than or equal to 0805 packaged resistor.
By the above scheme, an interface protection circuit provided in an embodiment of the present application includes: the circuit comprises a first voltage division circuit, a second voltage division circuit and a clamping circuit; the first end of the first voltage division circuit is electrically connected with the analog output pin, and the second end of the first voltage division circuit is electrically connected with the input end of the clamping circuit; the output end of the clamping circuit is electrically connected with the first end of the second voltage division circuit, and the second end of the second voltage division circuit is grounded; the common end of the clamping circuit and the second voltage division circuit is electrically connected with the pin to be protected, and the voltage of the output end of the clamping circuit is the voltage required by the normal work of the pin to be protected. The application provides an interface protection circuit, based on the required voltage of clamp circuit with the voltage clamp of treating the protection pin of inputing to treating the normal work of protection pin, avoid the maloperation to make the pin insert the large voltage and burn out the pin.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an interface protection circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a clamp circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram of another structure of a clamp circuit according to an embodiment of the present disclosure;
FIG. 4 is a diagram illustrating an exemplary interface protection circuit according to an embodiment of the present disclosure;
fig. 5 is a diagram illustrating an exemplary application scenario of an interface protection circuit according to an embodiment of the present disclosure.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings described above, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be practiced otherwise than as specifically illustrated.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an interface protection circuit according to an embodiment of the present disclosure, which may include:
a first voltage dividing circuit 11, a second voltage dividing circuit 12, and a clamp circuit 13; wherein,
a first terminal (i.e., IN terminal IN fig. 1) of the first voltage divider 11 is used to be electrically connected to the analog output pin, and a second terminal of the first voltage divider 11 is electrically connected to an input terminal of the clamp 13.
The analog output pin is the pin which needs to be connected with the pin to be protected. In this case, if the pin to be protected is not connected to the interface protection circuit, if the voltage output by the pin connected in error is greater than the voltage required by the pin to be protected to work normally, the pin to be protected may be burned out.
The output end of the clamping circuit 13 is electrically connected with the first end of the second voltage division circuit 12, and the second end of the second voltage division circuit 12 is grounded;
the common end (i.e., the OUT end in fig. 1) of the clamp circuit 13 and the second voltage divider circuit 12 is electrically connected to the pin to be protected, and the voltage at the output end of the clamp circuit is the voltage required by the pin to be protected to normally operate.
Through the interface protection circuit that this embodiment provided, no matter what analog output pin output voltage is, the voltage of input pin to be protected is the required voltage of clamp normal work, avoids the maloperation to make the pin insert the large voltage and burn out the pin.
Optionally, a schematic structural diagram of the clamp circuit 13 provided in the embodiment of the present invention is shown in fig. 2, and may include:
a first diode 21, a second diode 22, and a power supply 23; wherein,
the cathode of the second diode 22 is connected to the power supply 23;
the anode of the first diode 21 is electrically connected to the anode of the second diode 22, and the common end of the first diode 21 and the second diode 22 forms the input end (i.e., the IN end IN fig. 2) of the clamp circuit 13;
the cathode of the first diode 21 is the output end of the clamping circuit 13, i.e., the OUT end in fig. 2);
if the turn-on voltages of the first diode 21 and the second diode 22 are the same, the voltage of the power supply 23 is the same as the voltage required by the pin to be protected to operate normally.
In this embodiment, the voltage at the input terminal of the clamp circuit 13 is the sum of the voltage of the power supply 23 and the on voltage of the second diode 22. And the voltage at the output terminal of the clamp circuit 13 is the difference between the voltage at the input terminal of the clamp circuit 13 and the turn-on voltage of the first diode 21.
Optionally, another schematic structural diagram of the clamp circuit 13 provided in the embodiment of the present invention is shown in fig. 3, and may include:
a power source 31, a first diode group 32 composed of a plurality of diodes connected in series, and a second diode group 33 composed of a plurality of diodes connected in series; wherein,
the cathode of the second diode group 33 is connected to the power supply 31;
the anode of the first diode group 32 is electrically connected with the anode of the second diode group 33, and the common end of the first diode group 32 and the second diode group 33 forms the input end of the clamping circuit 13;
the cathode of the first diode group 32 is the output end of the clamping circuit 13;
if the turn-on voltages of the first diode group 32 and the second diode group 33 are the same, the voltage of the power source 31 is the same as the voltage required by the pin to be protected to operate normally.
In this embodiment, the voltage at the input terminal of the clamp circuit 13 is the sum of the voltage of the power supply 23 and the on voltage of the second diode group 33. And the voltage at the output terminal of the clamping circuit 13 is the difference between the voltage at the input terminal of the clamping circuit 13 and the turn-on voltage of the first diode group 32.
Optionally, the diodes involved in the clamp circuit may all be germanium transistors.
Optionally, the diodes involved in the clamp circuit may all be silicon tubes.
Optionally, the first voltage dividing circuit 11 is a package resistor, and the package resistor is a package resistor with a size larger than a preset size.
The embodiment of the utility model provides an in, first divider circuit 11 adopts big encapsulation resistance, and big encapsulation resistance power is bigger, and resistant heavy current ability is strong, is difficult for being burnt out when passing through the heavy current.
Alternatively, the first voltage divider circuit 11 may be a package resistor having a size greater than or equal to 0805 package resistor (size: 2.0mm x 1.2 mm). For example, the first voltage divider circuit 11 may be a 1206 package resistor (size: 3.2mm by 1.6mm), or a 1210 package resistor (size: 3.2mm by 2.5mm), or a 1812 package resistor (size: 4.5mm by 3.2mm), or a 2225 package resistor (size: 5.6mm by 6.5mm), etc.
Fig. 4 is a diagram illustrating a specific example of an interface protection circuit according to an embodiment of the present invention.
In fig. 4, PIN1 is a PIN to be protected, and the normal operating voltage of the PIN to be protected is 3.3V. And IN is used for connecting an analog output pin. Wherein, R1 and R2 constitute a first voltage dividing circuit, R3 constitutes a second voltage dividing circuit, and diode D1 (being an LS4148 diode), diode D2 (also being an LS4148 diode), and a 3.3V power supply constitute a clamping circuit.
As shown in fig. 5, an exemplary diagram of a specific application scenario of the interface protection circuit provided in the embodiment of the present invention is shown.
In fig. 5, an external circuit corresponding to the S4A pin of the U303 chip is the interface protection circuit provided by the embodiment of the present invention; the PIN3 is the PIN to be protected.
It is right above that the utility model provides an interface protection circuit has carried out detailed introduction. The embodiment of the present application has been applied to a specific embodiment and is described the principle and the implementation of the present invention, and the description of the above embodiments is only used to help understand the core idea of the present invention. It should be noted that, for those skilled in the art, without departing from the principle of the present invention, the present invention can be further modified and modified, and such modifications and modifications also fall within the protection scope of the appended claims.
Claims (7)
1. An interface protection circuit, comprising: the circuit comprises a first voltage division circuit, a second voltage division circuit and a clamping circuit; wherein,
the first end of the first voltage division circuit is used for being electrically connected with an analog output pin, and the second end of the first voltage division circuit is electrically connected with the input end of the clamping circuit;
the output end of the clamping circuit is electrically connected with the first end of the second voltage division circuit, and the second end of the second voltage division circuit is grounded;
the common end of the clamping circuit and the second voltage division circuit is electrically connected with a pin to be protected, and the voltage of the output end of the clamping circuit is the voltage required by the normal work of the pin to be protected.
2. The interface protection circuit of claim 1, wherein the clamp circuit comprises: a first diode, a second diode and a power supply; wherein,
the cathode of the second diode is connected with the power supply;
the anode of the first diode is electrically connected with the anode of the second diode, and the common end of the first diode and the second diode forms the input end of the clamping circuit;
and the cathode of the first diode is the output end of the clamping circuit.
3. The interface protection circuit of claim 1, wherein the clamp circuit comprises:
the power supply comprises a power supply, a first diode group and a second diode group, wherein the first diode group is formed by connecting a plurality of diodes in series; wherein,
the cathode of the second diode group is connected with the power supply;
the anode of the first diode group is electrically connected with the anode of the second diode group, and the common end of the first diode group and the second diode group forms the input end of the clamping circuit;
and the cathode of the first diode group is the output end of the clamping circuit.
4. The interface protection circuit of claim 2 or 3, wherein the diodes involved in the clamp circuit are all germanium transistors.
5. The interface protection circuit of claim 2 or 3, wherein the diodes involved in the clamp circuit are all silicon transistors.
6. The interface protection circuit of claim 1, wherein the first voltage divider circuit is a package resistor, and a size of the package resistor is greater than a predetermined size.
7. The interface guard circuit of claim 6, wherein the first voltage divider circuit is a packaged resistor having a size greater than or equal to 0805 packaged resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520996977.3U CN205141650U (en) | 2015-12-02 | 2015-12-02 | Interface protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520996977.3U CN205141650U (en) | 2015-12-02 | 2015-12-02 | Interface protection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205141650U true CN205141650U (en) | 2016-04-06 |
Family
ID=55627404
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520996977.3U Active CN205141650U (en) | 2015-12-02 | 2015-12-02 | Interface protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205141650U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116187222A (en) * | 2022-12-09 | 2023-05-30 | 海光集成电路设计(北京)有限公司 | Chip design method and device and related equipment |
-
2015
- 2015-12-02 CN CN201520996977.3U patent/CN205141650U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116187222A (en) * | 2022-12-09 | 2023-05-30 | 海光集成电路设计(北京)有限公司 | Chip design method and device and related equipment |
| CN116187222B (en) * | 2022-12-09 | 2024-02-02 | 海光集成电路设计(北京)有限公司 | Chip design method and device and related equipment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11128130B2 (en) | Protection circuit with bidirectional surge protection | |
| KR101935754B1 (en) | Overvoltage and overcurrent protection circuit and mobile terminal | |
| US9461455B2 (en) | Protecting circuit | |
| CN105437981B (en) | A kind of automobile electrion control system | |
| CN204068246U (en) | A kind of low pressure drop low-power dissipation power supply protective circuit | |
| CN104078940A (en) | Secondary power system and power supply device | |
| CN105226604B (en) | A kind of under-voltage/over-voltage protection circuit and set top box | |
| CN104218542A (en) | Battery protection circuit | |
| CN105356431A (en) | Device for preventing secondary power supply board part becomes invalid and leads to complete machine cabinet to fall electric | |
| CN201797293U (en) | Anti-surge protection circuit for aviation direct current power supply | |
| CN205141650U (en) | Interface protection circuit | |
| CN102855211A (en) | Universal serial bus-balanced voltage digital interface converter | |
| CN210137176U (en) | Overvoltage protection circuit | |
| US20130155565A1 (en) | Overcurrent protection circuit | |
| CN104967091A (en) | Overvoltage and overcurrent protection circuit | |
| CN202495738U (en) | Undervoltage protection circuit | |
| CN101826800A (en) | Power supply device | |
| CN113824107B (en) | Circuit with USB OTG intelligent identification and voltage/current protection functions | |
| CN102088248A (en) | Intrinsically safe power supply with high output power | |
| CN205029315U (en) | Direct -current overvoltage protection circuit | |
| CN204205547U (en) | Overcurrent protection circuit for high-power supply input end | |
| CN204030577U (en) | A kind of surge impact protection circuit for direct current machine and air conditioner | |
| CN207603205U (en) | A kind of overvoltage, current foldback circuit | |
| CN103259248B (en) | A kind of guard grating | |
| CN102780198B (en) | Current foldback circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |