CN205092767U - A starting drive again for automatic re -setting converter - Google Patents
A starting drive again for automatic re -setting converter Download PDFInfo
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- CN205092767U CN205092767U CN201520844673.5U CN201520844673U CN205092767U CN 205092767 U CN205092767 U CN 205092767U CN 201520844673 U CN201520844673 U CN 201520844673U CN 205092767 U CN205092767 U CN 205092767U
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Abstract
The utility model discloses a starting drive again for automatic re -setting converter, starting drive includes control voltage and busbar voltage acquisition circuit, source transformation circuit and energy storage and state detection circuitry, switching value state acquisition circuit, relay output control circuit and central control circuit again, and control voltage and busbar voltage acquisition circuit and source transformation circuit and energy storage and state detection circuitry are connected, and energy storage and state detection circuitry and switching value state acquisition circuit are connected. The utility model discloses the electric energy can be stored to the super capacitor energy storage circuit, control voltage and busbar voltage acquisition circuit can gather the control voltage and the busbar voltage of converter in real time and convey to central control unit, switching value state acquisition circuit can be gathered startup state, malfunction and the running state information of frequency conversion in real time and convey to central control unit, central control unit exports control signal to relay output control circuit, makes its control restart converter and resets the converter.
Description
Technical field
The utility model relates to a kind of Restarter for the frequency converter that automatically resets.
Background technology
Frequency converter is application converter technique and microelectric technique; the electric control appliance of alternating current motor is controlled by changing machine operation supply frequency mode; it has control voltage and busbar voltage; control voltage adopts civil power; busbar voltage adopts three-phase alternating current, in the process that frequency converter uses, often can cause civil power or three-phase alternating current instability because of grid disturbances; cause frequency converter hang-up, massive losses is brought to production.Therefore, be necessary to provide a kind of scheme to solve the problems referred to above.
Utility model content
The purpose of this utility model be to provide one can after generation grid disturbances detection of grid voltage in real time, and can line voltage recover normal after automatically start the Restarter for the frequency converter that automatically resets of frequency converter work.
To achieve these goals, the technical scheme that adopts of the utility model is as follows:
A kind of Restarter for the frequency converter that automatically resets, comprise control voltage and busbar voltage Acquisition Circuit, power converting circuit and energy storage and state detection circuit thereof, on-off state Acquisition Circuit, relay output control circuit and central control circuit, described control voltage and busbar voltage Acquisition Circuit, power converting circuit and energy storage and state detection circuit thereof, on-off state Acquisition Circuit and relay output control circuit are electrically connected with described central control circuit respectively, described control voltage and busbar voltage Acquisition Circuit are electrically connected with described power converting circuit and energy storage and state detection circuit thereof further, described power converting circuit and energy storage and state detection circuit thereof are electrically connected with described on-off state Acquisition Circuit further.
Preferably, described control voltage and busbar voltage Acquisition Circuit comprise low pass filtered and involve operational amplification circuit, first transformer, second transformer and the 3rd transformer, described first transformer comprises the first main coil and the first secondary coil, the first end of the first main line coil connects live wire, second end of the first main line coil connects zero line, the first input end that the first end of the first secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the first secondary coil, described second transformer comprises the second main coil and the second secondary coil, the first end of the second main coil connects the first input end of three phase mains, second end of the second main coil connects the second input of three phase mains, the second input that the first end of the second secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the second secondary coil, described 3rd transformer comprises the 3rd main coil and the 3rd secondary coil, the first end of the 3rd main coil connects the second input of three phase mains, second end of the 3rd main coil connects the 3rd input of three phase mains, the 3rd input that the first end of the 3rd secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the 3rd secondary coil, three outputs that described low pass filtered involves operational amplification circuit are electrically connected with described central control circuit respectively.
Preferably, described power converting circuit and energy storage and state detection circuit thereof comprise AC/DC wide input power circuit, the wide input power circuit of DC/DC, super capacitor energy-storage circuit and energy storage state testing circuit;
The first input end of the wide input power circuit of AC/DC is connected with live wire, second input of the wide input power circuit of AC/DC is connected with zero line, first output of the wide input power circuit of AC/DC is connected with the anode of the first diode, second output head grounding line of the wide input power circuit of AC/DC, the negative electrode of the first diode is connected with the first input end of the wide input power circuit of DC/DC, second input end grounding line of the wide input power circuit of DC/DC, first output of the wide input power circuit of DC/DC is connected with the input of linear stabilized power supply, second output of DC/DC wide input power circuit and linear stabilized power supply further earth connection respectively,
Described super capacitor energy-storage circuit comprises several end to end super capacitors, described super capacitor comprises positive pole and negative pole, wherein the negative pole of the first super capacitor is connected with time positive pole of position super capacitor, the minus earth line of end super capacitor, each super capacitor is connected in parallel to an equalizer circuit, the first resistance for current limliting is connected with between the positive pole of the first super capacitor and the negative electrode of described first diode, described first resistor in parallel has the second diode, wherein the negative electrode of the second diode is connected with the negative electrode of described first diode, the anode of the second diode is connected with the positive pole of the first super capacitor,
Described energy storage state testing circuit comprises the second resistance, the 3rd resistance and operational amplifier, described second resistance is connected between the normal phase input end of operational amplifier and the anode of the second diode, 3rd resistance is connected between the normal phase input end of operational amplifier and ground wire, the inverting input of operational amplifier is connected with the output of operational amplifier, and the output of operational amplifier is connected with central control circuit further.
Preferably, described on-off state Acquisition Circuit comprises DC/DC power circuit and first to fourth photoelectric coupled circuit, each photoelectric coupled circuit comprises photoelectrical coupler, 4th resistance, 5th resistance and the 6th resistance, described photoelectrical coupler comprises light-emitting diode and phototriode, described 4th resistance is connected between first output of described DC/DC wide input power circuit and the collector electrode of described phototriode, the grounded emitter of described phototriode, described 5th resistance is connected between the anode of described light-emitting diode and the negative electrode of described light-emitting diode, the further earth connection of negative electrode of described light-emitting diode, the anode of described light-emitting diode connects the first end of described 6th resistance further.
Preferably, described second end of the 6th resistance in first photoelectric coupled circuit detects intake with the starting state of frequency converter and is connected, described second end of the 6th resistance in second photoelectric coupled circuit is connected with the fault condition detection intake of frequency converter, described second end of the 6th resistance in 3rd photoelectric coupled circuit is connected with the condition monitoring intake of frequency converter, and the second end of described 6th resistance in the 4th photoelectric coupled circuit detects intake with reservation state and is connected; The first input end of described DC/DC power circuit connects the first output of the wide input power circuit of DC/DC, second input end grounding of DC/DC power circuit, the output of DC/DC power circuit is connected with the anode of the 3rd diode, the negative electrode of the 3rd diode connects frequency converter, and the circuit detecting intake, fault condition detection intake, condition monitoring intake and reservation state detection intake place for the starting state on frequency converter provides electric energy.
Preferably, described relay output control circuit comprises Phototube Coupling and output control circuit, the first to the 3rd relay, relay described in each includes coil and switch, described coil is electrically connected with described Phototube Coupling and output control circuit respectively, wherein the switch of the first relay is connected in series in the restart circuit of frequency converter, and the switch of the second relay is connected in series in the reset circuit of frequency converter.
Compared with prior art, the utility model is for the beneficial effect of the Restarter of the frequency converter that automatically resets: described super capacitor energy-storage circuit can store electrical energy, provides electric energy to described central control unit, described relay output control circuit and described on-off state Acquisition Circuit; Described control voltage and busbar voltage Acquisition Circuit can the control voltage of Real-time Collection frequency converter and busbar voltages be sent to central control unit; Described on-off state Acquisition Circuit can the starting state of Real-time Collection frequency conversion, malfunction and running state information be sent to central control unit; Described central control unit outputs control signals to relay output control circuit, makes it control to restart frequency converter and reset frequency converter.
Accompanying drawing explanation
Fig. 1 is the circuit theory diagrams of the utility model for the Restarter of the frequency converter that automatically resets;
Fig. 2 is the main circulating program logic diagram of the control method of Restarter described in the utility model;
Fig. 3 is the programmed logic figure of ready logic described in the utility model;
Fig. 4 is the programmed logic figure of voltage disturbance logic described in the utility model;
Fig. 5 is the programmed logic figure of watchdog logic described in the utility model.
In figure, each mark is as follows: 1, Restarter; 2, control voltage and busbar voltage Acquisition Circuit; 3, power converting circuit and energy storage and state detection circuit thereof; 4, on-off state Acquisition Circuit; 5, relay output control circuit; TW1, the first transformer; TW2, the second transformer; TW3, the 3rd transformer; L, live wire; N, zero line; The first input end of L1, three phase mains; Second input of L2, three phase mains; 3rd input of L3, three phase mains; R1, the first resistance; R2, the second resistance; R3, the 3rd resistance; R4, the 4th resistance; R5, the 5th resistance; R6, the 6th resistance; D1, the first diode; D2, the second diode; D3, the 3rd diode; Relay1, the first relay; Relay2, the second relay; Relay3, the 3rd relay; C, super capacitor; Y, equalizer circuit; OC, photoelectrical coupler; A1, operational amplifier; LDO, linear stabilized power supply.
Embodiment
Below in conjunction with specific embodiment, the utility model is described further.
Refer to shown in Fig. 1 to Fig. 5, the utility model provides a kind of Restarter 1 for the frequency converter that automatically resets, comprise control voltage and busbar voltage Acquisition Circuit 2, power converting circuit and energy storage and state detection circuit 3 thereof, on-off state Acquisition Circuit 4, relay output control circuit 5 and central control circuit, described central control circuit comprises microprocessor and peripheral circuit, described control voltage and busbar voltage Acquisition Circuit 2, power converting circuit and energy storage and state detection circuit 3 thereof, on-off state Acquisition Circuit 4 and relay output control circuit 5 are electrically connected with described central control circuit respectively, described control voltage and busbar voltage Acquisition Circuit 2 are electrically connected with described power converting circuit and energy storage and state detection circuit 3 thereof further, described power converting circuit and energy storage and state detection circuit 3 thereof are electrically connected with described on-off state Acquisition Circuit 4 further.
In the utility model, described control voltage and busbar voltage Acquisition Circuit 2 comprise low pass filtered and involve operational amplification circuit, first transformer TW1, second transformer TW2 and the 3rd transformer TW3, concrete connected mode is: described first transformer TW1 comprises the first main coil and the first secondary coil, the first end of the first main line coil connects live wire L, second end of the first main line coil connects zero line N, the first input end that the first end of the first secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the first secondary coil, described second transformer TW2 comprises the second main coil and the second secondary coil, the first end of the second main coil connects the first input end L1 of three phase mains, second end of the second main coil connects the second input L2 of three phase mains, the second input that the first end of the second secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the second secondary coil, described 3rd transformer TW3 comprises the 3rd main coil and the 3rd secondary coil, the first end of the 3rd main coil connects the second input L2 of three phase mains, second end of the 3rd main coil connects the 3rd input L3 of three phase mains, the 3rd input that the first end of the 3rd secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the 3rd secondary coil, three outputs that described low pass filtered involves operational amplification circuit are electrically connected with described central control circuit respectively.
This connected mode can convert strong voltage signal to low voltage signal by the first to the 3rd transformer, low voltage signal involves through low pass filtered and converts applicable central control circuit to after operational amplification circuit process and carry out analog-to-digital analog signal, this analog signal converts digital signal to through analog to digital conversion circuit, digital signal transfers to microprocessor again and processes, microprocessor adopts fourier algorithm to calculate control voltage value UIn and bus voltage value UI12 and UI23, judge control voltage and busbar voltage whether in normal range (NR), namely judge whether control voltage and busbar voltage disturbance occur.In the present embodiment, the normal range (NR) of setup control magnitude of voltage UIn is 80%Ut<UIn<110%Ut, the normal range (NR) of setting bus voltage value UI12 and UI23 is 80%Ue<UI12<110%Ue, 80%Ue<UI23<110%Ue, wherein Ut and Ue is the known definite value of setting.
In addition, described power converting circuit and energy storage and state detection circuit 3 thereof comprise AC/DC wide input power circuit, the wide input power circuit of DC/DC, super capacitor energy-storage circuit and energy storage state testing circuit.In the present embodiment, the voltage range of AC/DC wide input power circuit support input is the voltage range that the support of AC86 ~ 265V, DC/DC wide input power circuit inputs is 9 ~ 18V,
The first input end of the wide input power circuit of AC/DC is connected with live wire L, second input of the wide input power circuit of AC/DC is connected with zero line N, first output of the wide input power circuit of AC/DC exports 15V direct current, namely the magnitude of voltage at Fig. 1 interior joint A place is 15V, first output of the wide input power circuit of AC/DC is connected with the anode of the first diode D1, second output head grounding line of the wide input power circuit of AC/DC, the negative electrode of the first diode D1 is connected with the first input end of the wide input power circuit of DC/DC, second input end grounding line of the wide input power circuit of DC/DC, first output of the wide input power circuit of DC/DC exports 5V direct current, namely in Fig. 1, the magnitude of voltage at tie point B place is 5V, first output of the wide input power circuit of DC/DC is connected with the input of linear stabilized power supply LDO, second output of DC/DC wide input power circuit and the further earth connection of linear stabilized power supply LDO, the output of linear stabilized power supply LDO exports 3.3V direct current, namely in Fig. 1, the magnitude of voltage at tie point D place is 3.3V.Wherein, the first diode D1 can when control voltage disappears, and prevents that the electric energy that stores in super capacitor energy-storage circuit is counter delivers to the wide input power circuit of AC/DC.
When control voltage is normal, described super capacitor energy-storage circuit utilizes the wide input power circuit of described AC/DC to charge; As control voltage disappearance or the minimum input voltage value 9V lower than DC/DC wide input power circuit, described super capacitor energy-storage circuit provides electric energy can to the wide input power circuit of DC/DC, make Restarter 1 described in the utility model still can continue steady operation after control voltage disappears, when super capacitor energy-storage circuit output end magnitude of voltage is less than the minimum input voltage value 9V of DC/DC wide input power circuit, the wide input power circuit of DC/DC quits work, and does not export 5V voltage.
Described super capacitor energy-storage circuit comprises several end to end super capacitor C, described super capacitor C comprises positive pole and negative pole, wherein the negative pole of the first super capacitor C is connected with the positive pole of time position super capacitor C, the minus earth line of end super capacitor C, each super capacitor C is connected in parallel to an equalizer circuit Y, the first resistance R1 for current limliting is connected with between the positive pole of the first super capacitor C and the negative electrode of described first diode D1, described first resistance R1 is parallel with the second diode D2, wherein the negative electrode of the second diode D2 is connected with the negative electrode of described first diode D1, the anode of the second diode D2 is connected with the positive pole of the first super capacitor C.In the present embodiment, described super capacitor C and described equalizer circuit Y is equipped with 7.The electric energy that described second diode D2 can make super capacitor C store directly does not output to the wide input power circuit of DC/DC by the first resistance R1.Therefore current-limiting protection super capacitor C when the utility model can either make super capacitor C charge, does not waste electric energy when super capacitor C can be made again to discharge.
Described energy storage state testing circuit comprises the second resistance R2, 3rd resistance R3 and operational amplifier A 1, described second resistance R2 is connected between the normal phase input end of operational amplifier A 1 and the anode of the second diode D2, between the normal phase input end that 3rd resistance R3 is connected to operational amplifier A 1 and ground wire, the inverting input of operational amplifier A 1 is connected with the output of operational amplifier A 1, the output output voltage values Ucap of operational amplifier A 1 connects to central control circuit, be convenient to the electricity that central control circuit calculating super capacitor energy-storage circuit has stored, when only having the electricity of super capacitor energy-storage circuit storage abundant, just can provide enough electric energy that Restarter 1 is worked on when control voltage reduces.
Preferably, described on-off state Acquisition Circuit 4 comprises DC/DC power circuit and first to fourth photoelectric coupled circuit, the wide input power circuit of DC/DC provides electric energy to each photoelectric coupled circuit, each photoelectric coupled circuit comprises photoelectrical coupler OC, 4th resistance R4, 5th resistance R5 and the 6th resistance R6, described photoelectrical coupler OC comprises light-emitting diode and phototriode, described 4th resistance R4 is connected between first output of described DC/DC wide input power circuit and the collector electrode of described phototriode, the grounded emitter of described phototriode, described 5th resistance R5 is connected between the anode of described light-emitting diode and the negative electrode of described light-emitting diode, the further earth connection of negative electrode of described light-emitting diode, the anode of described light-emitting diode connects the first end of described 6th resistance R6 further.
Preferably, described second end of the 6th resistance R6 in the first photoelectric coupled circuit and the starting state of frequency converter detect intake (i.e. tie point BP_Start) and are connected; Second end of the described 6th resistance R6 in the second photoelectric coupled circuit is connected with the fault condition detection intake (i.e. tie point BP_Err) of frequency converter, second end of the described 6th resistance R6 in the 3rd photoelectric coupled circuit is connected with the condition monitoring intake (i.e. tie point BP_Run) of frequency converter, and the second end and the reservation state of the described 6th resistance R6 in the 4th photoelectric coupled circuit detect intake (i.e. tie point BP_FG) and be connected.
When starting state detection intake closes, frequency converter is in starting state; When starting state detects intake disconnection, frequency converter is in halted state; When fault condition detection intake closes, frequency converter is in the state of breaking down; When fault condition detection intake disconnects, frequency converter is in the state of not breaking down; When condition monitoring intake closes, frequency converter is in running status; When condition monitoring intake disconnects, frequency converter is in halted state.Described reservation state detection intake uses when being described Restarter 1 follow-up expanding function.
The first input end of described DC/DC power circuit connects the first output of the wide input power circuit of DC/DC, second input end grounding of DC/DC power circuit, the output of DC/DC power circuit exports 24V direct current, namely the magnitude of voltage at node C place is 24V, the output of DC/DC power circuit is connected with the anode of the 3rd diode D3, the negative electrode of the 3rd diode D3 connects frequency converter, and the circuit detecting intake, fault condition detection intake, condition monitoring intake and reservation state detection intake place for the starting state on frequency converter provides electric energy.
During use, if certain intake closes, the 24V voltage of the output of DC/DC power circuit enters into photoelectrical coupler OC after the 6th resistance R6 dividing potential drop, make lumination of light emitting diode, cause the magnitude of voltage of collector electrode place of phototriode to change, thus be convenient to central control unit and judge the closed of each intake and off-state according to the change of this place's magnitude of voltage.
Preferably, described relay output control circuit 5 comprises Phototube Coupling and output control circuit, the first to the 3rd relay, relay described in each includes coil and switch, described coil is electrically connected with described Phototube Coupling and output control circuit respectively, wherein the switch of the first relay R elay1 is connected in series in the restart circuit of frequency converter, the switch of the second relay R elay2 is connected in series in the reset circuit of frequency converter, uses when the 3rd relay R elay3 is described Restarter 1 follow-up expanding function.
The control method of Restarter 1 described in the utility model comprises the following steps:
A) system initialization is carried out;
B) data that collected by described control voltage and busbar voltage Acquisition Circuit 2 of described central control circuit, calculate control voltage value and bus voltage value;
C) described central control circuit judges the starting state of frequency converter, malfunction and running status by the signal that described on-off state Acquisition Circuit 4 is transmitted;
D) calculate the electricity stored in power converting circuit and energy storage and state detection circuit 3 thereof, and calculate and stored electricity and account for the percentage that can store upper limit electricity;
E) ready logic is entered;
F) voltage disturbance logic is entered;
G) watchdog logic is entered;
H) step b is returned).
Preferably, step e) described in ready logic comprise the following steps:
Whether be true (i.e. Ready=1), reset if very then prepare counter PC, ready logic terminates if a1) detecting preparation mark Ready; If false (i.e. Ready=0) enters next step;
B1) judge that the electricity stored in power converting circuit and energy storage and state detection circuit 3 thereof accounts for the percentage that can store upper limit electricity and whether is greater than the ratio preset, the ratio preset if be not more than, then prepare counter PC to reset, ready logic terminates; The ratio preset if be greater than, then enter next step;
C1) judge control voltage value and bus voltage value whether in the normal range (NR) preset, if control voltage value or bus voltage value be not in normal range (NR), then prepare counter PC and reset, ready logic terminates; If control voltage value and bus voltage value, all in normal range (NR), enter next step;
D1) according to starting state and the fault status information of frequency converter, judge whether frequency converter starts, and judge whether frequency converter breaks down, if frequency converter is in starting state and does not break down, then prepare counter PC and add 1, enter next step; If frequency converter does not start or breaks down, then prepare counter PC and reset, ready logic terminates;
Whether the count value e1) judging to prepare counter PC exceedes the preparation time numerical value (being designated as X1) preset, if exceed, be set to very by preparation mark Ready, ready logic terminates; If do not exceed, ready logic terminates.
Preferably, step f) described in voltage disturbance logic comprise the following steps:
A2) detect whether prepare mark Ready be true (i.e. Sunder=1), if vacation then voltage disturbance counter PC reset, voltage disturbance logic terminates; If true, then enter next step;
B2) detect whether voltage disturbance mark Sunder is true, if very then voltage disturbance counter PC resets, voltage disturbance logic terminates; If false (i.e. Sunder=0), then enter next step;
C2) whether detection control magnitude of voltage and bus voltage value exceed the normal range (NR) preset, if control voltage value and bus voltage value do not have overrun, then voltage disturbance counter PC resets, and voltage disturbance logic terminates; If control voltage value or bus voltage value overrun, then voltage disturbance counter PC adds 1, enters next step;
D2) judge whether the count value of voltage disturbance counter PC exceedes the disturbance time numerical value (being designated as X2) preset, if do not exceed, voltage disturbance logic terminates; If exceed, be set to very by voltage disturbance mark Sunder, voltage disturbance counter PC resets, and voltage disturbance logic terminates.
Preferably, step g) described in watchdog logic comprise the following steps:
A3) detect prepare mark Ready whether be true, if vacation then watchdog logic terminate; If true, then enter next step;
Whether b3) detect voltage disturbance mark Sunder is true, if vacation then watchdog logic terminate; If true, then enter next step;
C3) judge control voltage value and bus voltage value whether in the normal range (NR) preset, if control voltage value or bus voltage value be not in normal range (NR), then voltage disturbance counter PC adds 1, enters steps d 3); If control voltage value and bus voltage value are all in normal range (NR), then voltage disturbance mark Sunder is set to vacation, the count value of voltage disturbance counter PC resets, and enters step e3);
D3) judge whether the count value of voltage disturbance counter PC exceedes the disturbance time numerical value preset, if exceed, voltage disturbance mark Sunder is set to vacation, preparation mark Ready is set to vacation, and watchdog logic terminates; If do not exceed, watchdog logic terminates;
E3) according to starting state and the fault status information of frequency converter, judge whether frequency converter does not start, and enters next step if do not start; If start, watchdog logic terminates;
F3) according to the fault status information of frequency converter, judge whether frequency converter breaks down, if break down, reset frequency converter, enters next step; Step h3 is entered if do not break down;
G3) judge whether frequency converter continues to break down, if do not break down into next step; If still break down, preparation mark Ready is set to vacation, and watchdog logic terminates;
H3) frequency converter is restarted;
I3) judge whether frequency converter restarts successfully, if successful watchdog logic terminates; If unsuccessful, preparation mark Ready is set to vacation, and watchdog logic terminates.
In sum: Restarter 1 described in the utility model can gather control voltage and the busbar voltage of frequency converter simultaneously, gather starting state and the fault status information of frequency converter simultaneously, can first judge whether frequency converter breaks down before needs start frequency converter, if fault-free directly restarts frequency converter, if break down, first reset frequency converter restarts again, avoid due to frequency converter failure, even if export the problem that enabling signal also cannot start frequency converter.After described super capacitor energy-storage circuit storage Full Charge Capacity, can ensure that Restarter 1 runs more than 60s continuously after control voltage disappears, in addition, the wide input power circuit of AC/DC has buffer action, the overvoltage making super capacitor C avoid control voltage is invaded and harassed, and prevents super capacitor C because of the too high and breakdown inefficacy of charging voltage.Above characteristic can solve thoroughly after line voltage generation disturbance, and the problem of frequency converter non-programmed halt, for continuous seepage type user reduces economic loss, is enhanced productivity.
Schematically above be described the utility model and execution mode thereof, this description does not have restricted, and also just one of the execution mode of the present utility model shown in accompanying drawing, actual structure is not limited thereto.So, if those of ordinary skill in the art enlightens by it, when not departing from the utility model and creating aim, design the frame mode similar to this technical scheme and embodiment without creationary, protection range of the present utility model all should be belonged to.
Claims (6)
1. the Restarter for the frequency converter that automatically resets, it is characterized in that, comprise control voltage and busbar voltage Acquisition Circuit, power converting circuit and energy storage and state detection circuit thereof, on-off state Acquisition Circuit, relay output control circuit and central control circuit, described control voltage and busbar voltage Acquisition Circuit, power converting circuit and energy storage and state detection circuit thereof, on-off state Acquisition Circuit and relay output control circuit are electrically connected with described central control circuit respectively, described control voltage and busbar voltage Acquisition Circuit are electrically connected with described power converting circuit and energy storage and state detection circuit thereof further, described power converting circuit and energy storage and state detection circuit thereof are electrically connected with described on-off state Acquisition Circuit further.
2. as claimed in claim 1 for the Restarter of the frequency converter that automatically resets, it is characterized in that, described control voltage and busbar voltage Acquisition Circuit comprise low pass filtered and involve operational amplification circuit, first transformer, second transformer and the 3rd transformer, described first transformer comprises the first main coil and the first secondary coil, the first end of the first main line coil connects live wire, second end of the first main line coil connects zero line, the first input end that the first end of the first secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the first secondary coil, described second transformer comprises the second main coil and the second secondary coil, the first end of the second main coil connects the first input end of three phase mains, second end of the second main coil connects the second input of three phase mains, the second input that the first end of the second secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the second secondary coil, described 3rd transformer comprises the 3rd main coil and the 3rd secondary coil, the first end of the 3rd main coil connects the second input of three phase mains, second end of the 3rd main coil connects the 3rd input of three phase mains, the 3rd input that the first end of the 3rd secondary coil and low pass filtered involve operational amplification circuit is electrically connected, second terminate ground wire of the 3rd secondary coil, three outputs that described low pass filtered involves operational amplification circuit are electrically connected with described central control circuit respectively.
3. as claimed in claim 1 for the Restarter of the frequency converter that automatically resets, it is characterized in that, described power converting circuit and energy storage and state detection circuit thereof comprise AC/DC wide input power circuit, the wide input power circuit of DC/DC, super capacitor energy-storage circuit and energy storage state testing circuit;
The first input end of the wide input power circuit of AC/DC is connected with live wire, second input of the wide input power circuit of AC/DC is connected with zero line, first output of the wide input power circuit of AC/DC is connected with the anode of the first diode, second output head grounding line of the wide input power circuit of AC/DC, the negative electrode of the first diode is connected with the first input end of the wide input power circuit of DC/DC, second input end grounding line of the wide input power circuit of DC/DC, first output of the wide input power circuit of DC/DC is connected with the input of linear stabilized power supply, second output of DC/DC wide input power circuit and linear stabilized power supply further earth connection respectively,
Described super capacitor energy-storage circuit comprises several end to end super capacitors, described super capacitor comprises positive pole and negative pole, wherein the negative pole of the first super capacitor is connected with time positive pole of position super capacitor, the minus earth line of end super capacitor, each super capacitor is connected in parallel to an equalizer circuit, the first resistance for current limliting is connected with between the positive pole of the first super capacitor and the negative electrode of described first diode, described first resistor in parallel has the second diode, wherein the negative electrode of the second diode is connected with the negative electrode of described first diode, the anode of the second diode is connected with the positive pole of the first super capacitor,
Described energy storage state testing circuit comprises the second resistance, the 3rd resistance and operational amplifier, described second resistance is connected between the normal phase input end of operational amplifier and the anode of the second diode, 3rd resistance is connected between the normal phase input end of operational amplifier and ground wire, the inverting input of operational amplifier is connected with the output of operational amplifier, and the output of operational amplifier is connected with central control circuit further.
4. as claimed in claim 3 for the Restarter of the frequency converter that automatically resets, it is characterized in that, described on-off state Acquisition Circuit comprises DC/DC power circuit and first to fourth photoelectric coupled circuit, each photoelectric coupled circuit comprises photoelectrical coupler, 4th resistance, 5th resistance and the 6th resistance, described photoelectrical coupler comprises light-emitting diode and phototriode, described 4th resistance is connected between first output of described DC/DC wide input power circuit and the collector electrode of described phototriode, the grounded emitter of described phototriode, described 5th resistance is connected between the anode of described light-emitting diode and the negative electrode of described light-emitting diode, the further earth connection of negative electrode of described light-emitting diode, the anode of described light-emitting diode connects the first end of described 6th resistance further.
5., as claimed in claim 4 for the Restarter of the frequency converter that automatically resets, it is characterized in that,
Described second end of the 6th resistance in first photoelectric coupled circuit detects intake with the starting state of frequency converter and is connected, described second end of the 6th resistance in second photoelectric coupled circuit is connected with the fault condition detection intake of frequency converter, described second end of the 6th resistance in 3rd photoelectric coupled circuit is connected with the condition monitoring intake of frequency converter, and the second end of described 6th resistance in the 4th photoelectric coupled circuit detects intake with reservation state and is connected;
The first input end of described DC/DC power circuit connects the first output of the wide input power circuit of DC/DC, second input end grounding of DC/DC power circuit, the output of DC/DC power circuit is connected with the anode of the 3rd diode, the negative electrode of the 3rd diode connects frequency converter, and the circuit detecting intake, fault condition detection intake, condition monitoring intake and reservation state detection intake place for the starting state on frequency converter provides electric energy.
6. as claimed in claim 1 for the Restarter of the frequency converter that automatically resets, it is characterized in that, described relay output control circuit comprises Phototube Coupling and output control circuit, the first to the 3rd relay, relay described in each includes coil and switch, described coil is electrically connected with described Phototube Coupling and output control circuit respectively, wherein the switch of the first relay is connected in series in the restart circuit of frequency converter, and the switch of the second relay is connected in series in the reset circuit of frequency converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520844673.5U CN205092767U (en) | 2015-10-28 | 2015-10-28 | A starting drive again for automatic re -setting converter |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520844673.5U CN205092767U (en) | 2015-10-28 | 2015-10-28 | A starting drive again for automatic re -setting converter |
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| Publication Number | Publication Date |
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| CN205092767U true CN205092767U (en) | 2016-03-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520844673.5U Withdrawn - After Issue CN205092767U (en) | 2015-10-28 | 2015-10-28 | A starting drive again for automatic re -setting converter |
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| CN (1) | CN205092767U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105843126A (en) * | 2016-05-11 | 2016-08-10 | 江苏国网自控科技股份有限公司 | Intelligent type frequency converter DC support controller and control method thereof |
| CN105932868A (en) * | 2015-10-28 | 2016-09-07 | 江苏国网自控科技股份有限公司 | Restarting device for automatic resetting frequency converter and control method of restarting device |
-
2015
- 2015-10-28 CN CN201520844673.5U patent/CN205092767U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105932868A (en) * | 2015-10-28 | 2016-09-07 | 江苏国网自控科技股份有限公司 | Restarting device for automatic resetting frequency converter and control method of restarting device |
| CN105932868B (en) * | 2015-10-28 | 2019-03-08 | 江苏国网自控科技股份有限公司 | Restarter and its control method for the frequency converter that automatically resets |
| CN105843126A (en) * | 2016-05-11 | 2016-08-10 | 江苏国网自控科技股份有限公司 | Intelligent type frequency converter DC support controller and control method thereof |
| CN105843126B (en) * | 2016-05-11 | 2018-07-13 | 江苏国网自控科技股份有限公司 | A kind of intelligent type frequency-conversion device DC support controller and its control method |
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Granted publication date: 20160316 Effective date of abandoning: 20190308 |