CN205080893U - Reduce liquid crystal disply device of drive consumption - Google Patents
Reduce liquid crystal disply device of drive consumption Download PDFInfo
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- CN205080893U CN205080893U CN201520801799.4U CN201520801799U CN205080893U CN 205080893 U CN205080893 U CN 205080893U CN 201520801799 U CN201520801799 U CN 201520801799U CN 205080893 U CN205080893 U CN 205080893U
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Abstract
The utility model provides a reduce liquid crystal disply device of drive consumption, contains a plurality of gate signal lines that intercrossing set up with a plurality of source electrode signal lines, correspond a plurality of common utmost point signal line of above -mentioned source electrode signal line interval setting, a plurality of common polar plate, a gate drive circuit and a common utmost point drive circuit who scans above -mentioned gate signal line respectively. Above -mentioned gate signal line divides a plurality of horizontal segments into and above -mentioned source electrode signal line divides a plurality of vertical sections into. Above -mentioned common polar plate correspondence sets up between the matrix that above -mentioned horizontal segment and above -mentioned vertical section limitd and the electric common utmost point signal line that corresponds of being connected of each common polar plate. Should common utmost point drive circuit setting for and receiving each common polar plate of scanning horizontal segment be a common voltage level, at least one that sets for all the other common polar plates is a high impedance level.
Description
Technical field
The utility model relates to a kind of display device, particularly relates to a kind of liquid crystal indicator reducing driving power consumption.
Background technology
Existing in the display device such as such as liquid crystal display, electroluminescent display and electrophoretic display device (EPD), by install a touch control sensor provide on the panel of described display user viewing picture image while, also reach by touching this panel as in the past with the entity such as keyboard or mouse input media to input the object of instruction.In display device constantly towards under the trend development of slimming, as touch-control sensing internally-arranged type (or integrated) display device being disclosed in Chinese invention patent notification number CN102650916A, because touch control sensor is embedded in panel by this internally-arranged type display device, therefore compare him and plant the solution adopting outer hung type sensor to integrate to reach touch-control display, this internally-arranged type touch control display apparatus can provide the effect that integral thickness is thinner really.Meanwhile, also promote its transmittance because the integral thickness of panel declines, thus preferably brightness can be obtained with visual under identical backlight conditions.
But, this internally-arranged type touch control display apparatus during a touch-control for detecting position of touch, during a display between many source signal lines of many duplexing lines supplying a common voltage and writing pixel data voltage, because of folded structure, derivative stray capacitance can cause the extra power consumption of source electrode drive circuit.
Utility model content
Therefore, the purpose of this utility model is to provide a kind of liquid crystal indicator reducing the reduction driving power consumption of the extra power consumption that stray capacitance causes.
So, the utility model reduces the liquid crystal indicator of driving power consumption, comprises multiple gate signal wire, multiple source signal line, multiple common poles signal wire, multiple pixel cell, multiple common pole plate, a gate drive circuit, a source electrode drive circuit and a common pole driving circuit.
Above-mentioned gate signal wire is parallel to each other and arrange along column direction, and is that a unit is divided into multiple horizontal segment with the gate signal wire of part, and wherein, each horizontal segment is made up of multiple gate signal wire.
Above-mentioned source signal line is parallel to each other and be vertically installed in described gate signal wire along a line direction, and is that a unit is divided into multiple vertical section with the source signal line of part, and wherein, each vertical section is made up of multiple source signal line.
Above-mentioned common pole signal wire corresponds respectively to above-mentioned source signal line compartment of terrain along this line direction and arranges.
Above-mentioned pixel cell is arranged between the matrix that defined by above-mentioned gate signal wire and above-mentioned source signal line respectively accordingly, and the gate signal wire corresponding to same column direction pixel cell electrical connection, the source signal line corresponding to same line direction pixel cell electrical connection.
Above-mentioned common pole plate to be arranged between the matrix that defined by above-mentioned horizontal segment and above-mentioned vertical section and those pixel cells corresponding to being electrically connected respectively accordingly, and each this common pole signal wire corresponding to common pole plate electrical connection.
This gate drive circuit is electrically connected above-mentioned gate signal wire, and scans above-mentioned gate signal wire one by one.
This source electrode drive circuit is electrically connected above-mentioned source signal line, and writes the pixel cell of data to the same column direction on the gate signal wire scanned.
This driving circuit electrical connection above-mentioned common pole, common pole signal wire, and those common pole plates of the pixel cell of the same column direction be electrically connected on the gate signal wire that scanned are set as the column voltage levels needed for a write data, and at least one of remaining common pole plate is set as one is replaced level, and this replacement level comprises a high impedance level.
Preferably, this replacement level also comprises an earth level.
Preferably, this replacement level also comprises a power level.
Preferably, each pixel cell comprises a thin film transistor (TFT) and a liquid crystal capacitance.This thin film transistor (TFT) has the source electrode of the gate of the gate signal wire corresponding to a connection, the source signal line corresponding to a connection, and a drain; This liquid crystal capacitance is electrically connected between this drain and corresponding common pole plate.
Preferably, above-mentioned common pole signal wire is parallel to each other and establish above-mentioned source signal line respectively at another plane is folded in fact.
Preferably, this common pole driving circuit comprises multiple multiplexer, be electrically connected above-mentioned common pole signal wire respectively and each multiplexer receives this column voltage levels and this replacement level, on the corresponding gate signal wire scanned, the multiplexer of those common pole plates of same row pixel cell electrical connection exports this column voltage levels, and at least multiplexer of all the other common pole plates corresponding exports this replacement level.
Preferably, all multiplexers of all the other common pole plates corresponding export this replacement level.
The beneficial effects of the utility model are: correspondence be not subject at least one of the common pole plate of horizontal scan section to be set as this high impedance level by this common pole driving circuit, energy blocking-up is formed at the current path of common pole signal wire and the stray capacitance between the corresponding source signal line arranged connected corresponding to this common pole plate in this high impedance level, thus can reach the object reducing the extra power consumption of this source electrode drive circuit.
Accompanying drawing explanation
Of the present utility model other feature and effect, by reference to accompanying drawing embodiment in clearly present, wherein:
Fig. 1 is a circuit diagram, and an embodiment of the present utility model is described;
Fig. 2 is a partial enlarged drawing, and multiple pixel cells of an electrical connection common pole plate are described;
Fig. 3 is a circuit diagram, and a common pole driving circuit is described;
Fig. 4 is a configuration schematic diagram, and the configuration relation of 9*9 corresponding 27 the gate signal wires of common pole plate is described;
Fig. 5 is a sectional perspective schematic diagram, and the stray capacitance between a common pole signal wire and a source signal line being formed at and being stacked and establishing is described;
Fig. 6 is a waveform schematic diagram, illustrate and set one by this common pole driving circuit to replace level be a high impedance level, voltage waveform change when corresponding described source signal line transmits the output data voltage of a source electrode drive circuit on the signal wire of described common pole;
Fig. 7 is a waveform schematic diagram, and illustrating that this common pole driving circuit sets this replacement level is an earth level, voltage waveform change when corresponding described source signal line transmits the output data voltage of this source electrode drive circuit on the signal wire of described common pole;
Fig. 8 is a waveform schematic diagram, and illustrating that this common pole driving circuit sets this replacement level is a power level, voltage waveform change when corresponding described source signal line transmits the output data voltage of this source electrode drive circuit on the signal wire of described common pole.
Embodiment
Consult Fig. 1 and Fig. 2, the embodiment that the utility model reduces the liquid crystal indicator of driving power consumption comprises multiple gate signal wire G, multiple source signal line S, multiple common pole signal wire COM, multiple pixel cell P, multiple common pole plate PAD, a gate drive circuit 1, source electrode drive circuit 2 and a common pole driving circuit 3.Wherein, for convenience of description, this embodiment shown in Fig. 1 is described for 9*6 pixel cell P, but not according to this quantity be limited.
These 9 gate signal wire G1 ~ G9 are parallel to each other and arrange along column direction, and are that a unit is divided into 3 horizontal segments with 3 gate signal wire G.
These 6 source signal line S1 ~ S6 are parallel to each other and be vertically installed in this 9 gate signal wire G1 ~ G9 along a line direction, and are that a unit is divided into 2 vertical sections with 3 source signal line S.
These 6 common pole signal wire COM1 ~ COM6 are parallel to each other and correspond respectively to this 6 source signal line S1 ~ S6 compartment of terrains along this line direction and arrange.In the present embodiment, these 6 common pole signal wire COM1 ~ COM6 and this 6 source signal line S1 ~ S6 are arranged at two different conductive layers respectively, and these 6 common pole signal wire COM1 ~ COM6 are partly stacked at this 6 source signal line S1 ~ S6 respectively.Such as, common pole signal wire COM1 is partly stacked at source signal line S1, common pole signal wire COM2 is partly stacked at source signal line S2, and the rest may be inferred.
It should be noted that when described common pole signal wire COM is arranged at two different conductive layers respectively from described source signal line S, described common pole signal wire COM also can fold completely to establish or do not fold and establish described source signal line S.In addition, described common pole signal wire COM also can source signal line S described in interval and be arranged at same conductive layer.
This 9*6 pixel cell P is arranged between the matrix that defined by these 9 gate signal wire G1 ~ G9 and this 6 source signal line S1 ~ S6 respectively accordingly, and the gate signal wire G corresponding to same column direction pixel cell P electrical connection, the source signal line S corresponding to same line direction pixel cell P is electrically connected.Such as, those pixel cells P being arranged at first row is electrically connected gate signal wire G1, is arranged at those pixel cells P electrical connection gate signal wire G2 of secondary series, and the rest may be inferred.Those pixel cells P being arranged at the first row is electrically connected source signal line S1, is arranged at those pixel cells P electrical connection source signal line S2 of the second row, and the rest may be inferred.
Each pixel cell P comprises an a thin film transistor (TFT) TFT and liquid crystal capacitance C
lC.This thin film transistor (TFT) TFT have one connect corresponding to gate signal wire G gate, one connect corresponding to the source electrode of source signal line S and a drain.This liquid crystal capacitance C
lCbe electrically connected between this drain and corresponding common pole plate PAD.
These 6 common pole plate PAD11 ~ PAD32 are arranged between the matrix that defined by these 3 horizontal segments and this 2 vertical sections respectively accordingly, and those pixel cells P corresponding to electrical connection.Common pole signal wire COM corresponding to each common pole plate PAD is electrically connected with multiple perforation VIA.Such as common pole plate PAD11 is electrically connected common pole signal wire COM1, common pole plate PAD21 is electrically connected common pole signal wire COM2, and the rest may be inferred.
This gate drive circuit 1 is electrically connected this 9 gate signal wire G1 ~ G9, and scans this 9 gate signal wire G1 ~ G9 one by one.
This source electrode drive circuit 2 is electrically connected this 6 source signal line S1 ~ S6, and writes the pixel cell P of data to the same column direction on the gate signal wire G scanned.
Consult Fig. 3, this common pole driving circuit 3 comprises a column voltage levels V exported required for a write data to pixel cell P
comcommon voltage generator 31, and 6 multiplexer MX1 ~ MX6 being electrically connected these 6 common pole signal wire COM1 ~ COM6 respectively.Each multiplexer MX receives this column voltage levels V
comand one is replaced level, wherein, this replacement level comprises a high impedance level HiZ, an earth level GND and power level V
supply.
Consult Fig. 1 and Fig. 3, on the corresponding gate signal wire G scanned, the multiplexer MX of those common pole plate PAD that same row pixel cell P is electrically connected exports this column voltage levels V
com, the multiplexer MX of all the other common pole plate PAD corresponding exports this replacement level.Such as, when this gate drive circuit 1 is scanned up to any one in gate signal wire G1 ~ G3, then multiplexer MX1, MX4 exports this column voltage levels V respectively
com, and respectively by common pole signal wire COM1, COM4 by this column voltage levels V
combe passed to electrical connection first common pole plate PAD11, PAD12 to the 3rd row pixel cell, multiplexer MX2, MX3, MX5 and MX6 then export this replacement level.And when this gate drive circuit 1 is scanned up to any one in gate signal wire G4 ~ G6, then multiplexer MX2, MX5 exports this column voltage levels V respectively
com, and respectively by common pole signal wire COM2, COM5 by this column voltage levels V
combe passed to electrical connection the 4th common pole plate PAD21, PAD22 to the 6th row pixel cell, multiplexer MX1, MX3, MX4 and MX6 then export this replacement level, and the rest may be inferred.
Consult Fig. 4, the quantity extending above-mentioned common pole plate PAD to 9*9, to further illustrate the mode of operation of this common pole driving circuit 3.
Mode one, suppose to put in a very first time any one that this gate drive circuit 1 scans in the gate signal wire G1 ~ G3 of corresponding common pole plate PAD11 ~ PAD19, then this common pole driving circuit 3 exports this column voltage levels V
comto those common pole plate PAD11 ~ PAD19, and export this replacement level to remaining common pole plate PAD21 ~ PAD99.In second time point, this gate drive circuit 1 scans any one in the gate signal wire G4 ~ G6 of corresponding common pole plate PAD21 ~ PAD29, then this common pole driving circuit 3 exports this column voltage levels V
comto those common pole plate PAD21 ~ PAD29, and export this replacement level to remaining common pole plate PAD11 ~ PAD19, PAD31 ~ PAD99.It should be noted that, this sentences every 3 gate signal wire G is that a horizontal segment is described, but as know this skill people known to, the quantity of the gate signal wire G corresponding to each horizontal segment also can be other integer and 3 being limited of disobeying that this place lifts.
Mode two, suppose to put in this very first time any one that this gate drive circuit 1 scans in the gate signal wire G1 ~ G3 of corresponding common pole plate PAD11 ~ PAD19, then this common pole driving circuit 3 exports this column voltage levels V
comto those common pole plate PAD11 ~ PAD19, and at interval of those common pole plate PAD41 ~ PAD49, PAD71 ~ PAD79 of two horizontal segments, and export this replacement level to remaining common pole plate PAD21 ~ PAD39, PAD51 ~ PAD69 and PAD81 ~ PAD99.In this second time point, this gate drive circuit 1 scans any one in the gate signal wire G4 ~ G6 of corresponding common pole plate PAD21 ~ PAD29, then this common pole driving circuit 3 exports this column voltage levels V
comto those common pole plate PAD21 ~ PAD29, and at interval of those common pole plate PAD51 ~ PAD59, PAD81 ~ PAD89 of two horizontal segments, and export this replacement level to remaining common pole plate PAD11 ~ PAD19, PAD31 ~ PAD49, PAD61 ~ PAD79, and PAD91 ~ PAD99, the rest may be inferred.It should be noted that this sentences at interval of two horizontal segments is that example is described, but the horizontal segment quantity at this interval also can be other integer.
Consult Fig. 1 again, when this gate drive circuit 1 is scanned up to gate signal wire G1, this common pole driving circuit 3 exports this column voltage levels V
combe passed to common pole plate PAD11, PAD12 to common pole signal wire COM1, COM4, and this common pole driving circuit 3 exports this alternative level extremely common pole signal wire COM2, COM3, COM5 and COM6.Below illustrate that this alternative level is respectively this high impedance level HiZ, this earth level GND and this power level V respectively
supplymode of operation.
Consult Fig. 5 and Fig. 6, when this alternative level is this high impedance level HiZ, when this source electrode drive circuit 2 writes data to the pixel cell P of first row, be coupled in the stray capacitance C of source signal line S2, S3, S5, S6 and common pole signal wire COM2, COM3, COM5, COM6 respectively
parblock the path of electric current because its one end is in this high impedance level HiZ, thus do not consume power supply extra corresponding to the output circuit of source signal line S2, S3, S5, S6 in this source electrode drive circuit 2.
Consult Fig. 7, when this alternative level is this earth level GND, when this source electrode drive circuit 2 writes data to the pixel cell P of first row, be coupled in the stray capacitance C of source signal line S2, S3, S5, S6 and common pole signal wire COM2, COM3, COM5, COM6 respectively
parbecause one end is in this earth level GND, thus save the power consumption that this common pole driving circuit 3 corresponds to common pole signal wire COM2, COM3, COM5, COM6.
Consult Fig. 8, when this alternative level is this power level V
supplytime, when this source electrode drive circuit 2 writes data to the pixel cell P of first row, be coupled in the stray capacitance C of source signal line S2, S3, S5, S6 and common pole signal wire COM2, COM3, COM5, COM6 respectively
parbecause one end is in this power level V
supply, thus save the power consumption that this common pole driving circuit 3 corresponds to common pole signal wire COM2, COM3, COM5, COM6, and because of this power level V
supplythe transient state reaction returning back to its steady-state value after being disturbed is better than this column voltage levels V
com, thus can reduce the overall power of display device.
Via above explanation, above-described embodiment has the following advantages:
One, be electrically connected above-mentioned common pole signal wire COM by this common pole driving circuit 3, and those common pole plate PAD of the pixel cell P of the same column direction be electrically connected on the gate signal wire G that scanned are set as the column voltage levels V needed for a write data
com, and at least one of remaining common pole plate PAD is set as this high impedance level HiZ, those common pole signal wire COM and the stray capacitance C between corresponding those source signal lines S arranged of being formed in high impedance level HiZ can be blocked
parfor the extra power consumption of this source electrode drive circuit 2.
Two, be electrically connected above-mentioned common pole signal wire COM by this common pole driving circuit 3, and those common pole plate PAD of the pixel cell P of the same column direction be electrically connected on the gate signal wire G that scanned are set as the column voltage levels V needed for a write data
com, and at least one of remaining common pole plate PAD is set as this earth level GND, those common pole signal wire COM and the stray capacitance C between corresponding those source signal lines S arranged of being formed in high impedance level HiZ can be saved
parfor the extra power consumption of this common pole driving circuit 3.
Three, be electrically connected above-mentioned common pole signal wire COM by this common pole driving circuit 3, and those common pole plate PAD of the pixel cell P of the same column direction be electrically connected on the gate signal wire G that scanned are set as the column voltage levels V needed for a write data
com, and be set as this power level V by least one of remaining common pole plate PAD
supply, those common pole signal wire COM and the stray capacitance C between corresponding those source signal lines S arranged of being formed in high impedance level HiZ can be saved
parfor the extra power consumption of this common pole driving circuit 3, and due to this power level V
supplythis column voltage levels V being better than this common voltage generator 31 and producing is reacted from the transient state returning back to steady-state value by disturbance
com, thus can reduce overall power consumption.
In sum, so really can the purpose of this utility model be reached.
Claims (7)
1. one kind is reduced the liquid crystal indicator of driving power consumption, comprise: multiple parallel to each other and gate signal wire arranged along column direction, multiple parallel to each other and be vertically installed in the source signal line of described gate signal wire along a line direction, the feature of this liquid crystal indicator is:
Above-mentioned gate signal wire is that a unit is divided into multiple horizontal segment with the gate signal wire of part, and wherein, each horizontal segment is made up of multiple gate signal wire;
Above-mentioned source signal line is that a unit is divided into multiple vertical section with the source signal line of part, and wherein, each vertical section is made up of multiple source signal line; And this liquid crystal indicator also comprises:
Multiple common poles signal wire, corresponds respectively to above-mentioned source signal line compartment of terrain along this line direction and arranges;
Multiple pixel cell, be arranged between the matrix that defined by above-mentioned gate signal wire and above-mentioned source signal line respectively accordingly, and the gate signal wire corresponding to same column direction pixel cell electrical connection, the source signal line corresponding to same line direction pixel cell electrical connection;
Multiple common pole plate, to be arranged between the matrix that defined by above-mentioned horizontal segment and above-mentioned vertical section and those pixel cells corresponding to being electrically connected respectively accordingly, and each this common pole signal wire corresponding to common pole plate electrical connection;
A gate drive circuit, is electrically connected above-mentioned gate signal wire, and scans above-mentioned gate signal wire one by one;
A source electrode drive circuit, is electrically connected above-mentioned source signal line, and writes the pixel cell of data to the same column direction on the gate signal wire scanned; And
A common pole driving circuit, be electrically connected above-mentioned common pole signal wire, and those common pole plates of the pixel cell of the same column direction be electrically connected on the gate signal wire that scanned are set as the column voltage levels needed for a write data, and at least one of remaining common pole plate is set as one is replaced level, and this replacement level comprises a high impedance level.
2. the liquid crystal indicator of reduction driving power consumption according to claim 1, is characterized in that: this replacement level also comprises an earth level.
3. the liquid crystal indicator of reduction driving power consumption according to claim 1, is characterized in that: this replacement level also comprises a power level.
4. the liquid crystal indicator of reduction driving power consumption according to claim 1, is characterized in that: each pixel cell comprises:
A thin film transistor (TFT), has the gate of the gate signal wire corresponding to a connection, the source electrode of the source signal line corresponding to a connection, and a drain, and
A liquid crystal capacitance, is electrically connected between this drain and corresponding common pole plate.
5. the liquid crystal indicator of reduction driving power consumption according to claim 1, is characterized in that: above-mentioned common pole signal wire is parallel to each other and establish above-mentioned source signal line respectively at another plane is folded in fact.
6. the liquid crystal indicator of reduction driving power consumption according to claim 1, it is characterized in that: this common pole driving circuit comprises multiple multiplexer, be electrically connected above-mentioned common pole signal wire respectively and each multiplexer receives this column voltage levels and this replacement level, on the corresponding gate signal wire scanned, the multiplexer of those common pole plates of same row pixel cell electrical connection exports this column voltage levels, and at least multiplexer of all the other common pole plates corresponding exports this replacement level.
7. the liquid crystal indicator of reduction driving power consumption according to claim 6, is characterized in that: all multiplexers of all the other common pole plates corresponding export this replacement level.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520801799.4U CN205080893U (en) | 2015-10-15 | 2015-10-15 | Reduce liquid crystal disply device of drive consumption |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520801799.4U CN205080893U (en) | 2015-10-15 | 2015-10-15 | Reduce liquid crystal disply device of drive consumption |
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| CN205080893U true CN205080893U (en) | 2016-03-09 |
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| CN201520801799.4U Active CN205080893U (en) | 2015-10-15 | 2015-10-15 | Reduce liquid crystal disply device of drive consumption |
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Address after: Taiwan Hsinchu County China jhubei City, Taiwan two yuan Street No. 1 10 floor 1 Patentee after: ILI TECHNOLOGY Corp. Address before: Taiwan Hsinchu County Tai Yuan Street Chinese jhubei City, No. 26 5 floor 1 Patentee before: Morning hair Polytron Technologies Inc. |
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Effective date of registration: 20170524 Address after: Taiwan Hsinchu County Tai Yuan Street Chinese jhubei City, No. 26 5 floor 1 Patentee after: Morning hair Polytron Technologies Inc. Address before: Taiwan Hsinchu County Tai Yuan Street Chinese jhubei City, No. 38 8 floor Patentee before: ILI TECHNOLOGY Corp. |
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Effective date of registration: 20210201 Address after: Grand Cayman Islands Patentee after: Yili Technology (Cayman) Co.,Ltd. Address before: 1, 10th floor, No.1, Taiyuan 2nd Street, Zhubei City, Xinzhu County, Taiwan, China Patentee before: ILI TECHNOLOGY Corp. |
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Effective date of registration: 20220422 Address after: Hsinchu County, Taiwan, China Patentee after: ILI TECHNOLOGY Corp. Address before: Grand Cayman, Cayman Islands Patentee before: Yili Technology (Cayman) Co.,Ltd. |