CN205051789U

CN205051789U - High -speed image acquisition processing apparatus based on USB3. 0

Info

Publication number: CN205051789U
Application number: CN201520699493.2U
Authority: CN
Inventors: 刘振茂; 阳韬
Original assignee: Shenzhen Senvite Electronic Technology Co Ltd
Current assignee: Shenzhen Senvite Electronic Technology Co Ltd
Priority date: 2015-09-09
Filing date: 2015-09-09
Publication date: 2016-02-24
Anticipated expiration: 2025-09-09

Abstract

The utility model provides a high -speed image acquisition processing apparatus based on USB3.0, including the USB3.0 host system who is responsible for the image data transmission, logical processing chip, data buffering processing module, the interface of making a video recording, controllable power supply, controllable clock, USB3.0 interface and data storage chip able to programme, wherein, USB3.0 host system respectively with logical processing chip, controllable power supply, controllable clock, USB3.0 interface, data storage chip are connected, the logical processing chip respectively with the interface, data buffering processing module of making a video recording is connected. The beneficial effects of the utility model are that: all kinds of camera module interfaces on the market can be matchd, through this USB3.0's high -speed image acquisition processing apparatus, appointed image data form can be exported simultaneously.

Description

Based on the high speed image acquisition and processing device of USB3.0

Technical field

The utility model relates to image acquisition and processing device, particularly relates to a kind of high speed image acquisition and processing device based on USB3.0.

Background technology

Along with the high speed development of science and technology, photographing module has quietly entered into the every field of our life, as smart mobile phone, safety monitoring, vehicle-mounted recording, model plane shooting, medical treatment detection, automation are accurately located, and photographing module has had surprising lifting in transmission speed and pixel class, the pixel of indivedual photographing module has reached several ten million pixels; In the middle of this, there is a key point, the view data requiring camera module to transmit exactly can at a high speed, stable, be effectively uploaded to PC end; Graphic transmission equipments numerous is at present all based on USB2.0 interface, and be just responsible for image transmitting, interface type is more single, compatible poor, most of image processing work all concentrates on PC end simultaneously, store image at PC end, analyze and process, increase PC and hold work load, corresponding high-pixel camera module USB2.0 interface is subject to certain restrictions in transmission speed.

Summary of the invention

In order to solve the problems of the prior art, the utility model provides a kind of high speed image acquisition and processing device based on USB3.0.

The utility model provides a kind of high speed image acquisition and processing device based on USB3.0, comprise the USB3.0 main control module of responsible image data transmission, programmable logical process chip, data buffer storage processing module, camera interface, controllable electric power, controlled clock, USB3.0 interface and pin-saving chip, wherein, described USB3.0 main control module is connected with described logical process chip, controllable electric power, controlled clock, USB3.0 interface, pin-saving chip respectively, and described logical process chip is connected with described camera interface, data buffer storage processing module respectively.

As further improvement of the utility model, described data buffer storage processing module is DDR chip.

As further improvement of the utility model, described controllable electric power is the 4 channel power source managing chip AD5316 with I2C communication interface.

As further improvement of the utility model, described USB3.0 main control module is Sai Pulasi CYUSB3014 chip.

The beneficial effects of the utility model are: processed image by logical process chip, can export the view data of various specified format, alleviate the work load of PC end; All kinds of camera interface is provided, all kinds of camera on market can be adapted to; Adopt USB3.0 transmission, speed is faster, compare with USB2.0, transmission speed is about 8 times of USB2.0, as general photographing module testing apparatus, only can need specify camera interface, image output format, can stablize, output image information at high speed, be convenient to the process of later stage to image, practicality flexibly, convenient, efficiency is high, efficiently solves various IMAQ and process problem.

Accompanying drawing explanation

Fig. 1 is the hardware block diagram of a kind of high speed image acquisition and processing device based on USB3.0 of the utility model.

Embodiment

To illustrate below in conjunction with accompanying drawing and embodiment further illustrates the utility model.

Drawing reference numeral in Fig. 1 is: USB3.0 main control module 100; Logical process chip 200; Data buffer storage processing module 300; Camera interface 400; Controllable electric power 500; Controlled clock 600; USB3.0 interface 700; Pin-saving chip 800.

For solving the stable transmission of image high speed, the interface compatibility sex chromosome mosaicism of photographing module, and alleviate the work load of PC end, the utility model proposes a kind of high-speed image sampling device based on USB3.0, all kinds of photographing module interface on market can be mated, by the high speed image acquisition and processing device of this USB3.0, the image data format of specifying can be exported simultaneously.

To achieve these goals, as shown in Figure 1, design a kind of high speed image acquisition and processing device based on USB3.0, comprise the USB3.0 main control module 100 of responsible image data transmission, programmable logical process chip (FPGA) 200, data buffer storage processing module 300, camera interface 400, controllable electric power 500, controlled clock 600, USB3.0 interface 700 and pin-saving chip (E2PROM) 800, wherein, described USB3.0 main control module 100 respectively with described logical process chip 200, controllable electric power 500, controlled clock 600, USB3.0 interface 700, pin-saving chip 800 connects, described logical process chip respectively with described camera interface, data buffer storage processing module connects.

As shown in Figure 1, controllable electric power 500 is programmable power supply administration module, and controlled clock 600 is programmable clock administration module.

As shown in Figure 1, described data buffer storage processing module 300 is preferably DDR chip.

As shown in Figure 1, described controllable electric power 500 preferably has 4 channel power source managing chip AD5316 of I2C communication interface.

As shown in Figure 1, described USB3.0 main control module 100 is preferably Sai Pulasi CYUSB3014 chip.

As shown in Figure 1, programmable logical process chip (FPGA) 200 is responsible for receiving and is processed the view data of photographing module generation, be responsible for decoding to Various types of data interface and holding control signal to carry out format conversion to data according to PC simultaneously, as: RAWDATA turns RGB24, and YUV turns RGB24.

As shown in Figure 1, data buffer storage processing module 300 adopts DDR chip, is responsible for the image information storing the output of camera module.

As shown in Figure 1, programmable power supply administration module (controllable electric power 500) adopts the 4 channel power source managing chip AD5316 with I2C communication interface, analog power can export 3.3V/2.8V/2.5V, digital power can export 2.8V/2.5V/1.8V, core power can export 1.8V/1.5V/1.2V, be responsible for each road power supply be supplied to needed for all kinds of photographing module, comprise analog power, digital power, core power etc., power intelligent control can be carried out according to the configuration information of PC end.

As shown in Figure 1, programmable clock administration module (controlled clock 600) adopts the 6 channel clock managing chip CY22150 with I2C communication interface, 6-48M clock frequency can be exported, be responsible for being supplied to the specific frequency clock of all kinds of photographing module, clock frequency can carry out intelligentized control method according to the configuration information of PC end.

As shown in Figure 1, USB3.0 main control module 100 adopts Sai Pulasi CYUSB3014 chip, support standard I 2C interface, can communicate with peripheral hardware I2C device, above-mentioned controllable electric power 500 and controlled clock 600 can be controlled, initial configuration can be carried out by this I2C interface to photographing module simultaneously, be responsible for receiving the view data transmitted by programmable logical process chip (FPGA) 200, be responsible for sending the data to PC end simultaneously, and need control the controllable electric power 500 of the high speed image acquisition and processing device of USB3.0 and controlled clock 600, it is made to produce specific power supply and clock frequency, initial configuration can be carried out to photographing module simultaneously, it is made to export image information data endlessly, wherein, I2C interface support mode comprises: 8 bit address/8 bit data, 16 bit address/8 bit data, 16 bit address/16 bit data, other different types of I2C interface modes can be customized.

As shown in Figure 1, pin-saving chip (E2PROM) 800 is for storing the firmware information of the normal work of USB3.0 main control module 100.

As shown in Figure 1, camera interface 400 primary responsibility mates all kinds of photographing module interface, comprise 8bit/10bit/12bit parallel port, MIPI1lane 2lane 4lane, SPI serial port.

The operation principle of a kind of high speed image acquisition and processing device based on USB3.0 that the utility model provides is: described programmable logical process chip (FPGA) 200 is responsible for receiving and processes the view data of photographing module generation, is responsible for decoding to Various types of data interface and holding control signal to carry out format conversion to data according to PC simultaneously, described data buffer storage process chip DDR is responsible for the image information storing the output of camera module, described controllable electric power 500 is responsible for each road power supply be supplied to needed for all kinds of photographing module, comprises analog power, digital power, core power etc., can carry out power intelligent control according to the configuration information of PC end, described controlled clock 600 is responsible for being supplied to the specific frequency clock of all kinds of photographing module, and clock frequency can carry out intelligentized control method according to the configuration information of PC end, described USB3.0 main control module 100 is responsible for receiving the view data transmitted by logical process chip (FPGA) 200, be responsible for sending the data to PC end simultaneously, and need control the controllable electric power 500 of the high speed image acquisition and processing device of USB3.0 and controlled clock 600, it is made to produce specific power supply and clock frequency, initial configuration can be carried out to photographing module simultaneously, it is made to export image information data endlessly, the firmware information that described pin-saving chip (E2PROM) 800 normally works for storing USB3.0 main control module 100, after the high speed image acquisition and processing device of this USB3.0 powers on, USB3.0 main control module 100 loads the firmware information of normal work from pin-saving chip (E2PROM) 800, be clipped to USB3.0 main control module 100 after this device and obtain correct power supply and clock configuration when PC rectifies general knowledge from PC end, by the standard I 2C interface of self, Initialize installation is carried out to photographing module afterwards, after the normal output image information data of photographing module, logical process chip (FPGA) 200 is according to the interface message mark of PC and data processing call format, to the decoding data of photographing module, data format is changed accordingly simultaneously, after converting, data are stored to data buffer storage processing module 300, then the data of buffer memory are sent to USB3.0 main control module 100 by the GPIF interface of USB3.0 main control module 100 by logical process chip (FPGA) 200, USB3.0 main control module 100 is packed to view data according to picture synchronization signal, PC is sent to hold a complete auxiliary image data.

A kind of high speed image acquisition and processing device based on USB3.0 that the utility model provides, compare with existing technology, processed by logical process chip (FPGA) 200 pairs of images, the view data of various specified format can be exported, alleviate the work load of PC end; All kinds of camera interface module is provided, all kinds of camera on market can be adapted to; Adopt USB3.0 transmission, speed is faster, and compare with USB2.0, transmission speed is about 8 times of USB2.0.Use this utility model, can as general photographing module testing apparatus, only need specify camera interface, image output format, can stablize, output image information at high speed, be convenient to the process of later stage to image.Practicality flexibly, convenient, efficiency is high, efficiently solves various IMAQ and process problem.

Above content is in conjunction with concrete preferred implementation further detailed description of the utility model, can not assert that concrete enforcement of the present utility model is confined to these explanations.For the utility model person of an ordinary skill in the technical field, without departing from the concept of the premise utility, some simple deduction or replace can also be made, all should be considered as belonging to protection range of the present utility model.

Claims

1. the high speed image acquisition and processing device based on USB3.0, it is characterized in that: comprise the USB3.0 main control module of responsible image data transmission, programmable logical process chip, data buffer storage processing module, camera interface, controllable electric power, controlled clock, USB3.0 interface and pin-saving chip, wherein, described USB3.0 main control module is connected with described logical process chip, controllable electric power, controlled clock, USB3.0 interface, pin-saving chip respectively, and described logical process chip is connected with described camera interface, data buffer storage processing module respectively.

2. the high speed image acquisition and processing device based on USB3.0 according to claim 1, is characterized in that: described data buffer storage processing module is DDR chip.

3. the high speed image acquisition and processing device based on USB3.0 according to claim 1, is characterized in that: described controllable electric power is the 4 channel power source managing chip AD5316 with I2C communication interface.

4. the high speed image acquisition and processing device based on USB3.0 according to claim 1, is characterized in that: described USB3.0 main control module is Sai Pulasi CYUSB3014 chip.