CN205005157U - Many screen concatenation control display system - Google Patents
Many screen concatenation control display system Download PDFInfo
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- CN205005157U CN205005157U CN201520595725.XU CN201520595725U CN205005157U CN 205005157 U CN205005157 U CN 205005157U CN 201520595725 U CN201520595725 U CN 201520595725U CN 205005157 U CN205005157 U CN 205005157U
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Abstract
The utility model provides a many screen concatenation control display system and method, including a plurality of signal source processing devices, network switch, a plurality of demonstration output processing devices and display unit, signal source processing device is connected to network switch, network switch is connected to and shows the output processing device, show that the output processing device is connected to display unit, the headend equipment receive images signal is followed to signal source processing device, send to network switch through preliminary treatment and code, network switch gives the signal transmission and shows the output processing device, demonstration output processing device decode handles to erupt simultaneously and delivers to display unit, realize shielding tiled display more. The utility model discloses shorten the time of decoding and showing from encoding to, improved the network utilization of system, increased the stability of system.
Description
Technical field
The utility model relates to mosaic screen Video processing and the transmission control field of field of video monitoring, is more particularly a kind of control system improving the display of network mosaic screen audio video synchronization.
Background technology
Current large screen splicing display controller is mainly divided into centralized and distributed two large types, and wherein distributed splicer is compared to centralized splicer and has the advantages such as networking flexibility, image data network, high stability and high-reliability.Meanwhile, distributed splicer can be divided into again the composition of pure hardware, embedded type CPU and PC framework three types according to principle.Original image, at acquisition node end, is resolved into network packet by pure hardware configuration, and at output node, by network packet compound display image, its advantage is low delay, but low-power consumption network occupancy is high.Image compression is become H.264 code stream at acquisition node by embedded type CPU structure, and H.264 will convert video frequency output to by code stream at output node, its advantage is that network occupancy is low, but time delay is high, and power is general.For PC framework, input node machine gathers image by inserting capture card, and then each output node machine is as display, and its time delay is general, and compression ratio is high, but power consumption is high.
Utility model content
The technical problem that first the utility model will solve is to provide a kind of multi-screen splicing and controls display system, is remaining the advantage of distributed splicer, is reducing time delay and power consumption, improve compression ratio.
The utility model solves the problems of the technologies described above adopted technical scheme: a kind of multi-screen splicing controls display system, comprise multiple processing of signal sources device, the network switch, multiple display translation processing unit and display unit, described multiple processing of signal sources device is connected to the network switch respectively, the described network switch is connected to multiple display translation processing unit, described multiple display translation processing unit is connected to described display unit, described multiple processing of signal sources device and described multiple display translation processing unit one_to_one corresponding, described multiple processing of signal sources device receives picture signal from headend equipment, the network switch is sent to through preliminary treatment and coding, the signal transmission that processing of signal sources device sends by the described network switch is to described multiple display translation processing unit, described multiple display translation processing unit carries out decoding to signal and processes and be sent to display unit, realize multi-screen splicing display.
While employing technique scheme, the utility model can also adopt or combine and adopt following further technical scheme:
Described processing of signal sources device comprises FPGA encoder, arm processor and network monitor, the input of described FPGA encoder connects headend equipment, the output of described FPGA connects described arm processor, the output of described arm processor is connected to the described network switch, the output of the described network switch is connected to described network monitor, and the output of described network monitor is connected to described FPGA encoder.
Described display translation processing unit comprises arm processor, FPGA decoder, network monitor and display module, the input of described arm processor is connected to the described network switch, the output of described arm processor is connected to described FPGA decoder and described network monitor respectively, the output of described network monitor is connected to the described network switch, and the output of described FPGA decoder is connected to described display module.
Described control display system also comprises control device, and described control device is connected to described processing of signal sources device, the network switch and display translation processing unit respectively, and described control device controls the break-make of the input and output side of above-mentioned parts.
The beneficial effects of the utility model are: the utility model is for the pluses and minuses of three kinds of frameworks of above distributed splicer, remain its advantage, in compression ratio, balance has been made in time delay and power consumption aspect, in order to reach the object of low delay and low-power consumption, the utility model employing FPGA carrys out the encoding and decoding work in completion system.Simultaneously utilizing FPGA to realize in the process of encoding and decoding, utilizing the slice concept being similar to and defining in H.264 agreement, original image is split, accelerates FPGA parallel computation process with this.In order to reach the stability improving network, reducing the congested object of network, utilizing ARM end to realize network and send out stream and receive stream work, monitoring according to network state meanwhile, according to feedack, adjust coding parameter in real time, to ensure picture quality.
Compared with prior art, the utility model utilizes the high-speed parallel feature of hardware FPGA to achieve the encoding and decoding of image, thus the time shortened from being encoded to decoding display, and utilize ARM to hold to carry out code stream packing unpack and the work of network status monitoring, improve the network utilization of system, add the stability of system.Three kinds of distributed splicer frameworks of current main flow of comparing, this practicality combines the advantage of pure hardware and embedded type CPU, overcomes both shortcomings simultaneously.
Accompanying drawing explanation
Fig. 1 is system construction drawing of the present utility model.
Fig. 2 is the structure chart of signal source input processing device of the present utility model.
Fig. 3 is the structure chart of display translation processing unit of the present utility model.
Embodiment
With reference to accompanying drawing 1-3.
Multi-screen splicing of the present utility model controls display system, comprise multiple processing of signal sources device 1, the network switch 2, multiple display translation processing unit 3 and display unit 4, multiple processing of signal sources device 1 is connected to the network switch 2 respectively, the network switch 2 is connected to multiple display translation processing unit 3, multiple display translation processing unit 3 is connected to display unit 4, multiple processing of signal sources device 1 and multiple display translation processing unit 3 one_to_one corresponding, multiple processing of signal sources device 1 receives picture signal from headend equipment, the network switch 2 is sent to through preliminary treatment and coding, the signal transmission that processing of signal sources device 1 sends by the network switch 2 is to multiple display translation processing unit 3, multiple display translation processing unit 3 pairs of signals carry out decoding and process and be sent to display unit 4, realize multi-screen splicing display.
Processing of signal sources device 1 comprises FPGA encoder 11, arm processor 12 and network monitor 13, the input of FPGA encoder 11 connects headend equipment, the output of FPGA encoder 11 connects arm processor 12, the output of arm processor 12 is connected to the network switch 2, the output of the network switch 2 is connected to network monitor 13, and the output of network monitor 13 is connected to FPGA encoder 11.
Display translation processing unit 3 comprises arm processor 31, FPGA decoder 32, network monitor 33 and display module 34, the input of arm processor 31 is connected to the described network switch 2, the output of arm processor 31 is connected to FPGA decoder 32 and network monitor 33 respectively, the output that the output of network monitor 33 is connected to the network switch 3, FPGA decoder 32 is connected to display module 34.
Control display system and also comprise control device 5, control device 5 is connected to described processing of signal sources device 1, the network switch 2 and display translation processing unit 3 respectively, and control device 5 controls the break-make of the input and output side of above-mentioned parts.
Concrete control procedure of the present utility model is as follows:
1) processing of signal sources device receives picture signal and carries out preliminary treatment, coding, and produces the packet that network can send;
1.1 picture signals are by headend equipment input signal source processing unit, and processing of signal sources device as required, carries out A/D conversion;
1.2 data changed through step 1.1, according to slice partition strategy, enter FPGA coding module, and produce corresponding H.264 encoding stream; H.264 the picture segmentation of slice structure is supported.A slice is made up of the some macro blocks in a frame picture.The size of a macro block is generally 16x16.Slice only can comprise a macro block also can comprise all macro blocks in this frame.In the utility model, according to network state feedback, the size of adaptive adjustment slice, the radix length of slice is a macro-block line.Network state has been deteriorated, and will reduce the length of slice, if network state is good, then the length of slice is increased.The type of slice and the type matching of frame, be generally I-slice or P-slice, meanwhile, when slice length is too small time, will switch to I-slice.
The encoding stream that 1.3 steps 1.2 produce, by the network switch, the display translation processing node to correspondence sends;
1.4 network state feedback modules, after 1.3 steps, open listen mode, the reception information reporting that detecting display translation processing node returns, and with the cataloged procedure of this information function in step 1.2.
2) data packet delivery that sent by processing of signal sources device of the network switch is to display translation processing unit;
3) display translation processing unit carries out image decoding and is sent to display unit;
After 3.1 display translation processing unit receive the order of control device transmission, open the pattern of monitored data stream;
3.2 after display translation processing unit receives the networking code stream that the network switch sends, and stream is received in arm processor packing, and network monitor starts simultaneously, and the information required for network state being added up passes to the network state feedback module of the network switch;
The packing of 3.3ARM processor is received flow module and compressed bit stream is sent to FPGA decoding device, produces corresponding slice data;
Slice data are sent to display module by 3.4FPGA decoding device;
3.5 display modules, after collecting all slice data in a frame image data, send it to display unit and carry out amplification display;
The network-feedback module of 3.6 network switchs, in a certain time interval, feeds back to corresponding signal source input processing device by network state.
4) display unit shows.
In step 1-4, the signal break-make of control device to the input/output terminal of processing of signal sources device, the network switch and display translation processing unit controls.
Claims (4)
1. a multi-screen splicing controls display system, it is characterized in that: described control display system comprises multiple processing of signal sources device, the network switch, multiple display translation processing unit and display unit, described multiple processing of signal sources device is connected to the network switch respectively, the described network switch is connected to multiple display translation processing unit, described multiple display translation processing unit is connected to described display unit, described multiple processing of signal sources device and described multiple display translation processing unit one_to_one corresponding, described multiple processing of signal sources device receives picture signal from headend equipment, the network switch is sent to through preliminary treatment and coding, the signal transmission that processing of signal sources device sends by the described network switch is to described multiple display translation processing unit, described multiple display translation processing unit carries out decoding to signal and processes and be sent to display unit, realize multi-screen splicing display.
2. a kind of multi-screen splicing as claimed in claim 1 controls display system, its feature is being: described processing of signal sources device comprises FPGA encoder, arm processor and network monitor, the input of described FPGA encoder connects headend equipment, the output of described FPGA connects described arm processor, the output of described arm processor is connected to the described network switch, the output of the described network switch is connected to described network monitor, and the output of described network monitor is connected to described FPGA encoder.
3. a kind of multi-screen splicing as claimed in claim 1 controls display system, its feature is being: described display translation processing unit comprises arm processor, FPGA decoder, network monitor and display module, the input of described arm processor is connected to the described network switch, the output of described arm processor is connected to described FPGA decoder and described network monitor respectively, the output of described network monitor is connected to the described network switch, and the output of described FPGA decoder is connected to described display module.
4. a kind of multi-screen splicing as claimed in claim 1 controls display system, its feature is being: described control display system also comprises control device, described control device is connected to described processing of signal sources device, the network switch and display translation processing unit respectively, and described control device controls the break-make of the input and output side of above-mentioned parts.
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| CN201520595725.XU CN205005157U (en) | 2015-08-10 | 2015-08-10 | Many screen concatenation control display system |
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| CN201520595725.XU CN205005157U (en) | 2015-08-10 | 2015-08-10 | Many screen concatenation control display system |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105072360A (en) * | 2015-08-10 | 2015-11-18 | 杭州中威电子股份有限公司 | Multi-screen splicing control and display system and multi-screen splicing control and display method |
| CN107370924A (en) * | 2017-07-18 | 2017-11-21 | 西安电子科技大学 | Image capturing system |
| CN110083137A (en) * | 2019-05-20 | 2019-08-02 | 蚌埠凯盛工程技术有限公司 | Glass factory's multi signal large screen complex control system and its control method |
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2015
- 2015-08-10 CN CN201520595725.XU patent/CN205005157U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105072360A (en) * | 2015-08-10 | 2015-11-18 | 杭州中威电子股份有限公司 | Multi-screen splicing control and display system and multi-screen splicing control and display method |
| CN105072360B (en) * | 2015-08-10 | 2018-05-11 | 杭州中威电子股份有限公司 | A kind of multi-screen splicing control display system and method |
| CN107370924A (en) * | 2017-07-18 | 2017-11-21 | 西安电子科技大学 | Image capturing system |
| CN107370924B (en) * | 2017-07-18 | 2020-06-19 | 西安电子科技大学 | Image acquisition system |
| CN110083137A (en) * | 2019-05-20 | 2019-08-02 | 蚌埠凯盛工程技术有限公司 | Glass factory's multi signal large screen complex control system and its control method |
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