CN205005028U - High performance low -power consumption digital filtering module - Google Patents

Abstract

The utility model discloses a high performance low -power consumption digital filtering module, provide unique tuple, outside liquid crystal display, treater and register including DSP operation chip, programmable controller, quick -witted case, data, the inside top at quick -witted case is all installed to DSP operation chip, register and treater, DSP operation chip and register electric connection, register and treater electric connection, data provide the unique tuple and install the inside left end at quick -witted case, data provide unique tuple and register electric connection, programmable controller installs the bottom at quick -witted case, programmable controller and register electric connection, outside liquid crystal display installs the right side at quick -witted case, outside liquid crystal display and treater electric connection. The utility model has the advantages of being scientific and reasonable in structure, the setting up of temporary register makes the treater to handle or the signal of discernment could convey data and provides the unique tuple for its work efficiency.

Description

A kind of high-performance low-power-consumption digital filtering module

Technical field

The utility model belongs to digital filtering technique field, is specifically related to a kind of high-performance low-power-consumption digital filtering module.

Background technology

In the world today, Digital Signal Processing is just in develop rapidly, and it not only has a subject of one's own, affect in different forms especially and penetrate into Other subjects, it and national economy are closely bound up, are affecting always or are changing our life, therefore receiving the concern that people are general.

In signal processing, handled signal is often with noise, and removing from the signal received or weakening noise is major issue in Signal transmissions and signal transacting.The characteristic different with noise according to useful signal, the process extracting useful signal is called filtering, and the system realizing filter function is filter, and what be wherein most widely used is digital filter.

In general, digital filter can be realized by software program, and this method service behaviour is not good, and its speed realizing filtering is too slow, is used for teaching and uses, be unfavorable for generally utilizing; More generally realized by single-chip microcomputer, utilize its hardware environment to coordinate signal processing software to realize the object of filtering, but operation is loaded down with trivial details especially, and the load of single-chip microcomputer and the loss of lost work can be caused, be unfavorable for sustainable development.

Utility model content

The purpose of this utility model is to provide a kind of high-performance low-power-consumption digital filtering module, to solve the problem proposed in above-mentioned background technology.

For achieving the above object, the utility model provides following technical scheme: a kind of high-performance low-power-consumption digital filtering module, comprise DSP compute chip, Programmable Logic Controller, cabinet, data providing unit group, outer liquid crystal display screen, processor and register, described DSP compute chip, register and processor are installed in the inner tip of cabinet, described DSP compute chip and register are electrically connected, described register and processor are electrically connected, described data providing unit group is arranged on the inside left end of cabinet, described data providing unit group and register are electrically connected, described Programmable Logic Controller is arranged on the bottom of cabinet, described Programmable Logic Controller and register are electrically connected, described outer liquid crystal display screen is arranged on the right side of cabinet, described outer liquid crystal display screen and processor are electrically connected.

Preferably, described DSP compute chip is built-in with multiplier, receiver and accumulator, and described multiplier and accumulator are all electrically connected with data providing unit group.

Preferably, described data providing unit group is made up of first module group, second unit group, the 3rd unit group and the 4th unit group, and mutually isolated between the structure of four data cell groups.

Preferably, described register is made up of temporary register and save register, and the DMA output of described temporary register and processor is electrically connected, and the DMA input of described save register and processor is electrically connected.

Compared with prior art, the beneficial effects of the utility model are: this high-performance low-power-consumption digital filtering module is scientific and reasonable for structure, safe and convenient to use, temporary register be arranged so that the signal that processor cannot process or identify just can be sent to data providing unit group, accelerate its operating efficiency, and data providing unit component is four mutually isolated data sheet tuples, separate work, conveying data carry out computing, improve the precise degrees of filtering, the multiplier adopting DSP compute chip built-in and accumulator, use and avoid loaded down with trivial details commissioning device and the loss of lost work more easily simultaneously, both improve the consumption that its service behaviour again reduces its energy, be conducive to sustainable development.

Accompanying drawing explanation

Fig. 1 is the utility model structural representation;

Fig. 2 is DSP compute chip structural representation of the present utility model;

Fig. 3 is data providing unit group structural representation of the present utility model;

Fig. 4 is register architecture schematic diagram of the present utility model;

Fig. 5 is fundamental diagram of the present utility model.

In figure: 1, DSP compute chip, 11, multiplier, 12, receiver, 13, accumulator, 2, Programmable Logic Controller, 3, cabinet, 4, data providing unit group, 41, first module group, 42, second unit group, 43, the 3rd unit group, the 44, the 4th unit group, 5, outer liquid crystal display screen, 6, processor, 7, register, 71, temporary register, 72, save register.

Embodiment

Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.

Refer to Fig. 1-5, the utility model provides a kind of technical scheme: a kind of high-performance low-power-consumption digital filtering module, comprise DSP compute chip 1, Programmable Logic Controller 2, cabinet 3, data providing unit group 4, outer liquid crystal display screen 5, processor 6 and register 7, DSP compute chip 1, register 7 and processor 6 are installed in the inner tip of cabinet 3, register 7 is made up of temporary register 71 and save register 72, temporary register 71 is electrically connected with the DMA output of processor 6, save register 72 is electrically connected with the DMA input of processor 6, DSP compute chip 1 and register 7 are electrically connected, DSP compute chip 1 is built-in with multiplier 11, receiver 12 and accumulator 13, multiplier 11 and accumulator 13 are all electrically connected with data providing unit group 4, register 7 and processor 6 are electrically connected, data providing unit group 4 is arranged on the inside left end of cabinet 3, data providing unit group 4 and register 7 are electrically connected, data providing unit group 4 is by first module group 41, second unit group 42, 3rd unit group 43 and the 4th unit group 44 form, and it is mutually isolated between the structure of four data cell groups, Programmable Logic Controller 2 is arranged on the bottom of cabinet 3, Programmable Logic Controller 2 and register 7 are electrically connected, outer liquid crystal display screen 5 is arranged on the right side of cabinet 3, outer liquid crystal display screen 5 and processor 6 are electrically connected.

Operation principle: during use, switch on power, required compiling signal passes through from processor 6, translate into identifiable design waveform, shown intuitively by outer liquid crystal display screen 5, when running into the signal that processor 6 cannot process automatically, by temporary register 71, be transported in corresponding data providing unit group 4, send into afterwards in the multiplier 11 of DSP compute chip 1 or accumulator 13 and carry out data operation, carry out the removing work of interference and noise etc., detailed filtering requirements is regulated and controled by Programmable Logic Controller 2, discernible signal after last computing enters in save register 72, be delivered in processor 6, processor 6 is started working and is translated into identifiable design waveform signal and be presented in outer liquid crystal display screen 5 intuitively, complete filtering.

Although illustrate and described embodiment of the present utility model, for the ordinary skill in the art, be appreciated that and can carry out multiple change, amendment, replacement and modification to these embodiments when not departing from principle of the present utility model and spirit, scope of the present utility model is by claims and equivalents thereof.

Claims (4)

1. a high-performance low-power-consumption digital filtering module, comprise DSP compute chip (1), Programmable Logic Controller (2), cabinet (3), data providing unit group (4), outer liquid crystal display screen (5), processor (6) and register (7), it is characterized in that: described DSP compute chip (1), register (7) and processor (6) are installed in the inner tip of cabinet (3), described DSP compute chip (1) and register (7) are electrically connected, described register (7) and processor (6) are electrically connected, described data providing unit group (4) is arranged on the inside left end of cabinet (3), described data providing unit group (4) and register (7) are electrically connected, described Programmable Logic Controller (2) is arranged on the bottom of cabinet (3), described Programmable Logic Controller (2) and register (7) are electrically connected, described outer liquid crystal display screen (5) is arranged on the right side of cabinet (3), described outer liquid crystal display screen (5) and processor (6) are electrically connected.

2. high-performance low-power-consumption digital filtering module according to claim 1, it is characterized in that: described DSP compute chip (1) is built-in with multiplier (11), receiver (12) and accumulator (13), described multiplier (11) and accumulator (13) are all electrically connected with data providing unit group (4).

3. high-performance low-power-consumption digital filtering module according to claim 1, it is characterized in that: described data providing unit group (4) is made up of first module group (41), second unit group (42), the 3rd unit group (43) and the 4th unit group (44), and mutually isolated between the structure of four data cell groups.

4. high-performance low-power-consumption digital filtering module according to claim 1, it is characterized in that: described register (7) is made up of temporary register (71) and save register (72), described temporary register (71) is electrically connected with the DMA output of processor (6), and described save register (72) is electrically connected with the DMA input of processor (6).