CN205003656U - Operating system of transparent programming of restructural hardware - Google Patents
Operating system of transparent programming of restructural hardware Download PDFInfo
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- CN205003656U CN205003656U CN201520681730.2U CN201520681730U CN205003656U CN 205003656 U CN205003656 U CN 205003656U CN 201520681730 U CN201520681730 U CN 201520681730U CN 205003656 U CN205003656 U CN 205003656U
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Abstract
The utility model discloses an operating system of transparent programming of restructural hardware, including microprocessing unit, and in the restructural resource of being connected through interconnection bus electricity with microprocessing unit, configuration control ware, restructural administrative unit, piece RAM, bus controller and RAM interface, reach with the electric hardware function configuration file storehouse of being connected of configuration control ware, reach and RAM interface connection's DRAM, the restructural resource comprises a plurality of hardware function modules and standard interfaces. The utility model discloses an operating system of transparent programming of restructural hardware, the hardware accelerator is with the form encapsulation of hardware function to form the hardware function library, operating system makes programming person use the hardware function like useeing ordinary library function through definition system call function and corresponding interface, implementation system to the support of hardware function call, in addition, operating system takes notes and manages the use of the resource of can reshuffling, improves hardware resource utilization ratio and entire system's performance.
Description
Technical field
The utility model relates to a kind of operating system, is specifically related to the operating system of the transparent programming of a kind of reconfigurable hardware, belongs to control with computational intelligence technical field.
Background technology
Along with the development of microelectric technique and computer technology, real not time circuit Reconfiguration Technologies (dynamic restructuring) becomes a new focus in computing system research in the world gradually, in its appearance traditional sense of making over, the boundary of hardware and software thickens, software is allowed to have the high-performance of hardware, the dirigibility of software that allowed again hardware possess.But dynamic restructuring computing system still also exists many problems in the application process of reality at present, such as in actual development, Application developer needs to go to understand hardware interface details, communicate between the configuration of hardware management accelerator and software and hardware, this is concerning very loaded down with trivial details developer, reduce development efficiency, also have the management of operating system shortage to restructural resource dynamic of traditional reconfigurable system, this is unfavorable for making full use of of restructural resource.In order to address these problems, if the operating system of the transparent programming of a kind of reconfigurable hardware, it encapsulates bottom hardware details by system call, allows program designer can developing application in a transparent manner.
Summary of the invention
(1) technical matters that will solve
For solving the problem, the utility model proposes the operating system of the transparent programming of a kind of reconfigurable hardware, improving the performance of hardware resource utilization and whole system.
(2) technical scheme
The operating system of the transparent programming of reconfigurable hardware of the present utility model, comprise microprocessing unit, and the restructural resource to be electrically connected by interconnect bus with microprocessing unit, Configuration Control Unit, restructural administrative unit, RAM, bus controller and RAM interface on sheet, and the hardware function configuration file storehouse to be electrically connected with Configuration Control Unit, and the DRAM be connected with RAM interface; Described restructural resource is made up of multiple hardware function module and standard interface.
Further, described Configuration Control Unit is electrically connected with restructural resource and restructural administrative unit.
Further, described microprocessing unit comprises microprocessor and hardware accelerator.
(3) beneficial effect
Compared with prior art, the operating system of the transparent programming of reconfigurable hardware of the present utility model, hardware accelerator encapsulates with the form of hardware function, and form hardware function storehouse, operating system is by define system call function and corresponding interface, realizing the support that system is called hardware function, enabling program designer call hardware function as calling common library function; In addition, the use of operating system record and the reconfigurable resource of management, improves the performance of hardware resource utilization and whole system.
Accompanying drawing explanation
Fig. 1 is overall system structure schematic diagram of the present utility model.
Embodiment
The operating system of the transparent programming of a kind of reconfigurable hardware as shown in Figure 1, comprise microprocessing unit, and the restructural resource to be electrically connected by interconnect bus with microprocessing unit, Configuration Control Unit, restructural administrative unit, RAM, bus controller and RAM interface on sheet, and the hardware function configuration file storehouse to be electrically connected with Configuration Control Unit, and the DRAM be connected with RAM interface; Described restructural resource is made up of multiple hardware function module and standard interface.
Described Configuration Control Unit is electrically connected with restructural resource and restructural administrative unit.
Described microprocessing unit comprises microprocessor and hardware accelerator.
The principle of work of the operating system of the transparent programming of reconfigurable hardware of the present utility model: restructural resource is responsible for safeguarding dynamic reconfigurable resource state information, configuration byte stream file is read from hardware function storehouse, perform comprehensive and configuration order standard interface, due to dynamic creation and the release of hardware task, the service condition of reconfigurable resource is also in continuous change, explorer can follow the tracks of these changes, and operating system can be fed back in time, when needs operate restructural resource, operating system can be carried out command configuration controller according to the situation of rm-cell and operate accordingly restructural resource, configuration files database,, initial budget, module comprehensive in, modular design comprehensive through Top-layer Design Method realize and after a series of operation such as final compiling, generate the Downloadable FPGA configuration data file of whole circuit function, be stored in nonvolatile memory for system dynamic call, receive the configuration order of System Scheduler at Configuration Control Unit after, Configuration Control Unit reads out the configuration file of corresponding hardware accelerator and is configured to the position that restructural Resource Unit specifies from configuration files database.
Embodiment recited above is only be described preferred implementation of the present utility model, not limits design of the present utility model and scope.Under the prerequisite not departing from the utility model design concept; the various modification that this area ordinary person makes the technical solution of the utility model and improvement; protection domain of the present utility model all should be dropped into; the technology contents of the utility model request protection, all records in detail in the claims.
Claims (3)
1. the operating system of the transparent programming of reconfigurable hardware, it is characterized in that: comprise microprocessing unit, and the restructural resource to be electrically connected by interconnect bus with microprocessing unit, Configuration Control Unit, restructural administrative unit, RAM, bus controller and RAM interface on sheet, and the hardware function configuration file storehouse to be electrically connected with Configuration Control Unit, and the DRAM be connected with RAM interface; Described restructural resource is made up of multiple hardware function module and standard interface.
2. the operating system of the transparent programming of reconfigurable hardware according to claim 1, is characterized in that: described Configuration Control Unit is electrically connected with restructural resource and restructural administrative unit.
3. the operating system of the transparent programming of reconfigurable hardware according to claim 1, is characterized in that: described microprocessing unit comprises microprocessor and hardware accelerator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520681730.2U CN205003656U (en) | 2015-09-06 | 2015-09-06 | Operating system of transparent programming of restructural hardware |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520681730.2U CN205003656U (en) | 2015-09-06 | 2015-09-06 | Operating system of transparent programming of restructural hardware |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205003656U true CN205003656U (en) | 2016-01-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520681730.2U Expired - Fee Related CN205003656U (en) | 2015-09-06 | 2015-09-06 | Operating system of transparent programming of restructural hardware |
Country Status (1)
| Country | Link |
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| CN (1) | CN205003656U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018232746A1 (en) * | 2017-06-23 | 2018-12-27 | 上海诺基亚贝尔股份有限公司 | Method and apparatus for resource management in edge cloud |
| CN111209037A (en) * | 2018-11-22 | 2020-05-29 | 深圳市中兴微电子技术有限公司 | RISC processor architecture and its realizing method |
| CN112506852A (en) * | 2020-12-02 | 2021-03-16 | 北京时代民芯科技有限公司 | System-in-package-based dynamic reconfigurable intelligent microsystem |
-
2015
- 2015-09-06 CN CN201520681730.2U patent/CN205003656U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018232746A1 (en) * | 2017-06-23 | 2018-12-27 | 上海诺基亚贝尔股份有限公司 | Method and apparatus for resource management in edge cloud |
| US11645090B2 (en) | 2017-06-23 | 2023-05-09 | Nokia Solutions And Networks Oy | Method and apparatus for resource management in edge cloud |
| CN111209037A (en) * | 2018-11-22 | 2020-05-29 | 深圳市中兴微电子技术有限公司 | RISC processor architecture and its realizing method |
| CN112506852A (en) * | 2020-12-02 | 2021-03-16 | 北京时代民芯科技有限公司 | System-in-package-based dynamic reconfigurable intelligent microsystem |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160127 Termination date: 20160906 |