CN205003519U - Control circuit based on zigbee wireless Intelligence lock - Google Patents
Control circuit based on zigbee wireless Intelligence lock Download PDFInfo
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- CN205003519U CN205003519U CN201520720655.6U CN201520720655U CN205003519U CN 205003519 U CN205003519 U CN 205003519U CN 201520720655 U CN201520720655 U CN 201520720655U CN 205003519 U CN205003519 U CN 205003519U
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Abstract
The utility model discloses a control circuit based on zigbee wireless Intelligence lock, including the MCU module integration transmission circuit, with MCU module integration transmission circuit connection's MCU integrated circuit, read card and send and detect integrated circuit, radio frequency integrated circuit, lock drive control and electric quantity detection integrated circuit, the detection of lock state and switch integrated circuit, module integration 0 integrated circuit, memory integrated circuit, power integrated circuit and zigbee module integration circuit. The utility model discloses a zigbee technique makes the master control electron device of lock realize two -way wireless communication function closely to open and close the lock, just the utility model discloses a low -power consumption design makes this product cost reduce, and the function is stable, reliable.
Description
Technical field
The utility model relates to control circuit field, is specifically related to a kind of control circuit based on Zigbee intelligent wireless door lock.
Background technology
In the epoch of modern high technology high speed development, the utilization of various wireless technology reaches unprecedented high-end.ZigBee technology is a kind of emerging radio network technique, has the function of low-power consumption, low cost, MANET, highly reliable, high stability, certainly will by people's widespread use, the application particularly in Smart Home field.
Utility model content
The technical problems to be solved in the utility model is to provide a kind of control circuit based on Zigbee intelligent wireless door lock, and it adopts ZigBee technology, utilizes the opening and closing of typical bidirectional communication function realization to intelligent door lock of Zigbee.
The technical solution of the utility model is:
Based on the control circuit of Zigbee intelligent wireless door lock, include MCU module integrated transmission circuit, the MCU integrated circuit be connected with MCU module integrated transmission circuit, Card Reader send and detect integrated circuit, radio frequency integrated circuit, door lock drived control and electric power detection integrated circuit, lock status detects and switch integrated circuit, clock chip integrated circuit, memory integrated circuit, power IC and Zigbee module integrated circuit;
Described MCU module integrated transmission circuit includes single-chip microcomputer V4;
Described MCU integrated circuit includes JTAG emulator J8, crystal oscillator Y2, electric capacity C23, C24, C6, resistance R15 and switching diode D3; 2 pin of described JTAG emulator J8 connect VCC_33, and 9 pin connect ground, and 1,3,5 are connected 54,55,56 and 57 pin of single-chip microcomputer V4 respectively with 7 pin; The negative pole of described switching diode D3 and the upper end of resistance R15 are connected in parallel VCC_33, and the upper end of the D3 positive pole of switching diode and R15 lower end, electric capacity C6 is parallel-connected to 11 pin of JTAG emulator J8, the lower end ground connection of electric capacity C6; The left end of described electric capacity C23 and the left end earth of electric capacity C24, the right-hand member of electric capacity C23 and the upper end of crystal oscillator Y2 are parallel-connected to 8 pin of single-chip microcomputer V4, and the right-hand member of electric capacity C24 and crystal oscillator Y2 are parallel-connected to 9 pin of single-chip microcomputer V4;
Described Card Reader sends and detects integrated circuit and includes socket J9, field effect transistor Q1, electromagnetic induction coil L1, L2, electric capacity C13, C21, C14, C15 and C22, resistance R28, R27 and R30, switching diode D2, 1 pin of described socket J9 connects ANTA end, the 2 pin ground connection of socket J9, the grid of described field effect transistor Q1 connects the pin 43 of chip V6, the drain electrode of field effect transistor Q1 and the lower end of electromagnetic induction coil L1, the upper end of electric capacity C21 is connected in parallel to the left end of electric capacity C22, the right-hand member of electric capacity C22 is connected with the left end of electromagnetic induction coil L2, the source electrode of field effect transistor Q1 and the lower end earth of electric capacity C21, the upper end of electromagnetic induction coil L1 is in parallel with the left end of electric capacity C13 accesses VCC_33, the right-hand member ground connection of electric capacity C13, the right-hand member of electromagnetic induction coil L2, resistance R30 upper end, the positive pole of switching diode D2 is connected in parallel to ANTA end, the lower end ground connection of resistance R30, the negative pole of switching diode D2 and the lower end of resistance R27 are connected in parallel to the left end of electric capacity C15, the right-hand member ground connection of electric capacity C15, the left end of the upper end of resistance R27 and electric capacity C14 left end, resistance R28 is connected in parallel to 3 pin of single-chip microcomputer V4, the right-hand member of resistance R28 and the right-hand member earth of electric capacity C14,
Described radio frequency integrated circuit includes chip V6, electric capacity C5, C16, C17, C18, C19 and C20, crystal oscillator Y3, resistance R29 and diode D1, 38 pin of described chip V6, 4 pin, 5 pin and 6 pin are connected 28 pin of single-chip microcomputer V4 respectively, 29 pin, 30 pin and 31 pin, 1 pin of chip V6, 3 pin and 39 pin are all connected 16 pin of single-chip microcomputer V4,8 pin of chip V6, 21 pin, 23 pin, 41 pin, 46 pin ground connection, 7 pin of chip V6, 9 pin, 45 pin connect the right-hand member of the 2 pin connection electric capacity C5 of VCC_33, chip V6, the left end ground connection of electric capacity C5,10 pin of chip V6, 11 pin of chip V6 are by electric capacity C16, 12 pin of chip V6 are by electric capacity C17 parallel connection access GND end, and the positive pole of described diode D1 connects ANTA end, the negative pole of diode D1 and the upper end of resistance R29, the upper end of electric capacity C18 is connected in parallel to 13 pin of chip V6, the lower end of resistance R29 and the lower end of electric capacity C18 are connected in parallel GND and hold, the left end of crystal oscillator Y3 and the upper end of electric capacity C19 are connected in parallel to 18 pin of chip V6, the right-hand member of crystal oscillator Y3 and the upper end of electric capacity C20 are connected in parallel to 19 pin of chip V6, the lower end of electric capacity C19 and the lower end earth of electric capacity C20,
Described door lock drived control and electric power detection integrated circuit include PNP triode T7, T5 and T6, NPN triode T2, T3 and T4, resistance R12, R13, R18, R19, R21, R22, R23, R24, R25 and R26, described NPN triode T2, the equal ground connection of emitter of T3 and T4, the right-hand member of the base stage contact resistance R21 of NPN triode T2, the left end of the collector contact resistance R18 of NPN triode T2, the left end of resistance R21 connects 22 pin of single-chip microcomputer V4, the right-hand member of resistance R18 and the left end of resistance R12 are connected in parallel to the base stage of PNP triode T6, the right-hand member of resistance R12 and the emitter of PNP triode T6 are connected in parallel to VCC_IN, the collector of PNP triode T6 and the upper end of resistance R26, the left end of resistance R13 is connected in parallel, the right-hand member of resistance R13 and the left end of resistance R19 are connected in parallel to 2 pin of single-chip microcomputer V4, the right-hand member ground connection of resistance R19, the lower end of resistance R26 and the emitter of PNP triode T5, the emitter of PNP triode T7 is connected in parallel, the left end of resistance R23 and the collector of PNP triode T5, the collector of NPN triode T3 is connected in parallel to LOCKPOWER1 end, the right-hand member of resistance R23 connects the base stage of PNP triode T7, the right-hand member of resistance R22 connects the base stage of PNP triode T5, the left end of resistance R22 and the collector of PNP triode T7, the collector of NPN triode T4 is connected in parallel LOCKPOWER2 end, the right-hand member of described resistance R24 connects the base stage of NPN triode T3, the left end of resistance R24 connects 20 pin of single-chip microcomputer V4, the right-hand member of resistance R25 connects the base stage of NPN triode T4, the left end of resistance R25 connects 21 pin of single-chip microcomputer V4, the equal ground connection of emitter of NPN triode T3 and T4,
Described lock status detects and switch integrated circuit includes chip J1, electric capacity C2 and resistance R1, R2, R3, R4, R5 and R6; 1 pin of described chip J1 and the lower end of electric capacity C2 are parallel to LOCKPOWER1 and hold, 2 pin of chip J1 and the upper end of electric capacity C2 are parallel to LOCKPOWER2 and hold, 3 pin of chip J1 and 7 pin ground connection, 8 pin of chip J1 connect VCC_IN end, one end of the 4 pin contact resistance R6 of chip J1, one end of the 5 pin contact resistance R5 of chip J1, one end of the 6 pin contact resistance R4 of chip J1; The other end of described resistance R6 and one end of resistance R3 are parallel to 17 pin of single-chip microcomputer V4, the other end of resistance R5 and one end of resistance R2 are parallel to 18 pin of single-chip microcomputer V4, the other end of resistance R4 and one end of resistance R1 are parallel to 19 pin of single-chip microcomputer V4, and the other end of R1, R2, R3 of resistance is connected in parallel VCC33;
Described clock chip integrated circuit includes clock chip U1, electric capacity C9, C7, resistance R8, R9, and crystal oscillator Y1; 2 pin of described clock chip U1 are connected with the left end of crystal oscillator Y1,1 pin of clock chip U1 and the right-hand member of crystal oscillator Y1 are connected in parallel to the left end of electric capacity C7,8 pin of clock chip U1 and the upper end of electric capacity C9 are connected in parallel to VCC_33, the right-hand member earth of 4 pin of clock chip U1 and the lower end of electric capacity C9, electric capacity C7, the upper end of resistance R8 and the upper end of resistance R9 are connected in parallel to VCC_33, the lower end of resistance R8 and 5 pin of clock chip U1 are connected in parallel to 42 pin of single-chip microcomputer V4, and the lower end of resistance R9 and 6 pin of clock chip U1 are connected in parallel to 41 pin of single-chip microcomputer V4;
Described memory integrated circuit comprises storage chip V1, resistance R10 and R11; 1 pin of described storage chip V1,2 pin, 3 pin, 4 pin earths, 5 pin of storage chip V1 and the lower end of resistance R11 are connected in parallel to the pin 6 of single-chip microcomputer V4,6 pin of storage chip V1 and the lower end of resistance R10 are connected in parallel to the pin 5 of single-chip microcomputer V4, the 7 pin ground connection of storage chip V1, the upper end of 8 pin of storage chip V1 and the upper end of resistance R10, resistance R11 is connected in parallel to the pin 4 of single-chip microcomputer V4;
Described power IC includes chip V2, electric capacity C3, C12 and C8, polar capacitor C10 and C4; The output terminal 3 of the upper end of electric capacity C3, C12, the positive pole of polar capacitor C4 and chip V2 is parallel-connected to VCC_33, earth terminal 1 earth of the lower end of electric capacity C3, C12, C8, the negative pole of polar capacitor C4, C10 and chip V2, the upper end of electric capacity C8 and the positive pole of polar capacitor C10 is in parallel with the input end 2 of chip V2 accesses VCC_IN;
Described zigbee integrated circuit modules includes chip V5, pin 1 ground connection of chip V5, the vdd terminal of chip V5 meets VCC_33, the pin 32 of the P1.7 termination single-chip microcomputer V4 of chip V5, the pin 33 of the P1.6 termination single-chip microcomputer V4 of chip V5, the pin 58 of the RST termination single-chip microcomputer V4 of chip V5.
The described control circuit based on Zigbee intelligent wireless door lock also includes buzzer warning integrated circuit, include triode T1, resistance R16 and hummer BEEP1, the grounded emitter of described triode T1, the base stage of triode T1 connects the right-hand member of R16, the collector of triode T1 connects the lower end pin of hummer BEEP1,13 pin of the single-chip microcomputer V4 described in left end connection of resistance R16, the upper end pin of hummer BEEP1 connects VCC_33.
The described control circuit based on Zigbee intelligent wireless door lock also includes LED integrated circuit, include pilot lamp LED and resistance R17, the minus earth of pilot lamp LED, the right-hand member of the positive pole contact resistance R17 of pilot lamp LED, 14 pin of the single-chip microcomputer V4 described in left end connection of R17.
Advantage of the present utility model:
The utility model adopts ZigBee technology, makes the master control electronic installation of door lock realize in-plant bidirectional wireless communication function, thus opposite house is locked into row opens and closes, and the utility model adopts low power dissipation design, and this cost of products is reduced, function-stable, reliably.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the utility model MCU module integrated transmission circuit.
Fig. 2 is the circuit diagram of the utility model MCU integrated circuit.
Fig. 3 is the circuit diagram that the utility model Card Reader sent and detected integrated circuit.
Fig. 4 be the utility model radio frequency integrated circuit circuit diagram.
Fig. 5 is the circuit diagram of the utility model door lock drived control and electric power detection integrated circuit.
Fig. 6 is the circuit diagram of the detection of the utility model lock status and switch integrated circuit.
Fig. 7 is the circuit diagram of the utility model clock chip integrated circuit.
Fig. 8 is the circuit diagram of the utility model memory integrated circuit.
Fig. 9 is the circuit diagram of the utility model power IC.
The circuit diagram of Figure 10 the utility model Zigbee module integrated circuit.
Figure 11 is the circuit diagram of the utility model buzzer warning integrated circuit.
The circuit diagram of Figure 12 the utility model LED integrated circuit.
Embodiment
Based on the control circuit of Zigbee intelligent wireless door lock, include MCU module integrated transmission circuit, the MCU integrated circuit be connected with MCU module integrated transmission circuit, Card Reader send and detect integrated circuit, radio frequency integrated circuit, door lock drived control and electric power detection integrated circuit, lock status detects and switch integrated circuit, clock chip integrated circuit, memory integrated circuit, power IC, Zigbee module integrated circuit, buzzer warning integrated circuit and LED integrated circuit;
See Fig. 1, MCU module integrated transmission circuit includes single-chip microcomputer V4;
See Fig. 2, MCU integrated circuit includes JTAG emulator J8, crystal oscillator Y2, electric capacity C23, C24, C6, resistance R15 and switching diode D3; 2 pin of JTAG emulator J8 connect VCC_33, and 9 pin connect ground, and 1,3,5 are connected 54,55,56 and 57 pin of single-chip microcomputer V4 respectively with 7 pin; The negative pole of switching diode D3 and the upper end of resistance R15 are connected in parallel VCC_33, and the upper end of the D3 positive pole of switching diode and R15 lower end, electric capacity C6 is parallel-connected to 11 pin of JTAG emulator J8, the lower end ground connection of electric capacity C6; The left end of electric capacity C23 and the left end earth of electric capacity C24, the right-hand member of electric capacity C23 and the upper end of crystal oscillator Y2 are parallel-connected to 8 pin of single-chip microcomputer V4, and the right-hand member of electric capacity C24 and crystal oscillator Y2 are parallel-connected to 9 pin of single-chip microcomputer V4;
See Fig. 3, Card Reader sends and detects integrated circuit and includes socket J9, field effect transistor Q1, electromagnetic induction coil L1, L2, electric capacity C13, C21, C14, C15 and C22, resistance R28, R27 and R30, switching diode D2, 1 pin of socket J9 connects ANTA end, the 2 pin ground connection of socket J9, the grid of field effect transistor Q1 connects the pin 43 of chip V6, the drain electrode of field effect transistor Q1 and the lower end of electromagnetic induction coil L1, the upper end of electric capacity C21 is connected in parallel to the left end of electric capacity C22, the right-hand member of electric capacity C22 is connected with the left end of electromagnetic induction coil L2, the source electrode of field effect transistor Q1 and the lower end earth of electric capacity C21, the upper end of electromagnetic induction coil L1 is in parallel with the left end of electric capacity C13 accesses VCC_33, the right-hand member ground connection of electric capacity C13, the right-hand member of electromagnetic induction coil L2, resistance R30 upper end, the positive pole of switching diode D2 is connected in parallel to ANTA end, the lower end ground connection of resistance R30, the negative pole of switching diode D2 and the lower end of resistance R27 are connected in parallel to the left end of electric capacity C15, the right-hand member ground connection of electric capacity C15, the left end of the upper end of resistance R27 and electric capacity C14 left end, resistance R28 is connected in parallel to 3 pin of single-chip microcomputer V4, the right-hand member of resistance R28 and the right-hand member earth of electric capacity C14,
See Fig. 4, radio frequency integrated circuit includes chip V6, electric capacity C5, C16, C17, C18, C19 and C20, crystal oscillator Y3, resistance R29 and diode D1, 38 pin of chip V6, 4 pin, 5 pin and 6 pin are connected 28 pin of single-chip microcomputer V4 respectively, 29 pin, 30 pin and 31 pin, 1 pin of chip V6, 3 pin and 39 pin are all connected 16 pin of single-chip microcomputer V4, 8 pin of chip V6, 21 pin, 23 pin, 41 pin, 46 pin ground connection, 7 pin of chip V6, 9 pin, 45 pin connect VCC_33, 2 pin of chip V6 connect the right-hand member of electric capacity C5, the left end ground connection of electric capacity C5, 10 pin of chip V6, 11 pin of chip V6 are by electric capacity C16, 12 pin of chip V6 are by electric capacity C17 parallel connection access GND end, the positive pole of diode D1 connects ANTA end, the negative pole of diode D1 and the upper end of resistance R29, the upper end of electric capacity C18 is connected in parallel to 13 pin of chip V6, the lower end of resistance R29 and the lower end of electric capacity C18 are connected in parallel GND and hold, the left end of crystal oscillator Y3 and the upper end of electric capacity C19 are connected in parallel to 18 pin of chip V6, the right-hand member of crystal oscillator Y3 and the upper end of electric capacity C20 are connected in parallel to 19 pin of chip V6, the lower end of electric capacity C19 and the lower end earth of electric capacity C20,
See Fig. 5, door lock drived control and electric power detection integrated circuit include PNP triode T7, T5 and T6, NPN triode T2, T3 and T4, resistance R12, R13, R18, R19, R21, R22, R23, R24, R25 and R26, NPN triode T2, the equal ground connection of emitter of T3 and T4, the right-hand member of the base stage contact resistance R21 of NPN triode T2, the left end of the collector contact resistance R18 of NPN triode T2, the left end of resistance R21 connects 22 pin of single-chip microcomputer V4, the right-hand member of resistance R18 and the left end of resistance R12 are connected in parallel to the base stage of PNP triode T6, the right-hand member of resistance R12 and the emitter of PNP triode T6 are connected in parallel to VCC_IN, the collector of PNP triode T6 and the upper end of resistance R26, the left end of resistance R13 is connected in parallel, the right-hand member of resistance R13 and the left end of resistance R19 are connected in parallel to 2 pin of single-chip microcomputer V4, the right-hand member ground connection of resistance R19, the lower end of resistance R26 and the emitter of PNP triode T5, the emitter of PNP triode T7 is connected in parallel, the left end of resistance R23 and the collector of PNP triode T5, the collector of NPN triode T3 is connected in parallel to LOCKPOWER1 end, the right-hand member of resistance R23 connects the base stage of PNP triode T7, the right-hand member of resistance R22 connects the base stage of PNP triode T5, the left end of resistance R22 and the collector of PNP triode T7, the collector of NPN triode T4 is connected in parallel LOCKPOWER2 end, the right-hand member of resistance R24 connects the base stage of NPN triode T3, the left end of resistance R24 connects 20 pin of single-chip microcomputer V4, the right-hand member of resistance R25 connects the base stage of NPN triode T4, the left end of resistance R25 connects 21 pin of single-chip microcomputer V4, the equal ground connection of emitter of NPN triode T3 and T4,
See Fig. 6, lock status detects and switch integrated circuit includes chip J1, electric capacity C2 and resistance R1, R2, R3, R4, R5 and R6; 1 pin of chip J1 and the lower end of electric capacity C2 are parallel to LOCKPOWER1 and hold, 2 pin of chip J1 and the upper end of electric capacity C2 are parallel to LOCKPOWER2 and hold, 3 pin of chip J1 and 7 pin ground connection, 8 pin of chip J1 connect VCC_IN end, one end of the 4 pin contact resistance R6 of chip J1, one end of the 5 pin contact resistance R5 of chip J1, one end of the 6 pin contact resistance R4 of chip J1; The other end of resistance R6 and one end of resistance R3 are parallel to 17 pin of single-chip microcomputer V4, the other end of resistance R5 and one end of resistance R2 are parallel to 18 pin of single-chip microcomputer V4, the other end of resistance R4 and one end of resistance R1 are parallel to 19 pin of single-chip microcomputer V4, and the other end of R1, R2, R3 of resistance is connected in parallel VCC33;
See Fig. 7, clock chip integrated circuit includes clock chip U1, electric capacity C9, C7, resistance R8, R9, and crystal oscillator Y1; 2 pin of clock chip U1 are connected with the left end of crystal oscillator Y1,1 pin of clock chip U1 and the right-hand member of crystal oscillator Y1 are connected in parallel to the left end of electric capacity C7,8 pin of clock chip U1 and the upper end of electric capacity C9 are connected in parallel to VCC_33, the right-hand member earth of 4 pin of clock chip U1 and the lower end of electric capacity C9, electric capacity C7, the upper end of resistance R8 and the upper end of resistance R9 are connected in parallel to VCC_33, the lower end of resistance R8 and 5 pin of clock chip U1 are connected in parallel to 42 pin of single-chip microcomputer V4, and the lower end of resistance R9 and 6 pin of clock chip U1 are connected in parallel to 41 pin of single-chip microcomputer V4;
See Fig. 8, memory integrated circuit comprises storage chip V1, resistance R10 and R11; 1 pin of storage chip V1,2 pin, 3 pin, 4 pin earths, 5 pin of storage chip V1 and the lower end of resistance R11 are connected in parallel to the pin 6 of single-chip microcomputer V4,6 pin of storage chip V1 and the lower end of resistance R10 are connected in parallel to the pin 5 of single-chip microcomputer V4, the 7 pin ground connection of storage chip V1, the upper end of 8 pin of storage chip V1 and the upper end of resistance R10, resistance R11 is connected in parallel to the pin 4 of single-chip microcomputer V4;
See Fig. 9, power IC includes chip V2, electric capacity C3, C12 and C8, polar capacitor C10 and C4; The output terminal 3 of the upper end of electric capacity C3, C12, the positive pole of polar capacitor C4 and chip V2 is parallel-connected to VCC_33, earth terminal 1 earth of the lower end of electric capacity C3, C12, C8, the negative pole of polar capacitor C4, C10 and chip V2, the upper end of electric capacity C8 and the positive pole of polar capacitor C10 is in parallel with the input end 2 of chip V2 accesses VCC_IN;
See Figure 10, zigbee integrated circuit modules includes chip V5, pin 1 ground connection of chip V5, the vdd terminal of chip V5 meets VCC_33, the pin 32 of the P1.7 termination single-chip microcomputer V4 of chip V5, the pin 33 of the P1.6 termination single-chip microcomputer V4 of chip V5, the pin 58 of the RST termination single-chip microcomputer V4 of chip V5;
See Figure 11, buzzer warning integrated circuit, include triode T1, resistance R16 and hummer BEEP1, the grounded emitter of triode T1, the base stage of triode T1 connects the right-hand member of R16, the collector of triode T1 connects the lower end pin of hummer BEEP1, and the left end of resistance R16 connects 13 pin of single-chip microcomputer V4, and the upper end pin of hummer BEEP1 connects VCC_33.
See Figure 12, LED integrated circuit includes pilot lamp LED and resistance R17, the minus earth of pilot lamp LED, the right-hand member of the positive pole contact resistance R17 of pilot lamp LED, and the left end of R17 connects 14 pin of single-chip microcomputer V4.
Workflow of the present utility model:
After system electrification, power IC obtains stable voltage, by interlock circuit module initialization, when having card when the ANTA end of socket J9, single-chip microcomputer V4 detects that Card Reader sends and detect the voltage reduction of the bleeder circuit of integrated circuit, chip V6 reads the information in card, single-chip microcomputer V4 reads the information of chip V6 storage by spi bus, this completes the reading of card, while Card Reader, clock chip U1 obtains the current time, then card image and time is stored in storage chip V1.If card is white list, single-chip microcomputer V4 controls door lock drived control and electric power detection integrated circuit and lock status detects and switch integrated circuit completes door opening action, data are sent to corresponding zigbee main frame by zigbee integrated circuit modules by single-chip microcomputer V4 simultaneously, zigbee main frame sends to host computer by after Data Analysis, host computer process is also handed down to zigbee main frame, main frame receives Data Analysis and becomes corresponding form to issue corresponding door lock zigbee from machine, zigbee responds from machine data, zigbee issues single-chip microcomputer V4 by zigbee integrated circuit modules again after machine resolution data, single-chip microcomputer V4 controls door lock and opens or close, and there is LED, hummer is pointed out, MCU integrated circuit is download circuit, to download code in single-chip microcomputer V4 thus to complete various logic process.
Claims (3)
1. based on the control circuit of Zigbee intelligent wireless door lock, it is characterized in that: include MCU module integrated transmission circuit, the MCU integrated circuit be connected with MCU module integrated transmission circuit, Card Reader send and detect integrated circuit, radio frequency integrated circuit, door lock drived control and electric power detection integrated circuit, lock status detects and switch integrated circuit, clock chip integrated circuit, memory integrated circuit, power IC and Zigbee module integrated circuit;
Described MCU module integrated transmission circuit includes single-chip microcomputer V4;
Described MCU integrated circuit includes JTAG emulator J8, crystal oscillator Y2, electric capacity C23, C24, C6, resistance R15 and switching diode D3; 2 pin of described JTAG emulator J8 connect VCC_33, and 9 pin connect ground, and 1,3,5 are connected 54,55,56 and 57 pin of single-chip microcomputer V4 respectively with 7 pin; The negative pole of described switching diode D3 and the upper end of resistance R15 are connected in parallel VCC_33, and the upper end of the D3 positive pole of switching diode and R15 lower end, electric capacity C6 is parallel-connected to 11 pin of JTAG emulator J8, the lower end ground connection of electric capacity C6; The left end of described electric capacity C23 and the left end earth of electric capacity C24, the right-hand member of electric capacity C23 and the upper end of crystal oscillator Y2 are parallel-connected to 8 pin of single-chip microcomputer V4, and the right-hand member of electric capacity C24 and crystal oscillator Y2 are parallel-connected to 9 pin of single-chip microcomputer V4;
described Card Reader sends and detects integrated circuit and includes socket J9, field effect transistor Q1, electromagnetic induction coil L1, L2, electric capacity C13, C21, C14, C15 and C22, resistance R28, R27 and R30, switching diode D2, 1 pin of described socket J9 connects ANTA end, the 2 pin ground connection of socket J9, the grid of described field effect transistor Q1 connects the pin 43 of chip V6, the drain electrode of field effect transistor Q1 and the lower end of electromagnetic induction coil L1, the upper end of electric capacity C21 is connected in parallel to the left end of electric capacity C22, the right-hand member of electric capacity C22 is connected with the left end of electromagnetic induction coil L2, the source electrode of field effect transistor Q1 and the lower end earth of electric capacity C21, the upper end of electromagnetic induction coil L1 is in parallel with the left end of electric capacity C13 accesses VCC_33, the right-hand member ground connection of electric capacity C13, the right-hand member of electromagnetic induction coil L2, resistance R30 upper end, the positive pole of switching diode D2 is connected in parallel to ANTA end, the lower end ground connection of resistance R30, the negative pole of switching diode D2 and the lower end of resistance R27 are connected in parallel to the left end of electric capacity C15, the right-hand member ground connection of electric capacity C15, the left end of the upper end of resistance R27 and electric capacity C14 left end, resistance R28 is connected in parallel to 3 pin of single-chip microcomputer V4, the right-hand member of resistance R28 and the right-hand member earth of electric capacity C14,
Described radio frequency integrated circuit includes chip V6, electric capacity C5, C16, C17, C18, C19 and C20, crystal oscillator Y3, resistance R29 and diode D1, 38 pin of described chip V6, 4 pin, 5 pin and 6 pin are connected 28 pin of single-chip microcomputer V4 respectively, 29 pin, 30 pin and 31 pin, 1 pin of chip V6, 3 pin and 39 pin are all connected 16 pin of single-chip microcomputer V4,8 pin of chip V6, 21 pin, 23 pin, 41 pin, 46 pin ground connection, 7 pin of chip V6, 9 pin, 45 pin connect the right-hand member of the 2 pin connection electric capacity C5 of VCC_33, chip V6, the left end ground connection of electric capacity C5,10 pin of chip V6, 11 pin of chip V6 are by electric capacity C16, 12 pin of chip V6 are by electric capacity C17 parallel connection access GND end, and the positive pole of described diode D1 connects ANTA end, the negative pole of diode D1 and the upper end of resistance R29, the upper end of electric capacity C18 is connected in parallel to 13 pin of chip V6, the lower end of resistance R29 and the lower end of electric capacity C18 are connected in parallel GND and hold, the left end of crystal oscillator Y3 and the upper end of electric capacity C19 are connected in parallel to 18 pin of chip V6, the right-hand member of crystal oscillator Y3 and the upper end of electric capacity C20 are connected in parallel to 19 pin of chip V6, the lower end of electric capacity C19 and the lower end earth of electric capacity C20,
described door lock drived control and electric power detection integrated circuit include PNP triode T7, T5 and T6, NPN triode T2, T3 and T4, resistance R12, R13, R18, R19, R21, R22, R23, R24, R25 and R26, described NPN triode T2, the equal ground connection of emitter of T3 and T4, the right-hand member of the base stage contact resistance R21 of NPN triode T2, the left end of the collector contact resistance R18 of NPN triode T2, the left end of resistance R21 connects 22 pin of single-chip microcomputer V4, the right-hand member of resistance R18 and the left end of resistance R12 are connected in parallel to the base stage of PNP triode T6, the right-hand member of resistance R12 and the emitter of PNP triode T6 are connected in parallel to VCC_IN, the collector of PNP triode T6 and the upper end of resistance R26, the left end of resistance R13 is connected in parallel, the right-hand member of resistance R13 and the left end of resistance R19 are connected in parallel to 2 pin of single-chip microcomputer V4, the right-hand member ground connection of resistance R19, the lower end of resistance R26 and the emitter of PNP triode T5, the emitter of PNP triode T7 is connected in parallel, the left end of resistance R23 and the collector of PNP triode T5, the collector of NPN triode T3 is connected in parallel to LOCKPOWER1 end, the right-hand member of resistance R23 connects the base stage of PNP triode T7, the right-hand member of resistance R22 connects the base stage of PNP triode T5, the left end of resistance R22 and the collector of PNP triode T7, the collector of NPN triode T4 is connected in parallel LOCKPOWER2 end, the right-hand member of described resistance R24 connects the base stage of NPN triode T3, the left end of resistance R24 connects 20 pin of single-chip microcomputer V4, the right-hand member of resistance R25 connects the base stage of NPN triode T4, the left end of resistance R25 connects 21 pin of single-chip microcomputer V4, the equal ground connection of emitter of NPN triode T3 and T4,
Described lock status detects and switch integrated circuit includes chip J1, electric capacity C2 and resistance R1, R2, R3, R4, R5 and R6; 1 pin of described chip J1 and the lower end of electric capacity C2 are parallel to LOCKPOWER1 and hold, 2 pin of chip J1 and the upper end of electric capacity C2 are parallel to LOCKPOWER2 and hold, 3 pin of chip J1 and 7 pin ground connection, 8 pin of chip J1 connect VCC_IN end, one end of the 4 pin contact resistance R6 of chip J1, one end of the 5 pin contact resistance R5 of chip J1, one end of the 6 pin contact resistance R4 of chip J1; The other end of described resistance R6 and one end of resistance R3 are parallel to 17 pin of single-chip microcomputer V4, the other end of resistance R5 and one end of resistance R2 are parallel to 18 pin of single-chip microcomputer V4, the other end of resistance R4 and one end of resistance R1 are parallel to 19 pin of single-chip microcomputer V4, and the other end of R1, R2, R3 of resistance is connected in parallel VCC33;
described clock chip integrated circuit includes clock chip U1, electric capacity C9, C7, resistance R8, R9, and crystal oscillator Y1; 2 pin of described clock chip U1 are connected with the left end of crystal oscillator Y1,1 pin of clock chip U1 and the right-hand member of crystal oscillator Y1 are connected in parallel to the left end of electric capacity C7,8 pin of clock chip U1 and the upper end of electric capacity C9 are connected in parallel to VCC_33, the right-hand member earth of 4 pin of clock chip U1 and the lower end of electric capacity C9, electric capacity C7, the upper end of resistance R8 and the upper end of resistance R9 are connected in parallel to VCC_33, the lower end of resistance R8 and 5 pin of clock chip U1 are connected in parallel to 42 pin of single-chip microcomputer V4, and the lower end of resistance R9 and 6 pin of clock chip U1 are connected in parallel to 41 pin of single-chip microcomputer V4;
described memory integrated circuit comprises storage chip V1, resistance R10 and R11; 1 pin of described storage chip V1,2 pin, 3 pin, 4 pin earths, 5 pin of storage chip V1 and the lower end of resistance R11 are connected in parallel to the pin 6 of single-chip microcomputer V4,6 pin of storage chip V1 and the lower end of resistance R10 are connected in parallel to the pin 5 of single-chip microcomputer V4, the 7 pin ground connection of storage chip V1, the upper end of 8 pin of storage chip V1 and the upper end of resistance R10, resistance R11 is connected in parallel to the pin 4 of single-chip microcomputer V4;
described power IC includes chip V2, electric capacity C3, C12 and C8, polar capacitor C10 and C4; The output terminal 3 of the upper end of electric capacity C3, C12, the positive pole of polar capacitor C4 and chip V2 is parallel-connected to VCC_33, earth terminal 1 earth of the lower end of electric capacity C3, C12, C8, the negative pole of polar capacitor C4, C10 and chip V2, the upper end of electric capacity C8 and the positive pole of polar capacitor C10 is in parallel with the input end 2 of chip V2 accesses VCC_IN;
described Zigbee integrated circuit modules includes chip V5, pin 1 ground connection of chip V5, the vdd terminal of chip V5 meets VCC_33, the pin 32 of the P1.7 termination single-chip microcomputer V4 of chip V5, the pin 33 of the P1.6 termination single-chip microcomputer V4 of chip V5, the pin 58 of the RST termination single-chip microcomputer V4 of chip V5.
2.
control circuit based on Zigbee intelligent wireless door lock according to claim 1, it is characterized in that: the described control circuit based on Zigbee intelligent wireless door lock also includes buzzer warning integrated circuit, include triode T1, resistance R16 and hummer BEEP1, the grounded emitter of described triode T1, the base stage of triode T1 connects the right-hand member of R16, the collector of triode T1 connects the lower end pin of hummer BEEP1,13 pin of the single-chip microcomputer V4 described in left end connection of resistance R16, the upper end pin of hummer BEEP1 connects VCC_33.
3.
control circuit based on Zigbee intelligent wireless door lock according to claim 1, it is characterized in that: the described control circuit based on Zigbee intelligent wireless door lock also includes LED integrated circuit, include pilot lamp LED and resistance R17, the minus earth of pilot lamp LED, the right-hand member of the positive pole contact resistance R17 of pilot lamp LED, 14 pin of the single-chip microcomputer V4 described in left end connection of R17.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520720655.6U CN205003519U (en) | 2015-09-17 | 2015-09-17 | Control circuit based on zigbee wireless Intelligence lock |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520720655.6U CN205003519U (en) | 2015-09-17 | 2015-09-17 | Control circuit based on zigbee wireless Intelligence lock |
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| CN205003519U true CN205003519U (en) | 2016-01-27 |
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| CN201520720655.6U Expired - Fee Related CN205003519U (en) | 2015-09-17 | 2015-09-17 | Control circuit based on zigbee wireless Intelligence lock |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105334783A (en) * | 2015-09-17 | 2016-02-17 | 安徽天智信息科技集团股份有限公司 | Control circuit based on Zigbee wireless intelligent door lock |
| CN109555379A (en) * | 2018-12-20 | 2019-04-02 | 国网山西省电力公司长治供电公司 | Intelligent ammeter box built-in lock |
-
2015
- 2015-09-17 CN CN201520720655.6U patent/CN205003519U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105334783A (en) * | 2015-09-17 | 2016-02-17 | 安徽天智信息科技集团股份有限公司 | Control circuit based on Zigbee wireless intelligent door lock |
| CN109555379A (en) * | 2018-12-20 | 2019-04-02 | 国网山西省电力公司长治供电公司 | Intelligent ammeter box built-in lock |
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